- 14 9月, 2017 2 次提交
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由 Thor Thayer 提交于
Add driver support for the Altera I2C Controller. The I2C controller is soft IP for use in FPGAs. Signed-off-by: NThor Thayer <thor.thayer@linux.intel.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Linus Torvalds 提交于
Another merge window, another MAINTAINERS file disaster. People have serious problems with the alphabet and sorting, and poor Jérôme Glisse and Radim Krčmář get their names mangled by locale issues, turning them into some mangled mess (probably others do too, but those two stood out when sorting things again). And we now have two copies of the same 'AS3645A LED FLASH CONTROLLER DRIVER' in the tree and in the MAINTAINERS file, but that's a separate issue - the duplication is real, and I left them as two entries for the same name. This does not try to sort the actual section pattern entries, although I may end up doing that later. Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 13 9月, 2017 1 次提交
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由 Juergen Gross 提交于
Jeremy Fitzhardinge is stepping down as a paravirt maintainer. I'll replace him. While at it, update the file list to the actual pattern. Signed-off-by: NJuergen Gross <jgross@suse.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: akataria@vmware.com Cc: chrisw@sous-sol.org Cc: jeremy@goop.org Cc: rusty@rustcorp.com.au Cc: virtualization@lists.linux-foundation.org Link: http://lkml.kernel.org/r/20170905143407.9227-1-jgross@suse.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
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- 09 9月, 2017 5 次提交
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由 Robert P. J. Day 提交于
Collection of aesthetic adjustments to various PPS-related files, directories and Documentation, some quite minor just for the sake of consistency, including: * Updated example of pps device tree node (courtesy Rodolfo G.) * "PPS-API" -> "PPS API" * "pps_source_info_s" -> "pps_source_info" * "ktimer driver" -> "pps-ktimer driver" * "ppstest /dev/pps0" -> "ppstest /dev/pps1" to match example * Add missing PPS-related entries to MAINTAINERS file * Other trivialities Link: http://lkml.kernel.org/r/alpine.LFD.2.20.1708261048220.8106@localhost.localdomainSigned-off-by: NRobert P. J. Day <rpjday@crashcourse.ca> Acked-by: NRodolfo Giometti <giometti@enneenne.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Luis R. Rodriguez 提交于
In the future usermode helper users do not need to carry in all the of kmod headers declarations. Since kmod.h still includes umh.h this change has no functional changes, each umh user can be cleaned up separately later and with time. Link: http://lkml.kernel.org/r/20170810180618.22457-4-mcgrof@kernel.orgSigned-off-by: NLuis R. Rodriguez <mcgrof@kernel.org> Cc: Kees Cook <keescook@chromium.org> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Jessica Yu <jeyu@redhat.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Michal Marek <mmarek@suse.com> Cc: Petr Mladek <pmladek@suse.com> Cc: Miroslav Benes <mbenes@suse.cz> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Guenter Roeck <linux@roeck-us.net> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Matt Redfearn <matt.redfearn@imgtec.com> Cc: Dan Carpenter <dan.carpenter@oracle.com> Cc: Colin Ian King <colin.king@canonical.com> Cc: Daniel Mentz <danielmentz@google.com> Cc: David Binderman <dcb314@hotmail.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Luis R. Rodriguez 提交于
This should make it clearer what the kmod code is now that the umh code is split out separately. Link: http://lkml.kernel.org/r/20170810180618.22457-3-mcgrof@kernel.orgSigned-off-by: NLuis R. Rodriguez <mcgrof@kernel.org> Cc: Kees Cook <keescook@chromium.org> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Jessica Yu <jeyu@redhat.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Michal Marek <mmarek@suse.com> Cc: Petr Mladek <pmladek@suse.com> Cc: Miroslav Benes <mbenes@suse.cz> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Guenter Roeck <linux@roeck-us.net> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Matt Redfearn <matt.redfearn@imgtec.com> Cc: Dan Carpenter <dan.carpenter@oracle.com> Cc: Colin Ian King <colin.king@canonical.com> Cc: Daniel Mentz <danielmentz@google.com> Cc: David Binderman <dcb314@hotmail.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Luis R. Rodriguez 提交于
Patch series "kmod: few code cleanups to split out umh code" The usermode helper has a provenance from the old usb code which first required a usermode helper. Eventually this was shoved into kmod.c and the kernel's modprobe calls was converted over eventually to share the same code. Over time the list of usermode helpers in the kernel has grown -- so kmod is just but one user of the API. This series is a simple logical cleanup which acknowledges the code evolution of the usermode helper and shoves the UMH API into its own dedicated file. This way users of the API can later just include umh.h instead of kmod.h. Note despite the diff state the first patch really is just a code shove, no functional changes are done there. I did use git format-patch -M to generate the patch, but in the end the split was not enough for git to consider it a rename hence the large diffstat. I've put this through 0-day and it gives me their machine compilation blessings with all tests as OK. This patch (of 4): There's a slew of usermode helper users and kmod is just one of them. Split out the usermode helper code into its own file to keep the logic and focus split up. This change provides no functional changes. Link: http://lkml.kernel.org/r/20170810180618.22457-2-mcgrof@kernel.orgSigned-off-by: NLuis R. Rodriguez <mcgrof@kernel.org> Cc: Kees Cook <keescook@chromium.org> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Jessica Yu <jeyu@redhat.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Michal Marek <mmarek@suse.com> Cc: Petr Mladek <pmladek@suse.com> Cc: Miroslav Benes <mbenes@suse.cz> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Guenter Roeck <linux@roeck-us.net> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Matt Redfearn <matt.redfearn@imgtec.com> Cc: Dan Carpenter <dan.carpenter@oracle.com> Cc: Colin Ian King <colin.king@canonical.com> Cc: Daniel Mentz <danielmentz@google.com> Cc: David Binderman <dcb314@hotmail.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Jérôme Glisse 提交于
Patch series "HMM (Heterogeneous Memory Management)", v25. Heterogeneous Memory Management (HMM) (description and justification) Today device driver expose dedicated memory allocation API through their device file, often relying on a combination of IOCTL and mmap calls. The device can only access and use memory allocated through this API. This effectively split the program address space into object allocated for the device and useable by the device and other regular memory (malloc, mmap of a file, share memory, â) only accessible by CPU (or in a very limited way by a device by pinning memory). Allowing different isolated component of a program to use a device thus require duplication of the input data structure using device memory allocator. This is reasonable for simple data structure (array, grid, image, â) but this get extremely complex with advance data structure (list, tree, graph, â) that rely on a web of memory pointers. This is becoming a serious limitation on the kind of work load that can be offloaded to device like GPU. New industry standard like C++, OpenCL or CUDA are pushing to remove this barrier. This require a shared address space between GPU device and CPU so that GPU can access any memory of a process (while still obeying memory protection like read only). This kind of feature is also appearing in various other operating systems. HMM is a set of helpers to facilitate several aspects of address space sharing and device memory management. Unlike existing sharing mechanism that rely on pining pages use by a device, HMM relies on mmu_notifier to propagate CPU page table update to device page table. Duplicating CPU page table is only one aspect necessary for efficiently using device like GPU. GPU local memory have bandwidth in the TeraBytes/ second range but they are connected to main memory through a system bus like PCIE that is limited to 32GigaBytes/second (PCIE 4.0 16x). Thus it is necessary to allow migration of process memory from main system memory to device memory. Issue is that on platform that only have PCIE the device memory is not accessible by the CPU with the same properties as main memory (cache coherency, atomic operations, ...). To allow migration from main memory to device memory HMM provides a set of helper to hotplug device memory as a new type of ZONE_DEVICE memory which is un-addressable by CPU but still has struct page representing it. This allow most of the core kernel logic that deals with a process memory to stay oblivious of the peculiarity of device memory. When page backing an address of a process is migrated to device memory the CPU page table entry is set to a new specific swap entry. CPU access to such address triggers a migration back to system memory, just like if the page was swap on disk. HMM also blocks any one from pinning a ZONE_DEVICE page so that it can always be migrated back to system memory if CPU access it. Conversely HMM does not migrate to device memory any page that is pin in system memory. To allow efficient migration between device memory and main memory a new migrate_vma() helpers is added with this patchset. It allows to leverage device DMA engine to perform the copy operation. This feature will be use by upstream driver like nouveau mlx5 and probably other in the future (amdgpu is next suspect in line). We are actively working on nouveau and mlx5 support. To test this patchset we also worked with NVidia close source driver team, they have more resources than us to test this kind of infrastructure and also a bigger and better userspace eco-system with various real industry workload they can be use to test and profile HMM. The expected workload is a program builds a data set on the CPU (from disk, from network, from sensors, â). Program uses GPU API (OpenCL, CUDA, ...) to give hint on memory placement for the input data and also for the output buffer. Program call GPU API to schedule a GPU job, this happens using device driver specific ioctl. All this is hidden from programmer point of view in case of C++ compiler that transparently offload some part of a program to GPU. Program can keep doing other stuff on the CPU while the GPU is crunching numbers. It is expected that CPU will not access the same data set as the GPU while GPU is working on it, but this is not mandatory. In fact we expect some small memory object to be actively access by both GPU and CPU concurrently as synchronization channel and/or for monitoring purposes. Such object will stay in system memory and should not be bottlenecked by system bus bandwidth (rare write and read access from both CPU and GPU). As we are relying on device driver API, HMM does not introduce any new syscall nor does it modify any existing ones. It does not change any POSIX semantics or behaviors. For instance the child after a fork of a process that is using HMM will not be impacted in anyway, nor is there any data hazard between child COW or parent COW of memory that was migrated to device prior to fork. HMM assume a numbers of hardware features. Device must allow device page table to be updated at any time (ie device job must be preemptable). Device page table must provides memory protection such as read only. Device must track write access (dirty bit). Device must have a minimum granularity that match PAGE_SIZE (ie 4k). Reviewer (just hint): Patch 1 HMM documentation Patch 2 introduce core infrastructure and definition of HMM, pretty small patch and easy to review Patch 3 introduce the mirror functionality of HMM, it relies on mmu_notifier and thus someone familiar with that part would be in better position to review Patch 4 is an helper to snapshot CPU page table while synchronizing with concurrent page table update. Understanding mmu_notifier makes review easier. Patch 5 is mostly a wrapper around handle_mm_fault() Patch 6 add new add_pages() helper to avoid modifying each arch memory hot plug function Patch 7 add a new memory type for ZONE_DEVICE and also add all the logic in various core mm to support this new type. Dan Williams and any core mm contributor are best people to review each half of this patchset Patch 8 special case HMM ZONE_DEVICE pages inside put_page() Kirill and Dan Williams are best person to review this Patch 9 allow to uncharge a page from memory group without using the lru list field of struct page (best reviewer: Johannes Weiner or Vladimir Davydov or Michal Hocko) Patch 10 Add support to uncharge ZONE_DEVICE page from a memory cgroup (best reviewer: Johannes Weiner or Vladimir Davydov or Michal Hocko) Patch 11 add helper to hotplug un-addressable device memory as new type of ZONE_DEVICE memory (new type introducted in patch 3 of this serie). This is boiler plate code around memory hotplug and it also pick a free range of physical address for the device memory. Note that the physical address do not point to anything (at least as far as the kernel knows). Patch 12 introduce a new hmm_device class as an helper for device driver that want to expose multiple device memory under a common fake device driver. This is usefull for multi-gpu configuration. Anyone familiar with device driver infrastructure can review this. Boiler plate code really. Patch 13 add a new migrate mode. Any one familiar with page migration is welcome to review. Patch 14 introduce a new migration helper (migrate_vma()) that allow to migrate a range of virtual address of a process using device DMA engine to perform the copy. It is not limited to do copy from and to device but can also do copy between any kind of source and destination memory. Again anyone familiar with migration code should be able to verify the logic. Patch 15 optimize the new migrate_vma() by unmapping pages while we are collecting them. This can be review by any mm folks. Patch 16 add unaddressable memory migration to helper introduced in patch 7, this can be review by anyone familiar with migration code Patch 17 add a feature that allow device to allocate non-present page on the GPU when migrating a range of address to device memory. This is an helper for device driver to avoid having to first allocate system memory before migration to device memory Patch 18 add a new kind of ZONE_DEVICE memory for cache coherent device memory (CDM) Patch 19 add an helper to hotplug CDM memory Previous patchset posting : v1 http://lwn.net/Articles/597289/ v2 https://lkml.org/lkml/2014/6/12/559 v3 https://lkml.org/lkml/2014/6/13/633 v4 https://lkml.org/lkml/2014/8/29/423 v5 https://lkml.org/lkml/2014/11/3/759 v6 http://lwn.net/Articles/619737/ v7 http://lwn.net/Articles/627316/ v8 https://lwn.net/Articles/645515/ v9 https://lwn.net/Articles/651553/ v10 https://lwn.net/Articles/654430/ v11 http://www.gossamer-threads.com/lists/linux/kernel/2286424 v12 http://www.kernelhub.org/?msg=972982&p=2 v13 https://lwn.net/Articles/706856/ v14 https://lkml.org/lkml/2016/12/8/344 v15 http://www.mail-archive.com/linux-kernel@xxxxxxxxxxxxxxx/msg1304107.html v16 http://www.spinics.net/lists/linux-mm/msg119814.html v17 https://lkml.org/lkml/2017/1/27/847 v18 https://lkml.org/lkml/2017/3/16/596 v19 https://lkml.org/lkml/2017/4/5/831 v20 https://lwn.net/Articles/720715/ v21 https://lkml.org/lkml/2017/4/24/747 v22 http://lkml.iu.edu/hypermail/linux/kernel/1705.2/05176.html v23 https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1404788.html v24 https://lwn.net/Articles/726691/ This patch (of 19): This adds documentation for HMM (Heterogeneous Memory Management). It presents the motivation behind it, the features necessary for it to be useful and and gives an overview of how this is implemented. Link: http://lkml.kernel.org/r/20170817000548.32038-2-jglisse@redhat.comSigned-off-by: NJérôme Glisse <jglisse@redhat.com> Cc: John Hubbard <jhubbard@nvidia.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: David Nellans <dnellans@nvidia.com> Cc: Balbir Singh <bsingharora@gmail.com> Cc: Aneesh Kumar <aneesh.kumar@linux.vnet.ibm.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Evgeny Baskakov <ebaskakov@nvidia.com> Cc: Johannes Weiner <hannes@cmpxchg.org> Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: Mark Hairgrove <mhairgrove@nvidia.com> Cc: Michal Hocko <mhocko@kernel.org> Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Cc: Ross Zwisler <ross.zwisler@linux.intel.com> Cc: Sherry Cheung <SCheung@nvidia.com> Cc: Subhash Gutti <sgutti@nvidia.com> Cc: Vladimir Davydov <vdavydov.dev@gmail.com> Cc: Bob Liu <liubo95@huawei.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 05 9月, 2017 2 次提交
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由 Paul Moore 提交于
Signed-off-by: NPaul Moore <paul@paul-moore.com>
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由 Marek Vasut 提交于
Add the MFD part of the ROHM BD9571MWV-M PMIC driver and MAINTAINERS entry. The MFD part only specifies the regmap bits for the PMIC and binds the subdevs together. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Signed-off-by: NLee Jones <lee.jones@linaro.org>
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- 02 9月, 2017 1 次提交
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由 Bjorn Helgaas 提交于
Fix various typos and whitespace errors: s/Synopsis/Synopsys/ s/Designware/DesignWare/ s/Keystine/Keystone/ s/gpio/GPIO/ s/pcie/PCIe/ s/phy/PHY/ s/confgiruation/configuration/ No functional change intended. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 01 9月, 2017 3 次提交
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由 Christoph Hellwig 提交于
Maintaining a subsystem with linux-kernel as the main list is painful as it has way to much traffic. On the other hand the dma-mapping subsystem is small enough that a list on its own would be silly. So use the list for the closes subsystem instead instead. Signed-off-by: NChristoph Hellwig <hch@lst.de> Acked-by: NRobin Murphy <robin.murphy@arm.com> Acked-by: NJoerg Roedel <jroedel@suse.de> Acked-by: NMarek Szyprowski <m.szyprowski@samsung.com>
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由 Miodrag Dinic 提交于
Add device driver for a virtual RTC device in Android emulator. The compatible string used by OS for binding the driver is defined as "google,goldfish-rtc". Signed-off-by: NMiodrag Dinic <miodrag.dinic@imgtec.com> Signed-off-by: NGoran Ferenc <goran.ferenc@imgtec.com> Signed-off-by: NAleksandar Markovic <aleksandar.markovic@imgtec.com> Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
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由 Aleksandar Markovic 提交于
Add documentation for DT binding of Goldfish RTC driver. The compatible string used by OS for binding the driver is "google,goldfish-rtc". Signed-off-by: NMiodrag Dinic <miodrag.dinic@imgtec.com> Signed-off-by: NGoran Ferenc <goran.ferenc@imgtec.com> Signed-off-by: NAleksandar Markovic <aleksandar.markovic@imgtec.com> Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
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- 31 8月, 2017 6 次提交
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由 Vitaly Kuznetsov 提交于
Add Hyper-V tracing subsystem and trace hyperv_mmu_flush_tlb_others(). Tracing is done the same way we do xen_mmu_flush_tlb_others(). Signed-off-by: NVitaly Kuznetsov <vkuznets@redhat.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: NStephen Hemminger <sthemmin@microsoft.com> Reviewed-by: NSteven Rostedt (VMware) <rostedt@goodmis.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Haiyang Zhang <haiyangz@microsoft.com> Cc: Jork Loeser <Jork.Loeser@microsoft.com> Cc: K. Y. Srinivasan <kys@microsoft.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Simon Xiao <sixiao@microsoft.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: devel@linuxdriverproject.org Link: http://lkml.kernel.org/r/20170802160921.21791-10-vkuznets@redhat.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
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由 Eugeniy Paltsev 提交于
HSDK board manages its clocks using various PLLs. These PLL have same dividers and corresponding control registers mapped to different addresses. So we add one common driver for such PLLs. Each PLL on HSDK board consists of three dividers: IDIV, FBDIV and ODIV. Output clock value is managed using these dividers. We add pre-defined tables with supported rate values and appropriate configurations of IDIV, FBDIV and ODIV for each value. As of today we add support for PLLs that generate clock for the HSDK arc cpus, system, ddr, AXI tunnel and hdmi. By this patch we add support for several plls (arc cpus pll and others), so we had to use two different init types: CLK_OF_DECLARE for arc cpus pll and regular probing for others plls. Signed-off-by: NEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: NVineet Gupta <vgupta@synopsys.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Murilo Opsfelder Araujo 提交于
drivers/watchdog/wdrtas.c is of interest of linuxppc maintainers. Signed-off-by: NMurilo Opsfelder Araujo <mopsfelder@gmail.com> Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
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由 Sukadev Bhattiprolu 提交于
Define interfaces (wrappers) to the 'copy' and 'paste' instructions (which are new in PowerISA 3.0). These are intended to be used to by NX driver(s) to submit Coprocessor Request Blocks (CRBs) to the NX hardware engines. Signed-off-by: NSukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
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由 Sukadev Bhattiprolu 提交于
Implement vas_init() and vas_exit() functions for a new VAS module. This VAS module is essentially a library for other device drivers and kernel users of the NX coprocessors like NX-842 and NX-GZIP. In the future this will be extended to add support for user space to access the NX coprocessors. VAS is currently only supported with 64K page size. Signed-off-by: NSukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
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由 Jon Derrick 提交于
Add Jonathan Derrick as VMD maintainer. Signed-off-by: NJon Derrick <jonathan.derrick@intel.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NKeith Busch <keith.busch@intel.com>
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- 30 8月, 2017 2 次提交
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由 Robert Richter 提交于
Add Robert Richter as the primary maintainer for this platform. Signed-off-by: NJayachandran C <jnair@caviumnetworks.com> Signed-off-by: NRobert Richter <rrichter@cavium.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Greg Kroah-Hartman 提交于
Now that the IRDA code has moved under drivers/staging/irda/, update the MAINTAINERS file with the new location. Reported-by: NJoe Perches <joe@perches.com> Signed-off-by: Greg Kroah-Hartman gregkh@linuxfoundation.org Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 29 8月, 2017 2 次提交
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由 Hans de Goede 提交于
Add an entry for drivers/i2c/busses/i2c-cht-wc.c and add myself as maintainer of this driver. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Dexuan Cui 提交于
Hyper-V Sockets (hv_sock) supplies a byte-stream based communication mechanism between the host and the guest. It uses VMBus ringbuffer as the transportation layer. With hv_sock, applications between the host (Windows 10, Windows Server 2016 or newer) and the guest can talk with each other using the traditional socket APIs. More info about Hyper-V Sockets is available here: "Make your own integration services": https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/user-guide/make-integration-service The patch implements the necessary support in Linux guest by introducing a new vsock transport for AF_VSOCK. Signed-off-by: NDexuan Cui <decui@microsoft.com> Cc: K. Y. Srinivasan <kys@microsoft.com> Cc: Haiyang Zhang <haiyangz@microsoft.com> Cc: Stephen Hemminger <sthemmin@microsoft.com> Cc: Andy King <acking@vmware.com> Cc: Dmitry Torokhov <dtor@vmware.com> Cc: George Zhang <georgezhang@vmware.com> Cc: Jorgen Hansen <jhansen@vmware.com> Cc: Reilly Grant <grantr@vmware.com> Cc: Asias He <asias@redhat.com> Cc: Stefan Hajnoczi <stefanha@redhat.com> Cc: Vitaly Kuznetsov <vkuznets@redhat.com> Cc: Cathy Avery <cavery@redhat.com> Cc: Rolf Neugebauer <rolf.neugebauer@docker.com> Cc: Marcelo Cerri <marcelo.cerri@canonical.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 28 8月, 2017 1 次提交
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由 Srinivas Kandagatla 提交于
NVMEM has been in kernel since v4.2 but the ABI document was missing since then. userspace interface did not change since then and seems stable, so this patch documents the nvmem ABI. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 27 8月, 2017 3 次提交
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由 Wolfram Sang 提交于
Sonic's email address bounced, so remove it from MAINTAINERS. Since there was no I2C/TWI maintenance activity for 3 years now, drop that whole entry. Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Sakari Ailus 提交于
Add a LED flash class driver for the as3654a flash controller. A V4L2 flash driver for it already exists (drivers/media/i2c/as3645a.c), and this driver is based on that. Signed-off-by: NSakari Ailus <sakari.ailus@linux.intel.com> Acked-by: NJacek Anaszewski <jacek.anaszewski@gmail.com> Signed-off-by: NMauro Carvalho Chehab <mchehab@s-opensource.com>
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由 Todor Tomov 提交于
Add an entry for Qualcomm Camera subsystem driver. Signed-off-by: NTodor Tomov <todor.tomov@linaro.org> Signed-off-by: NHans Verkuil <hans.verkuil@cisco.com> Signed-off-by: NMauro Carvalho Chehab <mchehab@s-opensource.com>
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- 25 8月, 2017 1 次提交
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由 Hannes Reinecke 提交于
The hpsa driver now has support for all boards the cciss driver used to support, so this patch removes the cciss driver and make hpsa an alias to cciss. Signed-off-by: NHannes Reinecke <hare@suse.com> Acked-by: NDon Brace <don.brace@microsemi.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
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- 24 8月, 2017 1 次提交
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由 Juergen Gross 提交于
Lguest seems to be rather unused these days. It has seen only patches ensuring it still builds the last two years and its official state is "Odd Fixes". Remove it in order to be able to clean up the paravirt code. Signed-off-by: NJuergen Gross <jgross@suse.com> Acked-by: NRusty Russell <rusty@rustcorp.com.au> Acked-by: NThomas Gleixner <tglx@linutronix.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: boris.ostrovsky@oracle.com Cc: lguest@lists.ozlabs.org Cc: rusty@rustcorp.com.au Cc: xen-devel@lists.xenproject.org Link: http://lkml.kernel.org/r/20170816173157.8633-3-jgross@suse.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
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- 23 8月, 2017 2 次提交
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由 Masahiro Yamada 提交于
UniPhier SoCs contain AIDET (ARM Interrupt Detector). This is intended to provide additional features that are not covered by GIC. The main purpose is to provide logic inverter to support low level and falling edge trigger types for interrupt lines from on-board devices. Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Aviad Krawczyk 提交于
Update MAINTAINERS file Signed-off-by: NAviad Krawczyk <aviad.krawczyk@huawei.com> Signed-off-by: NZhao Chen <zhaochen6@huawei.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 22 8月, 2017 2 次提交
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由 David Daney 提交于
Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Lars Persson 提交于
Assign the Axis kernel team as maintainer for crypto drivers under drivers/crypto/axis. Signed-off-by: NLars Persson <larper@axis.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 20 8月, 2017 6 次提交
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由 Sean Young 提交于
This is new driver which uses pwm, so it is more power-efficient than the bit banging gpio-ir-tx driver. Signed-off-by: NSean Young <sean@mess.org> Reviewed-by: NPavel Machek <pavel@ucw.cz> Tested-by: NMatthias Reichl <hias@horus.com> Signed-off-by: NMauro Carvalho Chehab <mchehab@s-opensource.com>
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由 Sean Young 提交于
This is a simple bit-banging GPIO IR TX driver. Signed-off-by: NSean Young <sean@mess.org> Signed-off-by: NMatthias Reichl <hias@horus.com> Signed-off-by: NMauro Carvalho Chehab <mchehab@s-opensource.com>
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由 Sean Wang 提交于
I work for MediaTek on maintaining the MediaTek CIR driver for the existing SoCs and adding support for the following SoCs. Signed-off-by: NSean Wang <sean.wang@mediatek.com> Signed-off-by: NSean Young <sean@mess.org> Signed-off-by: NMauro Carvalho Chehab <mchehab@s-opensource.com>
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由 Daniel Scheller 提交于
Add MAINTAINER's entry for this new driver. Signed-off-by: NDaniel Scheller <d.scheller@gmx.net> Signed-off-by: NMauro Carvalho Chehab <mchehab@s-opensource.com>
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由 Daniel Scheller 提交于
An entry for ddbridge driver was missing. Add it, now that it moved to Maintained state. Signed-off-by: NDaniel Scheller <d.scheller@gmx.net> Signed-off-by: NMauro Carvalho Chehab <mchehab@s-opensource.com>
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由 Chunfeng Yun 提交于
The driver is actually for T-PHY which supports USB3.0, PCIe and SATA, and supports more SoCs now, but not just only for series of mt65xx SoCs, so the name of file, data struct, functions etc with 'mt65xx' may cause misunderstanding when new SoCs are supported. Here rename them to reflect the real functions and also enhance readability. And also update MAINTAINERS file to reflect the correct driver Signed-off-by: NChunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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