1. 25 8月, 2017 4 次提交
  2. 23 8月, 2017 1 次提交
  3. 09 8月, 2017 2 次提交
  4. 05 8月, 2017 1 次提交
  5. 24 7月, 2017 9 次提交
    • P
      IB/mlx5: Expose extended error counters · 58dcb60a
      Parav Pandit 提交于
      This patch adds below requester and responder side error counters,
      which will be exposed by hardware counters interface and are supported
      as part of query Q counters command extension.
      
       +---------------------------+-------------------------------------+
       |      Name                 |           Description               |
       |---------------------------+-------------------------------------|
       |resp_local_length_error    | Number of times responder detected  |
       |                           | local length errors                 |
       |---------------------------+-------------------------------------|
       |resp_cqe_error             | Number of CQEs completed with error |
       |                           | at responder                        |
       |---------------------------+-------------------------------------|
       |req_cqe_error              | Number of CQEs completed with error |
       |                           | at requester                        |
       |---------------------------+-------------------------------------|
       |req_remote_invalid_request | Number of times requester detected  |
       |                           | remote invalid request error        |
       |---------------------------+-------------------------------------|
       |req_remote_access_error    | Number of times requester detected  |
       |                           | remote access error                 |
       |---------------------------+-------------------------------------|
       |resp_remote_access_error   | Number of times responder detected  |
       |                           | remote access error                 |
       |---------------------------+-------------------------------------|
       |resp_cqe_flush_error       | Number of CQEs completed with       |
       |                           | flushed with error at responder     |
       |---------------------------+-------------------------------------|
       |req_cqe_flush_error        | Number of CQEs completed with       |
       |                           | flushed with error at requester     |
       +---------------------------+-------------------------------------+
      Signed-off-by: NParav Pandit <parav@mellanox.com>
      Reviewed-by: NDaniel Jurgens <danielj@mellanox.com>
      Reviewed-by: NEli Cohen <eli@mellanox.com>
      Signed-off-by: NLeon Romanovsky <leon@kernel.org>
      Signed-off-by: NDoug Ledford <dledford@redhat.com>
      58dcb60a
    • L
      IB/mlx5: Fix existence check for extended address vector · 3fffc82a
      Leon Romanovsky 提交于
      The extended address vector is the highest bit in be32 variable,
      but it was compared with the lowest. This patch fixes the endianness
      of that check and removes already declared define.
      
      Fixes: 17d2f88f ("IB/mlx5: Add ODP atomics support")
      Reviewed-by: NArtemy Kovalyov <artemyko@mellanox.com>
      Signed-off-by: NLeon Romanovsky <leonro@mellanox.com>
      Signed-off-by: NDoug Ledford <dledford@redhat.com>
      3fffc82a
    • Y
      net/mlx5: Report enhanced capabilities for IPoIB · 4ce749bd
      Yishai Hadas 提交于
      Report 'ipoib_enhanced_offloads' capabilities from
      the core layer, it will be used in the next patch from this series.
      Signed-off-by: NYishai Hadas <yishaih@mellanox.com>
      Reviewed-by: NMaor Gottlieb <maorg@mellanox.com>
      Signed-off-by: NLeon Romanovsky <leon@kernel.org>
      Signed-off-by: NDoug Ledford <dledford@redhat.com>
      4ce749bd
    • M
      IB/mlx5: Add support to dropless RQ · 03404e8a
      Maor Gottlieb 提交于
      RQs that were configured for "delay drop" will prevent packet drops
      when their WQEs are depleted.
      Marking an RQ to be drop-less is done by setting delay_drop_en in RQ
      context using CREATE_RQ command.
      
      Since this feature is globally activated/deactivated by using the
      SET_DELAY_DROP command on all the marked RQs, we activated/deactivated
      it according to the number of RQs with 'delay_drop' enabled.
      
      When timeout is expired, then the feature is deactivated. Therefore
      the driver handles the delay drop timeout event and reactivate it.
      Signed-off-by: NMaor Gottlieb <maorg@mellanox.com>
      Reviewed-by: NYishai Hadas <yishaih@mellanox.com>
      Signed-off-by: NLeon Romanovsky <leon@kernel.org>
      Signed-off-by: NDoug Ledford <dledford@redhat.com>
      03404e8a
    • M
      net/mlx5: Introduce general notification event · 246ac981
      Maor Gottlieb 提交于
      When delay drop timeout is expired, the firmware raises
      general notification event of DELAY_DROP_TIMEOUT subtype.
      In addition the feature is disable so the driver have to
      reactivate the timeout.
      Signed-off-by: NMaor Gottlieb <maorg@mellanox.com>
      Reviewed-by: NYishai Hadas <yishaih@mellanox.com>
      Signed-off-by: NLeon Romanovsky <leon@kernel.org>
      Signed-off-by: NDoug Ledford <dledford@redhat.com>
      246ac981
    • M
      net/mlx5: Introduce set delay drop command · c1e0bfc1
      Maor Gottlieb 提交于
      Add support to SET_DELAY_DROP command.
      
      This command will be used in downstream patches for delay packet drop.
      The timeout value should be indicated by delay_drop_timeout field.
      Packet processing will be delayed till timeout value passed or until
      more WQEs are posted.
      
      Setting this value to 0 disables the feature.
      Signed-off-by: NMaor Gottlieb <maorg@mellanox.com>
      Reviewed-by: NYishai Hadas <yishaih@mellanox.com>
      Signed-off-by: NLeon Romanovsky <leon@kernel.org>
      Signed-off-by: NDoug Ledford <dledford@redhat.com>
      c1e0bfc1
    • B
      IB/mlx5: Restore IB guid/policy for virtual functions · 7ecf6d8f
      Bodong Wang 提交于
      When a user sets port_guid, node_guid or policy of an IB virtual
      function, save this information in "struct mlx5_vf_context".
      
      This information will be restored later when pci_resume is called.
      To make sure this works, one can use aer-inject to generate PCI
      errors on mlx5 devices and verify if relevant fields are restored
      after PCI resume.
      Signed-off-by: NBodong Wang <bodong@mellanox.com>
      Reviewed-by: NEli Cohen <eli@mellanox.com>
      Signed-off-by: NLeon Romanovsky <leon@kernel.org>
      Signed-off-by: NDoug Ledford <dledford@redhat.com>
      7ecf6d8f
    • P
      IB/mlx5: Add debug control parameters for congestion control · 4a2da0b8
      Parav Pandit 提交于
      This patch adds debug control parameters for congestion control which
      can be read or written through debugfs. They are for reaction point and
      notification point nodes.
      
      These control parameters are as below:
       +------------------------------+-----------------------------------------+
       |      Name                    |           Description                   |
       |------------------------------+-----------------------------------------|
       |rp_clamp_tgt_rate             | When set target rate is updated to      |
       |                              | current rate                            |
       |------------------------------+-----------------------------------------|
       |rp_clamp_tgt_rate_ati         | When set update target rate based on    |
       |                              | timer as well                           |
       |------------------------------+-----------------------------------------|
       |rp_time_reset                 | time between rate increase if no        |
       |                              | CNP is received unit in usec            |
       |------------------------------+-----------------------------------------|
       |rp_byte_reset                 | Number of bytes between rate inease if  |
       |                              | no CNP is received                      |
       |------------------------------+-----------------------------------------|
       |rp_threshold                  | Threshold for reaction point rate       |
       |                              | control                                 |
       |------------------------------+-----------------------------------------|
       |rp_ai_rate                    | Rate for target rate, unit in Mbps      |
       |------------------------------+-----------------------------------------|
       |rp_hai_rate                   | Rate for hyper increase state           |
       |                              | unit in Mbps                            |
       |------------------------------+-----------------------------------------|
       |rp_min_dec_fac                | Minimum factor by which the current     |
       |                              | transmit rate can be changed when       |
       |                              | processing a CNP, unit is percerntage   |
       |------------------------------+-----------------------------------------|
       |rp_min_rate                   | Minimum value for rate limit,           |
       |                              | unit in Mbps                            |
       |------------------------------+-----------------------------------------|
       |rp_rate_to_set_on_first_cnp   | Rate that is set when first CNP is      |
       |                              | received, unit is Mbps                  |
       |------------------------------+-----------------------------------------|
       |rp_dce_tcp_g                  | Used to calculate alpha                 |
       |------------------------------+-----------------------------------------|
       |rp_dce_tcp_rtt                | Time between updates of alpha value,    |
       |                              | unit is usec                            |
       |------------------------------+-----------------------------------------|
       |rp_rate_reduce_monitor_period | Minimum time between consecutive rate   |
       |                              | reductions                              |
       |------------------------------+-----------------------------------------|
       |rp_initial_alpha_value        | Initial value of alpha                  |
       |------------------------------+-----------------------------------------|
       |rp_gd                         | When CNP is received, flow rate is      |
       |                              | reduced based on gd, rp_gd is given as  |
       |                              | log2(rp_gd)                             |
       |------------------------------+-----------------------------------------|
       |np_cnp_dscp                   | dscp code point for generated cnp       |
       |------------------------------+-----------------------------------------|
       |np_cnp_prio_mode              | 802.1p priority for generated cnp       |
       |------------------------------+-----------------------------------------|
       |np_cnp_prio                   | cnp priority mode                       |
       +------------------------------+-----------------------------------------+
      Signed-off-by: NParav Pandit <parav@mellanox.com>
      Reviewed-by: NDaniel Jurgens <danielj@mellanox.com>
      Reviewed-by: NEli Cohen <eli@mellanox.com>
      Signed-off-by: NLeon Romanovsky <leon@kernel.org>
      Signed-off-by: NDoug Ledford <dledford@redhat.com>
      4a2da0b8
    • H
      net/mlx5: Add raw ethernet local loopback firmware command · bded747b
      Huy Nguyen 提交于
      Add support for raw ethernet local loopback firmware command.
      Signed-off-by: NHuy Nguyen <huyn@mellanox.com>
      Reviewed-by: NDaniel Jurgens <danielj@mellanox.com>
      Signed-off-by: NLeon Romanovsky <leon@kernel.org>
      Signed-off-by: NDoug Ledford <dledford@redhat.com>
      bded747b
  6. 27 6月, 2017 8 次提交
    • I
      net/mlx5e: IPSec, Innova IPSec offload infrastructure · 547eede0
      Ilan Tayari 提交于
      Add Innova IPSec ESP crypto offload configuration paths.
      Detect Innova IPSec device and set the NETIF_F_HW_ESP flag.
      Configure Security Associations using the API introduced in a previous
      patch.
      
      Add Software-parser hardware descriptor layout
      Software-Parser (swp) is a hardware feature in ConnectX which allows the
      host software to specify protocol header offsets in the TX path, thus
      overriding the hardware parser.
      This is useful for protocols that the ASIC may not be able to parse on
      its own.
      
      Note that due to inline metadata, XDP is not supported in Innova IPSec.
      Signed-off-by: NIlan Tayari <ilant@mellanox.com>
      Signed-off-by: NYossi Kuperman <yossiku@mellanox.com>
      Signed-off-by: NYevgeny Kliteynik <kliteyn@mellanox.com>
      Signed-off-by: NBoris Pismenny <borisp@mellanox.com>
      Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
      547eede0
    • I
      net/mlx5: Accel, Add IPSec acceleration interface · bebb23e6
      Ilan Tayari 提交于
      Add routines for manipulating the hardware IPSec SA database (SADB).
      
      In Innova IPSec, a Security Association (SA) is added or deleted
      via a command message over the SBU connection.
      The HW then sends a response message over the same connection.
      
      Add implementation for Innova IPSec (FPGA-based) hardware.
      
      These routines will be used by the IPSec offload support in a later patch
      However they may also be used by others such as RDMA and RoCE IPSec.
      
      mlx5/accel is a middle acceleration layer to allow mlx5e and other ULPs
      to work directly with mlx5_core rather than Innova FPGA or other mlx5
      acceleration providers.
      
      In this patchset we add Innova IPSec support and mlx5/accel delegates
      IPSec offloads to Innova routines.
      
      In the future, when IPSec/TLS or any other acceleration gets integrated
      into ConnectX chip, mlx5/accel layer will provide the integrated
      acceleration, rather than the Innova one.
      Signed-off-by: NIlan Tayari <ilant@mellanox.com>
      Signed-off-by: NBoris Pismenny <borisp@mellanox.com>
      Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
      bebb23e6
    • I
      net/mlx5: FPGA, Add SBU infrastructure · a9956d35
      Ilan Tayari 提交于
      Add interface to initialize and interact with Innova FPGA SBU
      connections.
      A client driver may use these functions to set up a high-speed DMA
      connection with its SBU hardware logic, and send/receive messages
      over this connection.
      
      A later patch in this patchset will make use of these functions for
      Innova IPSec offload in mlx5 Ethernet driver.
      
      Add commands to retrieve Innova FPGA SBU capabilities, and to
      read/write Innova FPGA configuration space registers and memory,
      over internal I2C.
      
      At high level, the FPGA configuration space is divided such:
       0x00000000 - 0x007fffff is reserved for the SBU
       0x00800000 - 0xffffffff is reserved for the Shell
      0x400000000 - ...        is DDR memory
      
      A later patchset will add support for accessing FPGA CrSpace and memory
      over a high-speed connection. This is the reason for the ACCESS_TYPE
      enumeration, which currently only supports I2C.
      Signed-off-by: NIlan Tayari <ilant@mellanox.com>
      Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
      a9956d35
    • I
      net/mlx5: FPGA, Add SBU bypass and reset flows · c43051d7
      Ilan Tayari 提交于
      The Innova FPGA includes shell hardware and Sandbox-Unit (SBU) hardware.
      The shell hardware is handled by mlx5_core itself, while the SBU is
      handled by a client driver.
      
      Reset the SBU to a well-known initial state when initializing a new
      device, and set the FPGA to bypass mode when uninitializing a device.
      This allows the client driver to assume that its device has been
      reset when a new device is detected.
      
      During SBU reset, the FPGA is put into SBU-bypass mode. In this mode
      packets do not pass through the SBU, so it cannot affect the network
      data stream at all.
      
      A factory-image does not have an SBU, so skip these flows.
      Signed-off-by: NIlan Tayari <ilant@mellanox.com>
      Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
      c43051d7
    • I
      net/mlx5: FPGA, Add FW commands for FPGA QPs · 6062118d
      Ilan Tayari 提交于
      The FPGA QP is a high-bandwidth communication channel between the host
      CPU and the FPGA device. It allows performing DMA operations between
      host memory and the FPGA logic via the ConnectX chip.
      
      Add ConnectX FW commands which create and manipulate FPGA QPs.
      Signed-off-by: NIlan Tayari <ilant@mellanox.com>
      Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
      6062118d
    • I
      net/mlx5: Add support for multiple RoCE enable · a6f7d2af
      Ilan Tayari 提交于
      Previously, only mlx5_ib enabled RoCE on the port, but FPGA needs it as
      well.
      Add support for counting number of enables, so that FPGA and IB can work
      in parallel and independently.
      Program the HW to enable RoCE on the first enable call, and program to
      disable RoCE on the last disable call.
      Signed-off-by: NIlan Tayari <ilant@mellanox.com>
      Reviewed-by: NBoris Pismenny <borisp@mellanox.com>
      Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
      a6f7d2af
    • I
      net/mlx5: Add reserved-gids support · 52ec462e
      Ilan Tayari 提交于
      Reserved GIDs are entries in the GID table in use by the mlx5_core
      and its submodules (e.g. FPGA, SRIOV, E-Swtich, netdev).
      The entries are reserved at the high indexes of the GID table.
      
      A mlx5 submodule may reserve a certain amount of GIDs for its own use
      during the load sequence by calling mlx5_core_reserve_gids, and must
      also take care to un-reserve these GIDs when it closes.
      Reservation is only allowed during the load sequence and before any
      interfaces (e.g. mlx5_ib or mlx5_en) are up.
      
      After reservation, a submodule may call mlx5_core_reserved_gid_alloc/
      free to allocate entries from the reserved GIDs pool.
      
      Reserve a GID table entry for every supported FPGA QP.
      
      A later patch in the patchset will remove them from being reported to
      IB core.
      Another such patch will make use of these for FPGA QPs in Innova NIC.
      
      Added lib/mlx5.h to serve as a library for mlx5 submodlues, and to
      expose only public mlx5 API, more mlx5 library files will be added in
      future submissions.
      Signed-off-by: NIlan Tayari <ilant@mellanox.com>
      Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
      52ec462e
    • M
      net/mlx5: Cancel delayed recovery work when unloading the driver · 2a0165a0
      Mohamad Haj Yahia 提交于
      Draining the health workqueue will ignore future health works including
      the one that report hardware failure and thus we can't enter error state
      Instead cancel the recovery flow and make sure only recovery flow won't
      be scheduled.
      
      Fixes: 5e44fca5 ('net/mlx5: Only cancel recovery work when cleaning up device')
      Signed-off-by: NMohamad Haj Yahia <mohamad@mellanox.com>
      Signed-off-by: NMoshe Shemesh <moshe@mellanox.com>
      Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
      2a0165a0
  7. 22 6月, 2017 5 次提交
  8. 16 6月, 2017 4 次提交
  9. 08 6月, 2017 2 次提交
  10. 02 6月, 2017 1 次提交
  11. 23 5月, 2017 2 次提交
  12. 14 5月, 2017 1 次提交
    • I
      net/mlx5: FPGA, Add basic support for Innova · e29341fb
      Ilan Tayari 提交于
      Mellanox Innova is a NIC with ConnectX and an FPGA on the same
      board. The FPGA is a bump-on-the-wire and thus affects operation of
      the mlx5_core driver on the ConnectX ASIC.
      
      Add basic support for Innova in mlx5_core.
      
      This allows using the Innova card as a regular NIC, by detecting
      the FPGA capability bit, and verifying its load state before
      initializing ConnectX interfaces.
      
      Also detect FPGA fatal runtime failures and enter error state if
      they ever happen.
      
      All new FPGA-related logic is placed in its own subdirectory 'fpga',
      which may be built by selecting CONFIG_MLX5_FPGA.
      This prepares for further support of various Innova features in later
      patchsets.
      Additional details about hardware architecture will be provided as
      more features get submitted.
      Signed-off-by: NIlan Tayari <ilant@mellanox.com>
      Reviewed-by: NBoris Pismenny <borisp@mellanox.com>
      Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
      e29341fb