This patch provides platform data for following
 - uart reset function to assist uart register lockup workaround

 - init/exit function to fix glitch in the tx pin in tty_open
	when tty port0 is opened a glitch is seen in the tx line
	of uart0. This happens in pl011_startup() when tx fifo
	interrupt is provoked into asserting.
	Now uart0 pins are enabled (alt function) only when init
	is complete and turned back to gpio when closed.
Signed-off-by: NShreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This will centralize all GPIO pin muxing for the different boards
in the MOP500 family to a single file. It also kills off the
deprecated support for the ED (Early Drop) ASIC, this should
never be spotted in the open and ST-Ericsson have internally
deprecated this hardware.
Signed-off-by: NBibek Basu <bibek.basu@stericsson.com>
[Rebasing and kill old ASIC support]
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Split off pin definitions for the MOP500 board family to its
own file.
Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>