1. 15 12月, 2016 38 次提交
  2. 14 12月, 2016 2 次提交
    • L
      Revert "nvme: add support for the Write Zeroes command" · cdb98c26
      Linus Torvalds 提交于
      This reverts commit 6d31e3ba.
      
      This causes bootup problems for me both on my laptop and my desktop.
      What they have in common is that they have NVMe disks with dm-crypt, but
      it's not the same controller, so it's not controller-specific.
      
      Jens does not see it on his machine (also NVMe), so it's presumably
      something that triggers just on bootup.  Possibly related to dm-crypt
      and the fact that I mark my luks volume with "allow-discards" in
      /etc/crypttab.
      
      It's 100% repeatable for me, which made it fairly straightforward to
      bisect the problem to this commit. Small mercies.
      
      So we don't know what the reason is yet, but the revert is needed to get
      things going again.
      Acked-by: NJens Axboe <axboe@fb.com>
      Cc: Chaitanya Kulkarni <chaitanya.kulkarni@hgst.com>
      Cc: Christoph Hellwig <hch@lst.de>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      cdb98c26
    • L
      Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux · f4000cd9
      Linus Torvalds 提交于
      Pull arm64 updates from Catalin Marinas:
      
       - struct thread_info moved off-stack (also touching
         include/linux/thread_info.h and include/linux/restart_block.h)
      
       - cpus_have_cap() reworked to avoid __builtin_constant_p() for static
         key use (also touching drivers/irqchip/irq-gic-v3.c)
      
       - uprobes support (currently only for native 64-bit tasks)
      
       - Emulation of kernel Privileged Access Never (PAN) using TTBR0_EL1
         switching to a reserved page table
      
       - CPU capacity information passing via DT or sysfs (used by the
         scheduler)
      
       - support for systems without FP/SIMD (IOW, kernel avoids touching
         these registers; there is no soft-float ABI, nor kernel emulation for
         AArch64 FP/SIMD)
      
       - handling of hardware watchpoint with unaligned addresses, varied
         lengths and offsets from base
      
       - use of the page table contiguous hint for kernel mappings
      
       - hugetlb fixes for sizes involving the contiguous hint
      
       - remove unnecessary I-cache invalidation in flush_cache_range()
      
       - CNTHCTL_EL2 access fix for CPUs with VHE support (ARMv8.1)
      
       - boot-time checks for writable+executable kernel mappings
      
       - simplify asm/opcodes.h and avoid including the 32-bit ARM counterpart
         and make the arm64 kernel headers self-consistent (Xen headers patch
         merged separately)
      
       - Workaround for broken .inst support in certain binutils versions
      
      * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (60 commits)
        arm64: Disable PAN on uaccess_enable()
        arm64: Work around broken .inst when defective gas is detected
        arm64: Add detection code for broken .inst support in binutils
        arm64: Remove reference to asm/opcodes.h
        arm64: Get rid of asm/opcodes.h
        arm64: smp: Prevent raw_smp_processor_id() recursion
        arm64: head.S: Fix CNTHCTL_EL2 access on VHE system
        arm64: Remove I-cache invalidation from flush_cache_range()
        arm64: Enable HIBERNATION in defconfig
        arm64: Enable CONFIG_ARM64_SW_TTBR0_PAN
        arm64: xen: Enable user access before a privcmd hvc call
        arm64: Handle faults caused by inadvertent user access with PAN enabled
        arm64: Disable TTBR0_EL1 during normal kernel execution
        arm64: Introduce uaccess_{disable,enable} functionality based on TTBR0_EL1
        arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm macro
        arm64: Factor out PAN enabling/disabling into separate uaccess_* macros
        arm64: Update the synchronous external abort fault description
        selftests: arm64: add test for unaligned/inexact watchpoint handling
        arm64: Allow hw watchpoint of length 3,5,6 and 7
        arm64: hw_breakpoint: Handle inexact watchpoint addresses
        ...
      f4000cd9