The Tegra ASoC machine drivers only depend on Tegra architecture support
to compile, not specific board support. Remove Kconfig dependencies on
any particular board. This is required since Kconfig options for boards
are going away given the migration to device tree.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

This particular code had no effect on WFI execution. It only
asserts/de-asserts signal to tegra "legacy" CPU idle stats
monitor, which we are no longer using (cpufreq is based on
kernel s/w idle stats instead).
Signed-off-by: NPrashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

flowctrl_write_cpu_csr uses the cpu halt offsets and vice versa. This patch
fixes this bug.
Reported-by: NDan Willemsen <dwillemsen@nvidia.com>
Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com>
[swarren: This problem was introduced in v3.4-rc1, in commit 26fe681f "ARM:
 tegra: functions to access the flowcontroller", when this file was first
 added]
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Most PCI implementations use the standard PCI swizzle function, which
handles the well defined behaviour of PCI-to-PCI bridges which can be
found on cards (eg, four port ethernet cards.)

Rather than having almost every platform specify the standard swizzle
function, make this the default when no swizzle function is supplied.
Therefore, a swizzle function only needs to be provided when there is
something exceptional which needs to be handled.

This gets rid of the swizzle initializer from 47 files, and leaves us
with just two platforms specifying a swizzle function: ARM Integrator
and Chalice CATS.
Acked-by: NKrzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

For bare minimal system.
Signed-off-by: NHiroshi DOYU <hdoyu@nvidia.com>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

For bare minimal system.
Signed-off-by: NHiroshi DOYU <hdoyu@nvidia.com>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Tegra Memory Controller(MC) driver for Tegra30
Added to support MC General interrupts, mainly for IOMMU(SMMU).
Signed-off-by: NHiroshi DOYU <hdoyu@nvidia.com>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Tegra Memory Controller(MC) driver for Tegra20
Added to support MC General interrupts, mainly for IOMMU(GART).
Signed-off-by: NHiroshi DOYU <hdoyu@nvidia.com>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Add extern func, "tegra_ahb_enable_smmu()" to inform AHB that SMMU is
ready.
Signed-off-by: NHiroshi DOYU <hdoyu@nvidia.com>
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Tegra AHB Bus conforms to the AMBA Specification (Rev 2.0) Advanced
High-performance Bus (AHB) architecture.

The AHB Arbiter controls AHB bus master arbitration. This effectively
forms a second level of arbitration for access to the memory
controller through the AHB Slave Memory device. The AHB pre-fetch
logic can be configured to enhance performance for devices doing
sequential access. Each AHB master is assigned to either the high or
low priority bin. Both Tegra20/30 have this AHB bus.

Some of configuration params could be passed from DT too if needed.
Signed-off-by: NHiroshi DOYU <hdoyu@nvidia.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Cc: Colin Cross <ccross@android.com>
Cc: Olof Johansson <olof@lixom.net>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>

At the moment, read_persistent_clock is implemented at the
platform level, which makes it impossible to compile these
platforms in a single kernel.

Implement these two functions at the architecture level, and
provide a thin registration interface for both read_boot_clock
and read_persistent_clock. The two affected platforms (OMAP and
Tegra) are converted at the same time.
Reported-by: NJeff Ohlstein <johlstei@codeaurora.org>
Tested-by: NStephen Warren <swarren@wwwdotorg.org>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Some SKUs limit the maximum CPU frequency to 750MHz; see
tegra2_pllx_clk_init(). The pll_x frequency table needs an entry for this
frequency, or there will be continual log spam from the cpufreq driver
attempting to set this rate, yet there being no table entry for it.
Signed-off-by: NStephen Warren <swarren@nvidia.com>

ULPI PHYs have a reset signal, and different boards use a different GPIO
for this task. Add a property to device tree to represent this.

I'm not sure if adding this property to the EHCI controller node is
entirely correct; perhaps eventually we should have explicit separate
nodes for the various PHYs. However, we don't have that right now, so this
binding seems like a reasonable choice.

Cc: <devicetree-discuss@lists.ozlabs.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: <linux-usb@vger.kernel.org>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Not all boards use GPIO_PV0 as the ULPI PHY reset signal. Instead of
hard-coding this GPIO into devices.c, make the board files set it
explicitly. This will allow the PHY code to differentiate between set and
unset values, and hence know when to read the value from device tree.
Signed-off-by: NStephen Warren <swarren@nvidia.com>

pll_p_out4 is used on all/most Tegra boards to drive the cdev2 output pin
to provide a reference clock to a ULPI USB PHY. This reference clock must
run at 24MHz, and the cdev2 output has no additional dividers.

Remove board-paz00.c's now-duplicate initialization of this clock.
Reported-by: NMarc Dietrich <marvin24@gmx.de>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Commit 40f9cf0 "ARM: tegra: reparent sclk to pll_c_out1" changed the
rate of hclk. Since pclk is derived from that, and only has integer
dividers, the pclk rate needs to change in the same fashion, from 54MHz
to 60MHz.
Signed-off-by: NStephen Warren <swarren@nvidia.com>

pll_p_out4 needs to be used for other purposes. Reparent sclk so that
it runs from pll_c. Change sclk's rate to 120MHz from 108MHz since this
is the lowest precise rate that can be achieved by dividing the pll_c
rate without reducing the sclk rate. (600/5=120, 600/5.5=109.0909...,
600/6=100).
Signed-off-by: NStephen Warren <swarren@nvidia.com>

pll_c will be used as a clock source. Fill in tegra_pll_c_freq_table[]
so that it's possible to explicitly initialize the PLL.

NVIDIA's downstream nv-3.1 kernel and the ChromeOS kernel have different
pll_c tables. nv-3.1 contains entries for 522MHz and 598MHz output,
whereas the ChromeOS kernel contains entries for 600MHz output. I chose
to upstream the ChromeOS values for now, since the 600MHz rate appears
to match the default rate of this PLL when the HW boots, and it's not
clear to me why 522 or 598MHz are more useful.
Signed-off-by: NAllen Martin <amartin@nvidia.com>
Signed-off-by: NOlof Johansson <olofj@chromium.org>
Signed-off-by: NStephen Warren <swarren@nvidia.com>
[swarren: wrote commit description]

Both the Tegra30 I2S and AHUB modules used clocks, and hence currently
require AUXDATA in order to get specific device names so that clock
lookups work.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NOlof Johansson <olof@lixom.net>

Set up the audio clock tree for Tegra30 in an equivalent fashion to the
existing setup for Tegra20.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NOlof Johansson <olof@lixom.net>

pll_a uses pll_p_out1 as its parent. Therefore this clock needs to be
initialized to make sure pll_a has a known input clock. Failure to do so
will cause the system to crash early in the bootup.
Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The Tegra30 AHUB driver must call tegra_periph_reset_deassert() for all
devices on the AHUB's configlink bus. The AHUB driver must be able to
call clk_get_sys() to retrieve the clock parameter for this function.
Add the necessary clock aliases to allow this.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NOlof Johansson <olof@lixom.net>

The "KT" serial port has another use case for a "received break" quirk,
so before adding another special case to the 8250 core take this
opportunity to push such quirks out of the core and into a uart_port op.

Stephen says:
"If the callback function is to no longer live in 8250.c itself,
 arch/arm/mach-tegra/devices.c isn't logically a good place to put it,
 and that file will be going away once we get rid of all the board files
 and move solely to device tree."

...so since 8250_pci.c houses all the quirks for pci serial devices this
quirk is similarly housed in of_serial.c.  Once the open firmware
conversion completes the infrastructure details
(include/linux/of_serial.h, and the export) can all be removed to make
this self contained to of_serial.c.

Cc: Nhan H Mai <nhan.h.mai@intel.com>
Cc: Colin Cross <ccross@android.com>
Cc: Olof Johansson <olof@lixom.net>
[stephen: kill CONFIG_SERIAL_TEGRA in favor just using CONFIG_ARCH_TEGRA]
Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NSudhakar Mamillapalli <sudhakar@fb.com>
Reported-by: NAlan Cox <alan@lxorguk.ukuu.org.uk>
Acked-by: NAlan Cox <alan@linux.intel.com>
Signed-off-by: NDan Williams <dan.j.williams@intel.com>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Tested-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Rather than having a single tegra-pinctrl driver that determines whether
it's running on Tegra20 or Tegra30, instead have separate drivers for
each that call into utility functions to implement the majority of the
driver. This change is based on review feedback of the SPEAr pinctrl
driver, which had originally copied to Tegra driver structure.

This requires that the two drivers have unique names. Update a couple
spots in arch/arm/mach-tegra for the name change.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

This adds a complete pinmux configuration to all Tegra20 device tree
files. This allows removal of board-dt-tegra20.c's use of the pinmux
board files, and the special device tree handling in board-pinmux.c.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NOlof Johansson <olof@lixom.net>

The pinctrl driver is now active and used by all boards. Remove the
old pinmux driver.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NOlof Johansson <olof@lixom.net>

* Rename old pinmux and new pinctrl platform driver and DT match table
  entries, so the new driver gets instantiated.
* Re-write board-pinmux.c, so that it uses pinctrl APIs to configura the
  pinmux.
* Re-write board-*-pinmux.c so that the pinmux configuration tables are
  in pinctrl format.

Ventana's pin mux table needed some edits on top of the basic format
conversion, since some mux options that were previously marked as
reserved are now valid in the new pinctrl driver. Attempting to use the
old reserved names will result in a failure. Specifically, groups lpw0,
lpw2, lsc1, lsck, and lsda were changed from function rsvd4 to displaya,
and group pta was changed from function rsvd2 to hdmi.

All boards' pin mux tables needed some edits on top of the based format
conversion, since function i2c was split into i2c1 (first general I2C
controller) and i2cp (power I2C controller) to better align function
definitions with HW blocks.

Due to the split of mux tables into pure mux and pull/tristate tables,
many entries in the separate Seaboard/Ventana tables could be merged
into the common table, since the entries differed only in the portion
in one of the tables, not both.

Most pin groups allow configuration of mux, tri-state, and pull. However,
some don't allow pull configuration, which is instead configured by new
groups that only allow pull configuration. This is a reflection of the
true HW capabilities, which weren't fully represented by the old pinmux
driver. This required adding new pull table entries for those new groups,
and setting many other entries' pull configuration to
TEGRA_PINCONFIG_DONT_SET.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NOlof Johansson <olof@lixom.net>

Recent pinctrl discussions concluded that gpiolib APIs should in fact do
whatever is required to mux a GPIO onto pins, by calling pinctrl APIs if
required. This change implements this for the Tegra GPIO driver, and removes
calls to the Tegra-specific APIs from drivers and board files.

Cc: Chris Ball <cjb@laptop.org>
Cc: linux-mmc@vger.kernel.org
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: Chris Ball <cjb@laptop.org> # for sdhci-tegra.c
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NOlof Johansson <olof@lixom.net>

Don't call gpio_request() or gpio_direction_input() for ISL29018_IRQ.
This pin is only used as an IRQ, and hence no GPIO configuration should
be necessary; the GPIO/IRQ driver should (and does) perform any required
setup when the IRQ is requested.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NOlof Johansson <olof@lixom.net>

Instead of having board files manually request and initialize USB VBUS
GPIOs, fill in the USB driver's platform data and have it do it.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NOlof Johansson <olof@lixom.net>

Add a vbus_gpio field to platform data. This mirrors the device tree
property nvidia,vbus-gpio. This makes the VBUS GPIO handling identical
between booting with board files and device tree; the driver always does
it.

This removes the need for board files to request and initialize the GPIO
early during their boot process, perhaps even before the GPIO driver is
ready to process the request.

Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: linux-usb@vger.kernel.org
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NOlof Johansson <olof@lixom.net>

The declarations are actually required for the device
definitions, and are still valid even if the dma controller
is disabled:

arch/arm/mach-tegra/devices.c:559:12: error: 'TEGRA_DMA_REQ_SEL_I2S_1' undeclared here (not in a function)
arch/arm/mach-tegra/devices.c:577:12: error: 'TEGRA_DMA_REQ_SEL_I2S2_1' undeclared here (not in a function)
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NAlan Ott <alan@signal11.us>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

arch/arm/mach-tegra/board-dt-tegra20.c: included 'asm/hardware/gic.h'
twice remove the duplicates.
Signed-off-by: NDanny Kukawka <danny.kukawka@bisect.de>
[swarren: rewrote commit subject]
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Tegra has 5 UARTS which could be used for low-level debug output. Commit
fe263989 "ARM: tegra: uncompress.h: Choose a UART at runtime" implemented
one method for the kernel to automatically determine which of these to
use at run-time, so that the same DEBUG_LL-enabled kernel image could be
used across multiple Tegra boards. The required bootloader-side setup for
that option is implemented in NVIDIA's various downstream U-Boot branches,
but the U-Boot maintainers have refused to accept it upstream.

This change implements an alternative automatic UART selection option
using ODMDATA. This is a 32-bit value programmed into Tegra's boot memory
which provides a few pieces of basic board-specific information, including
a field that indicates the console UART. Setting up this value is part of
the standard Tegra boot architecture, and so requires no Tegra-specific
hacks in the bootloader's UART driver.

Note that in theory, the format of ODMDATA is board-specific. However, in
practice all boards use the same location/size/values for the UART field.
ODMDATA[19:18] (which drive the type of debug console) is more problematic,
since some boards use value 2 for UART and others use 3. This patch just
accepts either value; if this doesn't work well for a given board, I'd
suggest simply not enabling this debug option when building for that board.

Note that the kernel assumes the bootloader has already set up any required
pinmux settings for the UART; there is no way the kernel can do this for
itself prior to knowing which board it's running on. In practice, people
using this feature are highly likely to be using bootloaders that have
indeed configured the pinmux. This assumption existed prior to this patch.
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Rename Tegra20-specific Kconfig variables, module filenames, all internal
symbol names, clocks, and platform devices, to reflect the fact the DAS
and I2S drivers are for a specific HW version.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

tegra_pcm_device is no longer needed now that the Tegra ASoC code has
cleaned up its 'platform' registration. Remove it.
Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Disintegrate asm/system.h for ARM.
Signed-off-by: NDavid Howells <dhowells@redhat.com>
cc: Russell King <linux@arm.linux.org.uk>
cc: linux-arm-kernel@lists.infradead.org

Avoid namespace conflicts with drivers over the CP15 definitions by
moving CP15 related prototypes and definitions to a private header
file.
Acked-by: NStephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com> [Tegra]
Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Tested-by: H Hartley Sweeten <hsweeten@visionengravers.com> [EP93xx]
Acked-by: NNicolas Pitre <nico@linaro.org>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NDavid Howells <dhowells@redhat.com>

Commit 6f6f6a70 "ARM: create a common IOMEM definition" moved macro
IOMEM(), and requires users to include <asm/assembler.h>. Fix Tegra's
sleep.S to do so. This fixes:

arch/arm/mach-tegra/sleep.S: Assembler messages:
arch/arm/mach-tegra/sleep.S:77: Error: missing ')'
arch/arm/mach-tegra/sleep.S:77: Error: garbage following instruction
    -- `movw r0,#:lower16:(0x60007000-0x60000000+IOMEM(0xFE200000))'

Note: This only shows up after 0a258935 "ARM: tegra: update defconfig"
Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>