1. 18 3月, 2009 3 次提交
    • S
      x86, x2apic: cleanup the IO-APIC level migration with interrupt-remapping · 0280f7c4
      Suresh Siddha 提交于
      Impact: simplification
      
      In the current code, for level triggered migration, we need to modify the
      io-apic RTE with the update vector information, along with modifying interrupt
      remapping table entry(IRTE) with vector and destination. This is to ensure that
      remote IRR bit inthe IOAPIC RTE gets cleared when the cpu does EOI.
      
      With this patch, for level triggered, we eliminate the io-apic RTE modification
      (with the updated vector information), by using a virtual vector (io-apic pin
      number).  Real vector that is used for interrupting cpu will be coming from
      the interrupt-remapping table entry. Trigger mode in the IRTE will always be
      edge, and the actual level or edge trigger will be setup in the IO-APIC RTE.
      So a level triggered interrupt will appear as an edge to the local apic
      cpu but still as level to the IO-APIC.
      
      With this change, level irq migration can be done by simply modifying
      the interrupt-remapping table entry with out changing the io-apic RTE.
      And as the interrupt appears as edge at the cpu, in addition to do the
      local apic EOI, we need to do IO-APIC directed EOI to clear the remote
      IRR bit in  the IO-APIC RTE.
      
      This simplies the irq migration in the presence of interrupt-remapping.
      Idea-by: NRajesh Sankaran <rajesh.sankaran@intel.com>
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Cc: Eric W. Biederman <ebiederm@xmission.com>
      Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      0280f7c4
    • S
      x86, x2apic: use virtual wire A mode in disable_IO_APIC() with interrupt-remapping · 7c6d9f97
      Suresh Siddha 提交于
      Impact: make kexec work with x2apic
      
      disable_IO_APIC() gets called during crashdump aswell, which configures the
      IO-APIC/LAPIC so that legacy interrupts can be delivered for the kexec'd kernel.
      
      In the presence of interrupt-remapping, we need to change the
      interrupt-remapping configuration aswell as modifying IO-APIC for virtual wire
      B mode.
      
      To keep things simple during the crash, use virtual wire A mode
      (for which we don't need to touch io-apic and interrupt-remapping tables).
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Cc: Eric W. Biederman <ebiederm@xmission.com>
      Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      7c6d9f97
    • S
      x86, x2apic: enable fault handling for intr-remapping · 9d783ba0
      Suresh Siddha 提交于
      Impact: interface augmentation (not yet used)
      
      Enable fault handling flow for intr-remapping aswell. Fault handling
      code now shared by both dma-remapping and intr-remapping.
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      9d783ba0
  2. 18 2月, 2009 2 次提交
  3. 16 2月, 2009 1 次提交
  4. 15 2月, 2009 1 次提交
  5. 10 2月, 2009 1 次提交
  6. 09 2月, 2009 5 次提交
    • Y
      x86: find nr_irqs_gsi with mp_ioapic_routing · 3f4a739c
      Yinghai Lu 提交于
      Impact: find right nr_irqs_gsi on some systems.
      
      One test-system has gap between gsi's:
      
      [    0.000000] ACPI: IOAPIC (id[0x04] address[0xfec00000] gsi_base[0])
      [    0.000000] IOAPIC[0]: apic_id 4, version 0, address 0xfec00000, GSI 0-23
      [    0.000000] ACPI: IOAPIC (id[0x05] address[0xfeafd000] gsi_base[48])
      [    0.000000] IOAPIC[1]: apic_id 5, version 0, address 0xfeafd000, GSI 48-54
      [    0.000000] ACPI: IOAPIC (id[0x06] address[0xfeafc000] gsi_base[56])
      [    0.000000] IOAPIC[2]: apic_id 6, version 0, address 0xfeafc000, GSI 56-62
      ...
      [    0.000000] nr_irqs_gsi: 38
      
      So nr_irqs_gsi is not right. some irq for MSI will overwrite with io_apic.
      
      need to get that with acpi_probe_gsi when acpi io_apic is used
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      3f4a739c
    • Y
      x86: find nr_irqs_gsi with mp_ioapic_routing · cc6c5006
      Yinghai Lu 提交于
      Impact: find right nr_irqs_gsi on some systems.
      
      One test-system has gap between gsi's:
      
      [    0.000000] ACPI: IOAPIC (id[0x04] address[0xfec00000] gsi_base[0])
      [    0.000000] IOAPIC[0]: apic_id 4, version 0, address 0xfec00000, GSI 0-23
      [    0.000000] ACPI: IOAPIC (id[0x05] address[0xfeafd000] gsi_base[48])
      [    0.000000] IOAPIC[1]: apic_id 5, version 0, address 0xfeafd000, GSI 48-54
      [    0.000000] ACPI: IOAPIC (id[0x06] address[0xfeafc000] gsi_base[56])
      [    0.000000] IOAPIC[2]: apic_id 6, version 0, address 0xfeafc000, GSI 56-62
      ...
      [    0.000000] nr_irqs_gsi: 38
      
      So nr_irqs_gsi is not right. some irq for MSI will overwrite with io_apic.
      
      need to get that with acpi_probe_gsi when acpi io_apic is used
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      cc6c5006
    • Y
      x86: check_timer cleanup · f72dccac
      Yinghai Lu 提交于
      Impact: make check-timer more robust potentially solve boot fragility
      
      For edge trigger io-apic routing, we already unmasked the pin via
      setup_IO_APIC_irq(), so don't unmask it again.
      
      Also call local_irq_disable() between timer_irq_works(), because it
      calls local_irq_enable() inside.
      
      Also remove not needed apic version reading for 64-bit
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      f72dccac
    • Y
      x86: use NR_IRQS_LEGACY to replace 16 · abcaa2b8
      Yinghai Lu 提交于
      Impact: cleanup
      
      also could kill platform_legacy_irq
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      abcaa2b8
    • Y
      x86/irq: optimize nr_irqs · f1ee5548
      Yinghai Lu 提交于
      Impact: make nr_irqs depend more on cards used in a system
      
      depend on nr_irq_gsi more, and have a ratio for MSI.
      
      v2: make nr_irqs less than NR_VECTORS * nr_cpu_ids
          aka if only one cpu, we only can support nr_irqs = NR_VECTORS
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      f1ee5548
  7. 06 2月, 2009 1 次提交
  8. 01 2月, 2009 1 次提交
    • Y
      irq, x86: fix lock status with numa_migrate_irq_desc · 10b888d6
      Yinghai Lu 提交于
      Eric Paris reported:
      
      > I have an hp dl785g5 which is unable to successfully run
      > 2.6.29-0.66.rc3.fc11.x86_64 or 2.6.29-rc2-next-20090126.  During bootup
      > (early in userspace daemons starting) I get the below BUG, which quickly
      > renders the machine dead.  I assume it is because sparse_irq_lock never
      > gets released when the BUG kills that task.
      
      Adjust lock sequence when migrating a descriptor with
      CONFIG_NUMA_MIGRATE_IRQ_DESC enabled.
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      10b888d6
  9. 31 1月, 2009 1 次提交
  10. 29 1月, 2009 17 次提交
  11. 21 1月, 2009 1 次提交
  12. 19 1月, 2009 1 次提交
    • M
      x86: Remove never-called arch_setup_msi_irq() · 422e79a8
      Michael Ellerman 提交于
      Since commit 75c46fa6, "x64, x2apic/intr-remap: MSI and MSI-X
      support for interrupt remapping infrastructure", x86 has had an
      implementation of arch_setup_msi_irqs().
      
      That implementation does not call arch_setup_msi_irq(), instead it calls
      setup_irq(). No other x86 code calls arch_setup_msi_irq().
      
      That leaves only arch_setup_msi_irqs() in drivers/pci/msi.c, but that
      routine is overridden by the x86 version of arch_setup_msi_irqs().
      
      So arch_setup_msi_irq() is dead code, remove it.
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      422e79a8
  13. 15 1月, 2009 1 次提交
  14. 14 1月, 2009 2 次提交
  15. 13 1月, 2009 1 次提交
  16. 12 1月, 2009 1 次提交