- 14 8月, 2015 1 次提交
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由 Joerg Roedel 提交于
Symbol is only used in that file and can be static. Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 30 7月, 2015 1 次提交
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由 Joerg Roedel 提交于
Remove the AMD IOMMU driver implementation for passthrough mode and rely on the new iommu core features for that. Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 11 6月, 2015 2 次提交
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由 Joerg Roedel 提交于
This function can fail. Propagate any errors back to the initialization state machine. Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Joerg Roedel 提交于
Implement these two iommu-ops call-backs to make use of the initialization and notifier features of the iommu core. Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 24 4月, 2015 1 次提交
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由 Jiang Liu 提交于
Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com> Acked-by: NJoerg Roedel <jroedel@suse.de> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: David Cohen <david.a.cohen@linux.intel.com> Cc: Sander Eikelenboom <linux@eikelenboom.it> Cc: David Vrabel <david.vrabel@citrix.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: iommu@lists.linux-foundation.org Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Dimitri Sivanich <sivanich@sgi.com> Cc: Joerg Roedel <joro@8bytes.org> Link: http://lkml.kernel.org/r/1428905519-23704-12-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 04 2月, 2015 1 次提交
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由 Joerg Roedel 提交于
The AMD address is dead for a long time already, replace it with a working one. Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 23 1月, 2015 1 次提交
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由 Thomas Gleixner 提交于
Commit 7fa1c842 "iommu/irq_remapping: Change variable disable_irq_remap to be static" returns unconditionally success from the irq remapping prepare callback if the iommu can be initialized. The change assumed that iommu_go_to_state(IOMMU_ACPI_FINISHED) returns a failure if irq remapping is not enabled, but thats not the case. The function returns success when the iommu is initialized to the point which is required for remapping to work. The actual state of the irq remapping feature is reflected in the status variable amd_iommu_irq_remap, which is not considered in the return value. The fix is simple: If the iommu_go_to_state() returns success, evaluate the remapping state amd_iommu_irq_remap and reflect it in the return value. Fixes: 7fa1c842 iommu/irq_remapping: Change variable disable_irq_remap to be static Reported-and-tested-by: NBorislav Petkov <bp@alien8.de> Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Joerg Roedel <joro@8bytes.org>
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- 15 1月, 2015 3 次提交
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由 Jiang Liu 提交于
Change variable disable_irq_remap to be static and simplify the code. Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com> Tested-by: NJoerg Roedel <joro@8bytes.org> Cc: Tony Luck <tony.luck@intel.com> Cc: iommu@lists.linux-foundation.org Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Link: http://lkml.kernel.org/r/1420615903-28253-16-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Jiang Liu 提交于
Simplify irq_remapping code by killing irq_remapping_supported() and related interfaces. Joerg posted a similar patch at https://lkml.org/lkml/2014/12/15/490, so assume an signed-off from Joerg. Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de> Tested-by: NJoerg Roedel <joro@8bytes.org> Cc: Tony Luck <tony.luck@intel.com> Cc: iommu@lists.linux-foundation.org Cc: H. Peter Anvin <hpa@linux.intel.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: David Rientjes <rientjes@google.com> Cc: HATAYAMA Daisuke <d.hatayama@jp.fujitsu.com> Cc: Jan Beulich <JBeulich@suse.com> Cc: Richard Weinberger <richard@nod.at> Cc: Oren Twaig <oren@scalemp.com> Link: http://lkml.kernel.org/r/1420615903-28253-14-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Joerg Roedel 提交于
This allows to get rid of the irq_remapping_supported() function and all its call-backs into the Intel and AMD IOMMU drivers. Signed-off-by: NJoerg Roedel <jroedel@suse.de> Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com> Tested-by: NJoerg Roedel <joro@8bytes.org> Cc: Tony Luck <tony.luck@intel.com> Cc: iommu@lists.linux-foundation.org Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Link: http://lkml.kernel.org/r/1420615903-28253-13-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 26 9月, 2014 1 次提交
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由 Joerg Roedel 提交于
When the device id for an IOAPIC is overridden on the kernel command line, the iommu driver has to make sure it sets up a DTE for this device id. Reported-by: NSu Friendy <friendy.su@sony.com.cn> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 04 7月, 2014 1 次提交
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由 Alex Williamson 提交于
AMD-Vi support for IOMMU sysfs. This allows us to associate devices with a specific IOMMU device and examine the capabilities and features of that IOMMU. The AMD IOMMU is hosted on and actual PCI device, so we make that device the parent for the IOMMU class device. This initial implementaiton exposes only the capability header and extended features register for the IOMMU. # find /sys | grep ivhd /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0 /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:00.0 /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:02.0 /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:04.0 /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:09.0 /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:11.0 /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:12.0 /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:12.2 /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/devices/0000:00:13.0 ... /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/power /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/power/control ... /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/device /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/subsystem /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/amd-iommu /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/amd-iommu/cap /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/amd-iommu/features /sys/devices/pci0000:00/0000:00:00.2/iommu/ivhd0/uevent /sys/class/iommu/ivhd0 Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 13 5月, 2014 1 次提交
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由 Su Friendy 提交于
set_device_exclusion_range(u16 devid, struct ivmd_header *m) enables exclusion range for ONE device. IOMMU does not translate the access to the exclusion range from the device. The device is specified by input argument 'devid'. But 'devid' is not passed to the actual set function set_dev_entry_bit(), instead 'm->devid' is passed. 'm->devid' does not specify the exact device which needs enable the exclusion range. 'm->devid' represents DeviceID field of IVMD, which has different meaning depends on IVMD type. The caller init_exclusion_range() sets 'devid' for ONE device. When m->type is equal to ACPI_IVMD_TYPE_ALL or ACPI_IVMD_TYPE_RANGE, 'm->devid' is not equal to 'devid'. This patch fixes 'm->devid' to 'devid'. Signed-off-by: NSu Friendy <friendy.su@sony.com.cn> Signed-off-by: NTamori Masahiro <Masahiro.Tamori@jp.sony.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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- 24 3月, 2014 1 次提交
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由 Suravee Suthikulpanit 提交于
In reality, the spec can only support 16-bit PASID since INVALIDATE_IOTLB_PAGES and COMPLETE_PPR_REQUEST commands only allow 16-bit PASID. So, we updated the PASID_MASK accordingly and invoke BUG_ON if the hardware is reporting PASmax more than 16-bit. Besides, max PASID is defined as ((2^(PASmax+1)) - 1). The current does not determine this correctly. Signed-off-by: NSuravee Suthikulpanit <suravee.suthikulpanit@amd.com> Tested-by: NJay Cornwall <Jay.Cornwall@amd.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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- 07 12月, 2013 1 次提交
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由 Lv Zheng 提交于
Replace direct inclusions of <acpi/acpi.h>, <acpi/acpi_bus.h> and <acpi/acpi_drivers.h>, which are incorrect, with <linux/acpi.h> inclusions and remove some inclusions of those files that aren't necessary. First of all, <acpi/acpi.h>, <acpi/acpi_bus.h> and <acpi/acpi_drivers.h> should not be included directly from any files that are built for CONFIG_ACPI unset, because that generally leads to build warnings about undefined symbols in !CONFIG_ACPI builds. For CONFIG_ACPI set, <linux/acpi.h> includes those files and for CONFIG_ACPI unset it provides stub ACPI symbols to be used in that case. Second, there are ordering dependencies between those files that always have to be met. Namely, it is required that <acpi/acpi_bus.h> be included prior to <acpi/acpi_drivers.h> so that the acpi_pci_root declarations the latter depends on are always there. And <acpi/acpi.h> which provides basic ACPICA type declarations should always be included prior to any other ACPI headers in CONFIG_ACPI builds. That also is taken care of including <linux/acpi.h> as appropriate. Signed-off-by: NLv Zheng <lv.zheng@intel.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Matthew Garrett <mjg59@srcf.ucam.org> Cc: Tony Luck <tony.luck@intel.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> (drivers/pci stuff) Acked-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> (Xen stuff) Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 14 8月, 2013 1 次提交
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由 Yijing Wang 提交于
PCI core will initialize device MSI/MSI-X capability in pci_msi_init_pci_dev(). So device driver should use pci_dev->msi_cap/msix_cap to determine whether the device support MSI/MSI-X instead of using pci_find_capability(pci_dev, PCI_CAP_ID_MSI/MSIX). Access to PCIe device config space again will consume more time. Signed-off-by: NYijing Wang <wangyijing@huawei.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: iommu@lists.linux-foundation.org Cc: linux-kernel@vger.kernel.org Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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- 19 6月, 2013 1 次提交
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由 Steven L Kinney 提交于
Add functionality to check the availability of the AMD IOMMU Performance Counters and export this functionality to other core drivers, such as in this case, a perf AMD IOMMU PMU. This feature is not bound to any specific AMD family/model other than the presence of the IOMMU with P-C enabled. The AMD IOMMU P-C support static counting only at this time. Signed-off-by: NSteven Kinney <steven.kinney@amd.com> Signed-off-by: NSuravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: NPeter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/1370466709-3212-2-git-send-email-suravee.suthikulpanit@amd.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
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- 23 4月, 2013 2 次提交
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由 Wei Yongjun 提交于
Fix to return -ENOMEM int the memory alloc error handling case instead of 0, as done elsewhere in this function. Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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由 Suravee Suthikulpanit 提交于
In the current interrupt handling scheme, there are as many threads as the number of IOMMUs. Each thread is created and assigned to an IOMMU at the time of registering interrupt handlers (request_threaded_irq). When an IOMMU HW generates an interrupt, the irq handler (top half) wakes up the corresponding thread to process event and PPR logs of all IOMMUs starting from the 1st IOMMU. In the system with multiple IOMMU,this handling scheme complicates the synchronization of the IOMMU data structures and status registers as there could be multiple threads competing for the same IOMMU while the other IOMMU could be left unhandled. To simplify, this patch is proposing a different interrupt handling scheme by having each thread only managing interrupts of the corresponding IOMMU. This can be achieved by passing the struct amd_iommu when registering the interrupt handlers. This structure is unique for each IOMMU and can be used by the bottom half thread to identify the IOMMU to be handled instead of calling for_each_iommu. Besides this also eliminate the needs to lock the IOMMU for processing event and PPR logs. Signed-off-by: NSuravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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- 20 4月, 2013 5 次提交
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由 Joerg Roedel 提交于
When the IVRS entries for IOAPIC and HPET are overridden on the kernel command line, a problem detected in the check function might not be a firmware bug anymore. So disable the firmware bug reporting if the user provided valid ivrs_ioapic or ivrs_hpet entries on the command line. Reviewed-by: NShuah Khan <shuahkhan@gmail.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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由 Joerg Roedel 提交于
Add two new kernel commandline parameters ivrs_ioapic and ivrs_hpet to override the Id->DeviceId mapping from the IVRS ACPI table. This can be used to work around broken BIOSes to get interrupt remapping working on AMD systems. Tested-by: NBorislav Petkov <bp@suse.de> Tested-by: NSuravee Suthikulanit <suravee.suthikulpanit@amd.com> Reviewed-by: NShuah Khan <shuahkhan@gmail.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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由 Joerg Roedel 提交于
This is needed in a later patch were ioapic_map and hpet_map entries are created before the slab allocator is initialized (and thus add_special_device() can't be used). Reviewed-by: NShuah Khan <shuahkhan@gmail.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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由 Joerg Roedel 提交于
This patch extends the devid_map data structure to allow ioapic and hpet entries in ivrs to be overridden on the kernel command line. Reviewed-by: NShuah Khan <shuahkhan@gmail.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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由 Joerg Roedel 提交于
The function is only called by other __init functions, so it can be moved to __init too. Reviewed-by: NShuah Khan <shuahkhan@gmail.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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- 27 3月, 2013 2 次提交
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由 Shuah Khan 提交于
Change to remove calc_devid() and use PCI_DEVID() from PCI instead. Signed-off-by: NShuah Khan <shuah.khan@hp.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NJoerg Roedel <joro@8bytes.org>
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由 Shuah Khan 提交于
Change to remove local PCI_BUS() define and use the new PCI_BUS_NUM() interface from PCI. Signed-off-by: NShuah Khan <shuah.khan@hp.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NJoerg Roedel <joro@8bytes.org>
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- 10 3月, 2013 1 次提交
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由 Nikola Pajkovsky 提交于
commit 318fe782 ("IOMMU, AMD Family15h Model10-1Fh erratum 746 Workaround") added amd_iommu_erratum_746_workaround and it's marked as __init, which is wrong WARNING: drivers/iommu/built-in.o(.text+0x639c): Section mismatch in reference from the function iommu_init_pci() to the function .init.text:amd_iommu_erratum_746_workaround() The function iommu_init_pci() references the function __init amd_iommu_erratum_746_workaround(). This is often because iommu_init_pci lacks a __init annotation or the annotation of amd_iommu_erratum_746_workaround is wrong. Signed-off-by: NNikola Pajkovsky <npajkovs@redhat.com> Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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- 08 2月, 2013 1 次提交
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由 Joerg Roedel 提交于
When dma_ops are initialized the unity mappings are created. The init_device_table_dma() function makes sure DMA from all devices is blocked by default. This opens a short window in time where DMA to unity mapped regions is blocked by the IOMMU. Make sure this does not happen by initializing the device table after dma_ops. Cc: stable@vger.kernel.org Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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- 28 1月, 2013 1 次提交
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由 Suravee Suthikulpanit 提交于
The IOMMU may stop processing page translations due to a perceived lack of credits for writing upstream peripheral page service request (PPR) or event logs. If the L2B miscellaneous clock gating feature is enabled the IOMMU does not properly register credits after the log request has completed, leading to a potential system hang. BIOSes are supposed to disable L2B micellaneous clock gating by setting L2_L2B_CK_GATE_CONTROL[CKGateL2BMiscDisable](D0F2xF4_x90[2]) = 1b. This patch corrects that for those which do not enable this workaround. Signed-off-by: NSuravee Suthikulpanit <suravee.suthikulpanit@amd.com> Acked-by: NBorislav Petkov <bp@suse.de> Cc: stable@vger.kernel.org Signed-off-by: NJoerg Roedel <joro@8bytes.org>
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- 16 10月, 2012 1 次提交
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由 Joerg Roedel 提交于
On some systems the BIOS puts the wrong device-id for the IO-APIC into the IVRS table. The result is that interrupt remapping is not working for the IO-APIC irqs. This usually means a kernel panic at boot because the timer is not working. Fix this kernel panic by disabling interrupt remapping if this problem is discovered in the IVRS table. Reported-by: NAndrew Oakley <andrew@ado.is-a-geek.net> Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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- 28 9月, 2012 10 次提交
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由 Joerg Roedel 提交于
Print an indicator to dmesg to easily find out if interrupt remapping is enabled of a given system. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
Do not deinitialize the AMD IOMMU driver completly when interrupt remapping is already in use but the initialization of the DMA layer fails for some reason. Make sure the IOMMU can still be used to remap interrupts. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
Add the six routines required to setup interrupt remapping with the AMD IOMMU. Also put it all together into the AMD specific irq_remap_ops. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
The IVRS table usually includes the IOMMU device. But the IOMMU does never translate itself, so make sure the IOMMU driver knows this. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
When the IOMMU is enabled very early (as with irq-remapping) some devices are still in BIOS hand. When dma is blocked early this can cause lots of IO_PAGE_FAULTs. So delay the DMA initialization and do it right before the dma_ops are initialized. To be secure, block all interrupts by default when irq-remapping is enabled in the system. They will be reenabled on demand later. Without blocking interrupts by default devices can issue arbitrary interrupts by sending special DMA packets to the CPU that look like MSI messages. This is especially dangerous when a device is assigned to a KVM guest because the guest can then DoS the host. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
When the IOAPIC information provided in the IVRS table is not correct or not complete the system may not boot at all when interrupt remapping is enabled. So check if this information is correct and print out a firmware bug message when it is not. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
To easily map device ids to interrupt remapping table entries a new lookup table is necessary. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
The irq remapping tables for the AMD IOMMU need to be aligned on a 128 byte boundary. Create a seperate slab-cache to guarantee this alignment. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
The IVRS ACPI table provides information about the IOAPICs and the HPETs available in the system and which PCI device ID they use in transactions. Save that information for later usage in interrupt remapping. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com> Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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由 Borislav Petkov 提交于
When the AMD IOMMU doesn't have extended features, an empty line gets issued in dmesg like so: [ 3.061417] AMD-Vi: Found IOMMU at 0000:00:00.2 cap 0x40 [ 3.066757] <--- [ 3.068294] pci 0000:00:00.2: irq 72 for MSI/MSI-X [ 3.081213] AMD-Vi: Lazy IO/TLB flushing enabled Fix it. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com> Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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