This patch initializes the correct SDRC settings required
for DVFS on Zoom2.
Signed-off-by: NTeerth Reddy <teerth@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Otherwise we'll get compile errors like:

arch/arm/plat-omap/include/mach/keypad.h:38:1: warning: "KEY" redefined
arch/arm/plat-omap/include/mach/keypad.h:39:1: warning: "PERSISTENT_KEY" redefined
...
Signed-off-by: NTony Lindgren <tony@atomide.com>

Most board-*.c files read configuration data from the bootloader in
their .init_machine() function.  This needs to happen earlier, at some
point before omap2_init_common_hw() is called.  This is because a
future patch will use the bootloader serial console port information
to enable the UART clocks earlier, immediately after omap2_clk_init().
This is in turn necessary since otherwise clock tree usecounts on
clocks like dpll4_m2x2_ck will be bogus, which can cause the
currently-active console UART clock to be disabled during boot.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Add TWL4030 CORE and TWL4030 drivers to Zoom2 board file
TWL drivers enabled are:
	bci
	madc
	usb
	keypad
	mmc
Signed-off-by: NVikram Pandita <vikram.pandita@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

OMAP tags are deprecrated so drop them.

Drop UART config data which decides which UARTs to enable during boot.
This is no longer necessary since serial core code disables clocks
after inactivity.

Background: with new UART idle code, all on-chip UARTs are idled using
a configurable inactivity timer (default 5 seconds.)  After the
inactivity timer, UART clocks are disabled automatically.
Signed-off-by: NKalle Valo <kalle.valo@iki.fi>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Some OMAP3 boards (Beagle Cx, Overo, RX51, Pandora) have 2
SDRAM parts connected to the SDRC.

This patch adds the following:
- add a new argument of type omap_sdrc_params struct*
to omap2_init_common_hw and omap2_sdrc_init for the 2nd CS params
- adapted the OMAP boards files to the new prototype of
omap2_init_common_hw
- add the SDRC 2nd CS registers offsets defines
- adapt the sram sleep code to configure the SDRC for the 2nd CS

Note: If the 2nd param to omap2_init_common_hw is NULL, then the
parameters are not programmed into the SDRC CS1 registers

Tested on 3430 SDP and Beagleboard rev C2 and B5, with
suspend/resume and frequency changes (cpufreq).
Signed-off-by: NJean Pihet <jpihet@mvista.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

This patch creates the minimal OMAP3 Zoom2 board support.
Signed-off-by: NMikkel Christensen <mlc@ti.com>
Signed-off-by: NVikram Pandita <vikram.pandita@ti.com>
Acked-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>