1. 18 3月, 2020 12 次提交
    • M
      arm64: KVM: Consistently advance singlestep when emulating instructions · 02107bfd
      Mark Rutland 提交于
      commit bd7d95cafb499e24903b7d21f9eeb2c5208160c2 upstream.
      
      When we emulate a guest instruction, we don't advance the hardware
      singlestep state machine, and thus the guest will receive a software
      step exception after a next instruction which is not emulated by the
      host.
      
      We bodge around this in an ad-hoc fashion. Sometimes we explicitly check
      whether userspace requested a single step, and fake a debug exception
      from within the kernel. Other times, we advance the HW singlestep state
      rely on the HW to generate the exception for us. Thus, the observed step
      behaviour differs for host and guest.
      
      Let's make this simpler and consistent by always advancing the HW
      singlestep state machine when we skip an instruction. Thus we can rely
      on the hardware to generate the singlestep exception for us, and never
      need to explicitly check for an active-pending step, nor do we need to
      fake a debug exception from the guest.
      
      Cc: Peter Maydell <peter.maydell@linaro.org>
      Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
      Reviewed-by: NChristoffer Dall <christoffer.dall@arm.com>
      Signed-off-by: NMark Rutland <mark.rutland@arm.com>
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: NShannon Zhao <shannon.zhao@linux.alibaba.com>
      Reviewed-by: NZou Cao <zoucao@linux.alibaba.com>
      02107bfd
    • G
      spi: Add missing error handling for CS GPIOs · 8d23e73f
      Geert Uytterhoeven 提交于
      [ Upstream commit 1723fdec5fcbc4de3d26bbb23a9e1704ee258955 ]
      
      While devm_gpiod_get_index_optional() returns NULL if the GPIO is not
      present (i.e. -ENOENT), it may still return other error codes, like
      -EPROBE_DEFER.  Currently these are not handled, leading to
      unrecoverable failures later in case of probe deferral:
      
          gpiod_set_consumer_name: invalid GPIO (errorpointer)
          gpiod_direction_output: invalid GPIO (errorpointer)
          gpiod_set_value_cansleep: invalid GPIO (errorpointer)
          gpiod_set_value_cansleep: invalid GPIO (errorpointer)
          gpiod_set_value_cansleep: invalid GPIO (errorpointer)
      
      Detect and propagate errors to fix this.
      
      Fixes: f3186dd876697e69 ("spi: Optionally use GPIO descriptors for CS GPIOs")
      Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      Signed-off-by: NSasha Levin <sashal@kernel.org>
      Signed-off-by: NZou Cao <zoucao@linux.alibaba.com>
      Reviewed-by: NBaoyou Xie <xie.baoyou@linux.alibaba.com>
      8d23e73f
    • L
      spi: cadence: Fix default polarity of native chipselect · a190de9d
      Linus Walleij 提交于
      The Cadence controller also supports platforms specifying
      native chipselects. When I enforce the use of high CS
      for drivers opting in for using GPIO descriptors, I
      inadvertedly switched the driver to also use active
      high chip select for native chip selects.
      
      Fix this by inverting the logic in the callback for the
      native chip select. Rename the parameter from "is_high"
      (which is interpreted as being high when 0, which is
      confusing, I will not make any drug-related jokes here)
      to "enabled" which is more intuitive, especially now that
      it is true when CS is supposed to be enabled.
      
      Cc: Wei Yongjun <weiyongjun1@huawei.com>
      Fixes: cfeefa79dc37 ("spi: cadence: Convert to use CS GPIO descriptors")
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      Signed-off-by: NZou Cao <zoucao@linux.alibaba.com>
      Reviewed-by: NBaoyou Xie <xie.baoyou@linux.alibaba.com>
      a190de9d
    • L
      spi: dw: Fix default polarity of native chipselect · eaf88d30
      Linus Walleij 提交于
      The DW controller also supports platforms specifying
      native chipselects. When I enforce the use of high CS
      for drivers opting in for using GPIO descriptors, I
      inadvertedly switched the driver to also use active
      high chip select for native chip selects.
      
      As it turns out, the DW hardware driving chip selects
      also thinks it is weird with active low chip selects
      so all we need to do is remove an inversion in the
      driver.
      
      Cc: Jan Kotas <jank@cadence.com>
      Reported-by: NJan Kotas <jank@cadence.com>
      Tested-by: NJan Kotas <jank@cadence.com>
      Fixes: 9400c41e77b8 ("spi: dw: Convert to use CS GPIO descriptors")
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      Signed-off-by: NZou Cao <zoucao@linux.alibaba.com>
      Reviewed-by: NBaoyou Xie <xie.baoyou@linux.alibaba.com>
      eaf88d30
    • L
      spi: Support high CS when using descriptors · 0eb44b65
      Linus Walleij 提交于
      All controllers using GPIO descriptors can by definition
      support high CS connections, so just enforce this when
      registering an SPI controller.
      
      This fixes a regression where controllers were missing
      SPI_CS_HIGH, the drivers would fail like this:
      
      spi spi0.0: setup: unsupported mode bits 4
      cdns-spi fd0b0000.spi: can't setup spi0.0, status -22
      
      This is because as using descriptors moves the CS inversion
      logic over to gpiolib, all such controllers are registered
      with CS active high.
      
      Cc: Jan Kotas <jank@cadence.com>
      Reported-by: NJan Kotas <jank@cadence.com>
      Tested-by: NJan Kotas <jank@cadence.com>
      Fixes: f3186dd87669 ("spi: Optionally use GPIO descriptors for CS GPIOs")
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      Signed-off-by: NZou Cao <zoucao@linux.alibaba.com>
      Reviewed-by: NBaoyou Xie <xie.baoyou@linux.alibaba.com>
      0eb44b65
    • L
      spi: dw: Convert to use CS GPIO descriptors · cefd01bc
      Linus Walleij 提交于
      commit 9400c41e77b8f1f9c711b08a6c79bdbc5681fb00 upstream
      
      This converts the DesignWare (dw) SPI master driver to
      use GPIO descriptors for chip select handling.
      
      This driver has a duplicate DT parser in addition to the
      one in the core, sets up the line as non-asserted and
      relies on the core to drive the GPIOs.
      
      It is a pretty straight-forward conversion.
      
      Cc: Talel Shenhar <talel@amazon.com>
      Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
      Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
      Cc: Linuxarm <linuxarm@huawei.com>
      Tested-by: NJay Fang <f.fangjian@huawei.com>
      Reviewed-by: NAlexandre Belloni <alexandre.belloni@bootlin.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      Signed-off-by: NZou Cao <zoucao@alibaba.linux.com>
      Reviewed-by: NBaoyou Xie <xie.baoyou@linux.alibaba.com>
      cefd01bc
    • L
      spi: davinci: Convert to use CS GPIO descriptors · 9d887e90
      Linus Walleij 提交于
      commit 101a68e74fe089b975c407f1bc9359882b05489a upstream
      
      This converts the DaVinci SPI master driver to use GPIO
      descriptors for chip select handling.
      
      DaVinci parses the device tree a second time for the chip
      select GPIOs (no relying on the parsing already happening
      in the SPI core) and handles inversion semantics locally.
      
      We simply drop the extra parsing and set up and move the
      CS handling to the core and gpiolib. The fact that the
      driver is actively driving the GPIO in the
      davinci_spi_chipselect() callback is confusing since the
      host does not set SPI_MASTER_GPIO_SS so this should not
      ever get called when using GPIO CS. I put in a comment
      about this.
      
      This driver also supports instantiation from board files,
      but these are all using native chip selects so no problem
      with GPIO lines here.
      
      Cc: David Lechner <david@lechnology.com>
      Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
      Cc: Linuxarm <linuxarm@huawei.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      Signed-off-by: NZou Cao <zoucao@linux.alibaba.com>
      Reviewed-by: NBaoyou Xie <xie.baoyou@linux.alibaba.com>
      9d887e90
    • L
      spi: clps711x: Convert to use CS GPIO descriptors · 309d178f
      Linus Walleij 提交于
      commit 054320b25520ff3c2440f5d56233c8f672293b3c upstream
      
      This converts the CLPS711x SPI master driver to use GPIO
      descriptors for chip select handling.
      
      The CLPS711x driver was merely requesting the GPIO and
      setting the CS line non-asserted so this was a pretty
      straight-forward conversion. The setup callback goes away.
      
      Cc: Alexander Shiyan <shc_work@mail.ru>
      Cc: Linuxarm <linuxarm@huawei.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      Signed-off-by: NZou Cao <zoucao@linux.alibaba.com>
      Reviewed-by: NBaoyou Xie <xie.baoyou@linux.alibaba.com>
      309d178f
    • L
      spi: cadence: Convert to use CS GPIO descriptors · 0ac22fd7
      Linus Walleij 提交于
      commit cfeefa79dc37d378216e2ced1600e297dd04e591 upstream
      
      This converts the Cadence SPI master driver to use GPIO
      descriptors for chip select handling.
      
      The Cadence driver was allocating a state container just
      to hold the requested GPIO line and contained lots of
      polarity inversion code. As this is all handled by gpiolib
      and a simple devm_* request in the core, and as the driver
      is fully device tree only, most of this code chunk goes
      away in favour of central handling. The setup/cleanup
      callbacks goes away.
      
      This driver does NOT drive the CS line by setting the
      value of the GPIO so it relies on the SPI core to do
      this, which should work just fine with the descriptors.
      
      Cc: Wei Yongjun <weiyongjun1@huawei.com>
      Cc: Janek Kotas <jank@cadence.com>
      Cc: Linuxarm <linuxarm@huawei.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      Signed-off-by: NZou Cao <zoucao@linux.alibaba.com>
      Reviewed-by: NBaoyou Xie <xie.baoyou@linux.alibaba.com>
      0ac22fd7
    • L
      spi: atmel: Convert to use CS GPIO descriptors · a9d0ece2
      Linus Walleij 提交于
      commit efc92fbb876014c8efa4d90f4ac4b49569f0a84e upstream
      
      This converts the Atmel SPI master driver to use GPIO descriptors
      for chip select handling.
      
      The Atmel driver has duplicate code to look up and initialize CS
      GPIOs from the device tree, so this is removed. It further has code
      to retrieve a CS GPIO from .controller_data but this seems to be
      completely unused in the kernel (legacy codepath?) so I deleted
      this support. It keeps track of polarity when switching the CS, but
      this is not needed anymore since we moved this over to the gpiolib.
      
      The local handling of the "npcs_pin" (I guess this might mean
      "negative polarity chip select pin") is preserved, but I strongly
      suspect this can be switched over to handling by the core and
      using the SPI_MASTER_GPIO_SS flag on the master to assure that
      the additional CS handling in the driver is also done.
      
      Cc: Eugen Hristev <eugen.hristev@microchip.com>
      Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
      Cc: Radu Pirea <radu.pirea@microchip.com>
      Cc: Linuxarm <linuxarm@huawei.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      Signed-off-by: NZou Cao <zoucao@linux.alibaba.com>
      Reviewed-by: NBaoyou Xie <xie.baoyou@linux.alibaba.com>
      a9d0ece2
    • L
      spi: ath79: Convert to use CS GPIO descriptors · c9f247fa
      Linus Walleij 提交于
      commit 8db79547e79f6606b6d2d3b2bf6f36ec311195be upstream
      
      This converts the ATH79 SPI master driver to use GPIO descriptors
      for chip select handling.
      
      The ATH79 driver was requesting the GPIO and driving it from the
      bitbang .chipselect callback. Do not request it anymore as the SPI
      core will request it, remove the line inversion semantics for the
      GPIO case (handled by gpiolib) and let the SPI core deal with
      requesting the GPIO line from the device tree node of the controller.
      
      This driver can be instantiated from a board file (no device tree)
      but the board files only use native CS (no GPIO lines) so we should
      be fine just letting the SPI core grab the GPIO from the device.
      
      The fact that the driver is actively driving the GPIO in the
      ath79_spi_chipselect() callback is confusing since the host does
      not set SPI_MASTER_GPIO_SS so this should not ever get called when
      using GPIO CS. I put in a comment about this.
      
      Cc: Felix Fietkau <nbd@nbd.name>
      Cc: Alban Bedel <albeu@free.fr>
      Cc: Linuxarm <linuxarm@huawei.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      Signed-off-by: NZou Cao <zoucao@linux.alibaba.com>
      Reviewed-by: NBaoyou Xie <xie.baoyou@linux.alibaba.com>
      c9f247fa
    • L
      spi: Optionally use GPIO descriptors for CS GPIOs · 7bc17db3
      Linus Walleij 提交于
      commit f3186dd876697e696d07136623d5cf0a6fb0bc0f upstream
      
      This augments the SPI core to optionally use GPIO descriptors
      for chip select on a per-master-driver opt-in basis.
      
      Drivers using this will rely on the SPI core to look up
      GPIO descriptors associated with the device, such as
      when using device tree or board files with GPIO descriptor
      tables.
      
      When getting descriptors from the device tree, this will in
      turn activate the code in gpiolib that was
      added in commit 6953c57ab172
      ("gpio: of: Handle SPI chipselect legacy bindings")
      which means that these descriptors are aware of the active
      low semantics that is the default for SPI CS GPIO lines
      and we can assume that all of these are "active high" and
      thus assign SPI_CS_HIGH to all CS lines on the DT path.
      
      The previously used gpio_set_value() would call down into
      gpiod_set_raw_value() and ignore the polarity inversion
      semantics.
      
      It seems like many drivers go to great lengths to set up the
      CS GPIO line as non-asserted, respecting SPI_CS_HIGH. We pull
      this out of the SPI drivers and into the core, and by simply
      requesting the line as GPIOD_OUT_LOW when retrieveing it from
      the device and relying on the gpiolib to handle any inversion
      semantics. This way a lot of code can be simplified and
      removed in each converted driver.
      
      The end goal after dealing with each driver in turn, is to
      delete the non-descriptor path (of_spi_register_master() for
      example) and let the core deal with only descriptors.
      
      The different SPI drivers have complex interactions with the
      core so we cannot simply change them all over, we need to use
      a stepwise, bisectable approach so that each driver can be
      converted and fixed in isolation.
      
      This patch has the intended side effect of adding support for
      ACPI GPIOs as it starts relying on gpiod_get_*() to get
      the GPIO handle associated with the device.
      
      Cc: Linuxarm <linuxarm@huawei.com>
      Acked-by: NJonathan Cameron <jonathan.cameron@huawei.com>
      Tested-by: NFangjian (Turing) <f.fangjian@huawei.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      Signed-off-by: NZou Cao <zoucao@linux.alibaba.com>
      Reviewed-by: NBaoyou Xie <xie.baoyou@linux.alibaba.com>
      7bc17db3
  2. 17 1月, 2020 28 次提交