1. 22 6月, 2006 2 次提交
    • D
      [PATCH] PCI Bus Parity Status-broken hardware attribute, EDAC foundation · bd8481e1
      Doug Thompson 提交于
      Currently, the EDAC (error detection and correction) modules that are in
      the kernel contain some features that need to be moved. After some good
      feedback on the PCI Parity detection code and interface
      (http://www.ussg.iu.edu/hypermail/linux/kernel/0603.1/0897.html) this
      patch ADDs an new attribute to the pci_dev structure: Namely the
      'broken_parity_status' bit.
      
      When set this indicates that the respective hardware generates false
      positives of Parity errors.
      
      The EDAC "blacklist" solution was inferior and will be removed in a
      future patch.
      
      Also in this patch is a PCI quirk.c entry for an Infiniband PCI-X card
      which generates false positive parity errors.
      
      I am requesting comments on this AND on the possibility of a exposing
      this 'broken_parity_status' bit to userland via the PCI device sysfs
      directory for devices. This access would allow for enabling of this
      feature on new devices and for old devices that have their drivers
      updated. (SLES 9 SP3 did this on an ATI motherboard video device). There
      is a need to update such a PCI attribute between kernel releases.
      
      This patch just adds a storage place for the attribute and a quirk entry
      for a known bad PCI device. PCI Parity reaper/harvestor operations are
      in EDAC itself and will be refactored to use this PCI attribute instead
      of its own mechanisms (which are currently disabled) in the future.
      Signed-off-by: NDoug Thompson <norsk5@xmission.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      bd8481e1
    • K
      [PATCH] PCI: Add pci_assign_resource_fixed -- allow fixed address assignments · 75acfeca
      Kumar Gala 提交于
      PCI: Add pci_assign_resource_fixed -- allow fixed address assignments
      
      On some embedded systems the PCI address for hotplug devices are not only
      known a priori but are required to be at a given PCI address for other
      master in the system to be able to access.
      
      An example of such a system would be an FPGA which is setup from user space
      after the system has booted.  The FPGA may be access by DSPs in the system
      and those DSPs expect the FPGA at a fixed PCI address.
      
      Added pci_assign_resource_fixed() as a way to allow assignment of the PCI
      devices's BARs at fixed PCI addresses.
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      75acfeca
  2. 24 5月, 2006 1 次提交
  3. 29 4月, 2006 1 次提交
  4. 26 4月, 2006 1 次提交
  5. 15 4月, 2006 2 次提交
  6. 24 3月, 2006 3 次提交
  7. 01 2月, 2006 1 次提交
  8. 10 1月, 2006 3 次提交
  9. 11 11月, 2005 3 次提交
    • G
    • L
      [PATCH] PCI: automatically set device_driver.owner · 863b18f4
      Laurent riffard 提交于
      A nice feature of sysfs is that it can create the symlink from the
      driver to the module that is contained in it.
      
      It requires that the device_driver.owner is set, what is not the
      case for many PCI drivers.
      
      This patch allows pci_register_driver to set automatically the
      device_driver.owner for any PCI driver.
      
      Credits to Al Viro who suggested the method.
      Signed-off-by: NLaurent Riffard <laurent.riffard@free.fr>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      --
      
       drivers/ide/setup-pci.c  |   12 +++++++-----
       drivers/pci/pci-driver.c |    9 +++++----
       include/linux/ide.h      |    3 ++-
       include/linux/pci.h      |   10 ++++++++--
       4 files changed, 22 insertions(+), 12 deletions(-)
      863b18f4
    • R
      [PATCH] PCI: add pci_find_next_capability() · 24a4e377
      Roland Dreier 提交于
      Some devices have more than one capability of the same type.  For
      example, the PCI header for the PathScale InfiniPath looks like:
      
      	04:01.0 InfiniBand: Unknown device 1fc1:000d (rev 02)
      		Subsystem: Unknown device 1fc1:000d
      		Flags: bus master, fast devsel, latency 0, IRQ 193
      		Memory at fea00000 (64-bit, non-prefetchable) [size=2M]
      		Capabilities: [c0] HyperTransport: Slave or Primary Interface
      		Capabilities: [f8] HyperTransport: Interrupt Discovery and Configuration
      
      There are _two_ HyperTransport capabilities, and the PathScale driver
      wants to look at both of them.
      
      The current pci_find_capability() API doesn't work for this, since it
      only allows us to get to the first capability of a given type.  The
      patch below introduces a new pci_find_next_capability(), which can be
      used in a loop like
      
      	for (pos = pci_find_capability(pdev, <ID>);
      	     pos;
      	     pos = pci_find_next_capability(pdev, pos, <ID>)) {
      		/* ... */
      	}
      Signed-off-by: NRoland Dreier <rolandd@cisco.com>
      Signed-off-by: NMatthew Wilcox <matthew@wil.cx>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      24a4e377
  10. 29 10月, 2005 1 次提交
    • B
      [PATCH] PCI: Block config access during BIST · e04b0ea2
      Brian King 提交于
      Some PCI adapters (eg.  ipr scsi adapters) have an exposure today in that they
      issue BIST to the adapter to reset the card.  If, during the time it takes to
      complete BIST, userspace attempts to access PCI config space, the host bus
      bridge will master abort the access since the ipr adapter does not respond on
      the PCI bus for a brief period of time when running BIST.  On PPC64 hardware,
      this master abort results in the host PCI bridge isolating that PCI device
      from the rest of the system, making the device unusable until Linux is
      rebooted.  This patch is an attempt to close that exposure by introducing some
      blocking code in the PCI code.  When blocked, writes will be humored and reads
      will return the cached value.  Ben Herrenschmidt has also mentioned that he
      plans to use this in PPC power management.
      Signed-off-by: NBrian King <brking@us.ibm.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      
       drivers/pci/access.c    |   89 ++++++++++++++++++++++++++++++++++++++++++++++++
       drivers/pci/pci-sysfs.c |   20 +++++-----
       drivers/pci/pci.h       |    7 +++
       drivers/pci/proc.c      |   28 +++++++--------
       drivers/pci/syscall.c   |   14 +++----
       include/linux/pci.h     |    7 +++
       6 files changed, 134 insertions(+), 31 deletions(-)
      e04b0ea2
  11. 10 9月, 2005 4 次提交
  12. 09 9月, 2005 7 次提交
    • B
      [PATCH] PCI/libata INTx cleanup · a04ce0ff
      Brett M Russ 提交于
      Simple cleanup to eliminate X copies of the pci_enable_intx() function
      in libata.  Moved ahci.c's pci_intx() to pci.c and use it throughout
      libata and msi.c.
      Signed-off-by: NBrett Russ <russb@emc.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      a04ce0ff
    • D
      [PATCH] PCI: Support PCM PM CAP version 3 · 3fe9d19f
      Daniel Ritz 提交于
      - support PCI PM CAP version 3 (as defined in PCI PM Interface Spec v1.2)
      
      - pci/probe.c sets the PM state initially to 4 which is D3cold.  add a
        PCI_UNKNOWN
      
      - minor cleanups
      Signed-off-by: NDaniel Ritz <daniel.ritz@gmx.ch>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      3fe9d19f
    • P
      [PATCH] PCI: Add pci_walk_bus function to PCI core (nonrecursive) · cecf4864
      Paul Mackerras 提交于
      The PCI error recovery infrastructure needs to be able to contact all
      the drivers affected by a PCI error event, which may mean traversing
      all the devices under a given PCI-PCI bridge.  This patch adds a
      function to the PCI core that traverses all the PCI devices on a PCI
      bus and under any PCI-PCI bridges on that bus (and so on), calling a
      given function for each device.  This provides a way for the error
      recovery code to iterate through all devices that are affected by an
      error event.
      
      This version is not implemented as a recursive function.  Instead,
      when we reach a PCI-PCI bridge, we set the pointers to start doing the
      devices on the bus under the bridge, and when we reach the end of a
      bus's devices, we use the bus->self pointer to go back up to the next
      higher bus and continue doing its devices.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      cecf4864
    • J
      [PATCH] PCI: restore BAR values after D3hot->D0 for devices that need it · 064b53db
      John W. Linville 提交于
      Some PCI devices (e.g. 3c905B, 3c556B) lose all configuration
      (including BARs) when transitioning from D3hot->D0.  This leaves such
      a device in an inaccessible state.  The patch below causes the BARs
      to be restored when enabling such a device, so that its driver will
      be able to access it.
      
      The patch also adds pci_restore_bars as a new global symbol, and adds a
      correpsonding EXPORT_SYMBOL_GPL for that.
      
      Some firmware (e.g. Thinkpad T21) leaves devices in D3hot after a
      (re)boot.  Most drivers call pci_enable_device very early, so devices
      left in D3hot that lose configuration during the D3hot->D0 transition
      will be inaccessible to their drivers.
      
      Drivers could be modified to account for this, but it would
      be difficult to know which drivers need modification.  This is
      especially true since often many devices are covered by the same
      driver.  It likely would be necessary to replicate code across dozens
      of drivers.
      
      The patch below should trigger only when transitioning from D3hot->D0
      (or at boot), and only for devices that have the "no soft reset" bit
      cleared in the PM control register.  I believe it is safe to include
      this patch as part of the PCI infrastructure.
      
      The cleanest implementation of pci_restore_bars was to call
      pci_update_resource.  Unfortunately, that does not currently exist
      for the sparc64 architecture.  The patch below includes a null
      implemenation of pci_update_resource for sparc64.
      
      Some have expressed interest in making general use of the the
      pci_restore_bars function, so that has been exported to GPL licensed
      modules.
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      064b53db
    • G
      [PATCH] PCI: clean up pci.h and split pci register info to separate header file. · 4352dfd5
      Greg Kroah-Hartman 提交于
      This cleans up some of the #ifdef CONFIG_PCI stuff up, and moves the pci register
      info out to a separate file, where it belongs.  Eventually we can stop including
      this file from within pci.h, but lots of code needs to be audited first.
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      4352dfd5
    • A
      [PATCH] PCI: remove CONFIG_PCI_NAMES · 982245f0
      Adrian Bunk 提交于
      This patch removes CONFIG_PCI_NAMES.
      Signed-off-by: NAdrian Bunk <bunk@stusta.de>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      982245f0
    • A
      [PATCH] PCI: Move PCI fixup data into r/o section · 74d863ee
      akpm@osdl.org 提交于
      Make PCI fixup data const, so it'll end up in a r/o section.
      
      This also fixes the conversion into ECOFF which gets broken by too many
      changes between r/w and r/o sections.  Call it a hack but it's a change
      that's correct by itself.
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      74d863ee
  13. 17 8月, 2005 1 次提交
  14. 09 8月, 2005 1 次提交
  15. 05 8月, 2005 1 次提交
    • J
      [PATCH] PCI: restore BAR values after D3hot->D0 for devices that need it · fec59a71
      John W. Linville 提交于
      Some PCI devices (e.g. 3c905B, 3c556B) lose all configuration
      (including BARs) when transitioning from D3hot->D0.  This leaves such
      a device in an inaccessible state.  The patch below causes the BARs
      to be restored when enabling such a device, so that its driver will
      be able to access it.
      
      The patch also adds pci_restore_bars as a new global symbol, and adds a
      correpsonding EXPORT_SYMBOL_GPL for that.
      
      Some firmware (e.g. Thinkpad T21) leaves devices in D3hot after a
      (re)boot.  Most drivers call pci_enable_device very early, so devices
      left in D3hot that lose configuration during the D3hot->D0 transition
      will be inaccessible to their drivers.
      
      Drivers could be modified to account for this, but it would
      be difficult to know which drivers need modification.  This is
      especially true since often many devices are covered by the same
      driver.  It likely would be necessary to replicate code across dozens
      of drivers.
      
      The patch below should trigger only when transitioning from D3hot->D0
      (or at boot), and only for devices that have the "no soft reset" bit
      cleared in the PM control register.  I believe it is safe to include
      this patch as part of the PCI infrastructure.
      
      The cleanest implementation of pci_restore_bars was to call
      pci_update_resource.  Unfortunately, that does not currently exist
      for the sparc64 architecture.  The patch below includes a null
      implemenation of pci_update_resource for sparc64.
      
      Some have expressed interest in making general use of the the
      pci_restore_bars function, so that has been exported to GPL licensed
      modules.
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      fec59a71
  16. 30 7月, 2005 1 次提交
  17. 02 7月, 2005 2 次提交
    • G
      [PATCH] PCI: clean up dynamic pci id logic · 75865858
      Greg Kroah-Hartman 提交于
      The dynamic pci id logic has been bothering me for a while, and now that
      I started to look into how to move some of this to the driver core, I
      thought it was time to clean it all up.
      
      It ends up making the code smaller, and easier to follow, and fixes a
      few bugs at the same time (dynamic ids were not being matched
      everywhere, and so could be missed on some call paths for new devices,
      semaphore not needed to be grabbed when adding a new id and calling the
      driver core, etc.)
      
      I also renamed the function pci_match_device() to pci_match_id() as
      that's what it really does.
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      75865858
    • R
      [PATCH] PCI: Increase the number of PCI bus resources · a03fa955
      rajesh.shah@intel.com 提交于
      This patch increases the number of resource pointers in the
      pci_bus structure. This is needed to store >4 resource ranges
      for host bridges and transparent PCI bridges. With this change,
      all PCI buses will have more resource pointers, but most PCI
      buses will only use the first 3 or 4, the remaining being NULL.
      The PCI core already deals with this correctly.
      Signed-off-by: NRajesh Shah <rajesh.shah@intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      a03fa955
  18. 28 6月, 2005 4 次提交
    • A
      [PATCH] PCI: fix up errors after dma bursting patch and CONFIG_PCI=n · bb4a61b6
      Andrew Morton 提交于
      With CONFIG_PCI=n:
      
      In file included from include/linux/pci.h:917,
                       from lib/iomap.c:6:
      include/asm/pci.h:104: warning: `enum pci_dma_burst_strategy' declared inside parameter list
      include/asm/pci.h:104: warning: its scope is only this definition or declaration, which is probably not what you want.
      include/asm/pci.h: In function `pci_dma_burst_advice':
      include/asm/pci.h:106: dereferencing pointer to incomplete type
      include/asm/pci.h:106: `PCI_DMA_BURST_INFINITY' undeclared (first use in this function)
      include/asm/pci.h:106: (Each undeclared identifier is reported only once
      include/asm/pci.h:106: for each function it appears in.)
      make[1]: *** [lib/iomap.o] Error 1
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      bb4a61b6
    • D
      [PATCH] PCI: DMA bursting advice · e24c2d96
      David S. Miller 提交于
      After seeing, at best, "guesses" as to the following kind
      of information in several drivers, I decided that we really
      need a way for platforms to specifically give advice in this
      area for what works best with their PCI controller implementation.
      
      Basically, this new interface gives DMA bursting advice on
      PCI.  There are three forms of the advice:
      
      1) Burst as much as possible, it is not necessary to end bursts
         on some particular boundary for best performance.
      
      2) Burst on some byte count multiple.  A DMA burst to some multiple of
         number of bytes may be done, but it is important to end the burst
         on an exact multiple for best performance.
      
         The best example of this I am aware of are the PPC64 PCI
         controllers, where if you end a burst mid-cacheline then
         chip has to refetch the data and the IOMMU translations
         which hurts performance a lot.
      
      3) Burst on a single byte count multiple.  Bursts shall end
         exactly on the next multiple boundary for best performance.
      
         Sparc64 and Alpha's PCI controllers operate this way.  They
         disconnect any device which tries to burst across a cacheline
         boundary.
      
         Actually, newer sparc64 PCI controllers do not have this behavior.
         That is why the "pdev" is passed into the interface, so I can
         add code later to check which PCI controller the system is using
         and give advice accordingly.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      e24c2d96
    • M
      [PATCH] PCI: fix-pci-mmap-on-ppc-and-ppc64.patch · 2311b1f2
      Michael Ellerman 提交于
      This is an updated version of Ben's fix-pci-mmap-on-ppc-and-ppc64.patch
      which is in 2.6.12-rc4-mm1.
      
      It fixes the patch to work on PPC iSeries, removes some debug printks
      at Ben's request, and incorporates your
      fix-pci-mmap-on-ppc-and-ppc64-fix.patch also.
      
      Originally from Benjamin Herrenschmidt <benh@kernel.crashing.org>
      
      This patch was discussed at length on linux-pci and so far, the last
      iteration of it didn't raise any comment.  It's effect is a nop on
      architecture that don't define the new pci_resource_to_user() callback
      anyway.  It allows architecture like ppc who put weird things inside of
      PCI resource structures to convert to some different value for user
      visible ones.  It also fixes mmap'ing of IO space on those archs.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      2311b1f2
    • R
      [PATCH] acpi bridge hotadd: ACPI based root bridge hot-add · c431ada4
      Rajesh Shah 提交于
      When you hot-plug a (root) bridge hierarchy, it may have p2p bridges and
      devices attached to it that have not been configured by firmware.  In this
      case, we need to configure the devices before starting them.  This patch
      separates device start from device scan so that we can introduce the
      configuration step in the middle.
      
      I kept the existing semantics for pci_scan_bus() since there are a huge number
      of callers to that function.
      
      Also, I have no way of testing the changes I made to the parisc files, so this
      needs review by those folks.  Sorry for the massive cross-post, this touches
      files in many different places.
      Signed-off-by: NRajesh Shah <rajesh.shah@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      c431ada4
  19. 04 5月, 2005 1 次提交