1. 02 3月, 2016 2 次提交
  2. 15 10月, 2015 2 次提交
  3. 01 10月, 2015 1 次提交
  4. 07 6月, 2015 1 次提交
  5. 28 3月, 2015 1 次提交
    • M
      selftests/powerpc: Add a test of the switch_endian() syscall · 4cd968ef
      Michael Ellerman 提交于
      This adds a test of the switch_endian() syscall we added in the previous
      commit.
      
      We test it by calling the endian switch syscall, and then executing some
      code in the other endian to check everything went as expected. That code
      checks registers we expect to be maintained are. If the endian switch
      failed to happen that code sequence will be illegal and cause the test
      to abort.
      
      We then switch back to the original endian, do the same checks and
      finally write a success message and exit(0).
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      4cd968ef
  6. 20 3月, 2015 2 次提交
  7. 18 3月, 2015 2 次提交
  8. 23 1月, 2015 1 次提交
  9. 30 9月, 2014 1 次提交
  10. 28 7月, 2014 1 次提交
  11. 11 6月, 2014 1 次提交
    • S
      powerpc: Correct DSCR during TM context switch · 96d01610
      Sam bobroff 提交于
      Correct the DSCR SPR becoming temporarily corrupted if a task is
      context switched during a transaction.
      
      The problem occurs while suspending the task and is caused by saving
      the DSCR to thread.dscr after it has already been set to the CPU's
      default value:
      
      __switch_to() calls __switch_to_tm()
      	which calls tm_reclaim_task()
      	which calls tm_reclaim_thread()
      	which calls tm_reclaim()
      		where the DSCR is set to the CPU's default
      __switch_to() calls _switch()
      		where thread.dscr is set to the DSCR
      
      When the task is resumed, it's transaction will be doomed (as usual)
      and the DSCR SPR will be corrupted, although the checkpointed value
      will be correct. Therefore the DSCR will be immediately corrected by
      the transaction aborting, unless it has been suspended. In that case
      the incorrect value can be seen by the task until it resumes the
      transaction.
      
      The fix is to treat the DSCR similarly to the TAR and save it early
      in __switch_to().
      
      A program exposing the problem is added to the kernel self tests as:
      tools/testing/selftests/powerpc/tm/tm-resched-dscr.
      Signed-off-by: NSam Bobroff <sam.bobroff@au1.ibm.com>
      CC: <stable@vger.kernel.org> [v3.10+]
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      96d01610
  12. 06 6月, 2014 1 次提交
  13. 07 3月, 2014 1 次提交
  14. 14 8月, 2013 2 次提交