- 22 12月, 2015 40 次提交
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由 Alex Deucher 提交于
Load the UVD DPM state into the SMC. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 kbuild test robot 提交于
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/tonga_hwmgr.c:2653:9-10: WARNING: return of 0/1 in function 'is_pcie_gen2_supported' with return type bool drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/tonga_hwmgr.c:2645:9-10: WARNING: return of 0/1 in function 'is_pcie_gen3_supported' with return type bool Return statements in functions returning bool should use true/false instead of 1/0. Generated by: scripts/coccinelle/misc/boolreturn.cocci CC: yanyang1 <young.yang@amd.com> Signed-off-by: NFengguang Wu <fengguang.wu@intel.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Rather than hardcode it. v2: integrate spc fix from Rex Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Rather than hardcode it. v2: integrate spc fix from Rex Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Needed by powerplay to properly handle pcie dpm switching. Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
We'll need this later for pcie dpm. Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Add a helper to get the max link width of the port. Similar to the helper to get the max link speed. v2: fix typo in commit message Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
These will be used by multiple powerplay drivers and other IP modules. Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
When forcing the lowest state also force mclk and pcie. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
When forcing the lowest state also force mclk and pcie. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Better handle power state changes. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com>
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由 Rex Zhu 提交于
Implement the new callbacks for tonga. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com>
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由 Rex Zhu 提交于
Interface between hwmgr and eventmgr. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com>
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由 Jammy Zhou 提交于
The amdgu_powerplay variable is global for multiple GPU instances. v2: fold in Flora's module option change, protect adev reference in macros Signed-off-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com>
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由 Rex Zhu 提交于
Same interface exposed in pre-powerplay dpm code. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Hook up the amdgpu thermal control callbacks for powerplay. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
This adds the interface needed to expose powerplay fan control to sysfs via hwmon. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Implement thermal and fan control for tonga. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Add thermal handling to the event manager. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Thermal controller interface. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Redefine interrupt callback function in accordance with cgs. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Add the interface for fan and thermal control. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Implement clock and power gating support for tonga. On Tonga this is handles by the SMU rather than direct register settings in the driver. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Add callbacks interface for clock and powergating. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Interface for clock and power gating handling. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Implement displaygap programming for tonga. This is required for properly mclk switching. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Add support for display configuration changes to the event manager. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
This allows the eventmgr to properly update the displaygap on certain power events. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rex Zhu 提交于
Displaygap support is required for proper mclk switching. Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Eric Huang 提交于
Switch over to handling in the powerplay module. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NEric Huang <JinHuiEric.Huang@amd.com>
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由 Jammy Zhou 提交于
This option can be used to enable the new powerplay implementation, and it is disabled by default. Signed-off-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Eric Huang 提交于
This enabled DPM support for Fiji. DPM is dynamic clock and voltage scaling. v2: rename fiji_hwmgr_early_init to fiji_hwmgr_init v3: (agd) fold in endian fix, additional function addition Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NEric Huang <JinHuiEric.Huang@amd.com>
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由 Eric Huang 提交于
Add support for the SMU manager for Fiji. This handles the firmware loading for other IP blocks (GFX, SDMA, etc.). Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NEric Huang <JinHuiEric.Huang@amd.com>
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由 Eric Huang 提交于
Add some new functions to support Fiji. Split out from the previous patch. Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: NEric Huang <JinHuiEric.Huang@amd.com>
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由 Eric Huang 提交于
New headers for Fiji. Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: NEric Huang <JinHuiEric.Huang@amd.com>
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由 yanyang1 提交于
This implements DPM for tonga. DPM handles dynamic clock and voltage scaling. v2: merge all the patches related with tonga dpm v3: merge dpm force level fix, cgs display fix, spelling fix Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Nyanyang1 <young.yang@amd.com> Signed-off-by: NRex Zhu <Rex.Zhu@amd.com> Signed-off-by: NEric Huang <JinHuiEric.Huang@amd.com>
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由 Jammy Zhou 提交于
The SMU manager handles firmware loading for other IP blocks (GFX, SDMA, etc.). This implements it for Tonga. v3: delete peci sub-module v2: use cgs interface directly Signed-off-by: NYoung Yang <Young.Yang@amd.com> Signed-off-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 yanyang1 提交于
These headers provide the SMU interface used by the driver. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: Nyanyang1 <young.yang@amd.com>
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