- 25 8月, 2016 8 次提交
-
-
由 Baolin Wang 提交于
When dwc3 core enters into suspend mode, the system (especially for mobile device) may power off the dwc3 controller for power saving, that will cause dwc3 controller lost the mode operation when resuming dwc3 core. Thus we can move the mode setting into dwc3_core_init() function to avoid this issue. Signed-off-by: NBaolin Wang <baolin.wang@linaro.org> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 William Wu 提交于
Rockchip platform merely enable usb3 clocks and populate its children. So we can use this generic glue layer to support Rockchip dwc3. Signed-off-by: NWilliam Wu <william.wu@rock-chips.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 William Wu 提交于
Add a quirk to clear the GUSB3PIPECTL.DELAYP1TRANS bit, which specifies whether disable delay PHY power change from P0 to P1/P2/P3 when link state changing from U0 to U1/U2/U3 respectively. Signed-off-by: NWilliam Wu <william.wu@rock-chips.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 William Wu 提交于
Support to configure the UTMI+ PHY with an 8- or 16-bit interface via DT. The UTMI+ PHY interface is a hardware capability, and it's platform dependent. Normally, the PHYIF can be configured during coreconsultant. But for some specific USB cores(e.g. rk3399 SoC DWC3), the default PHYIF configuration value is false, so we need to reconfigure it by software. Signed-off-by: NWilliam Wu <william.wu@rock-chips.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 William Wu 提交于
Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit, which specifies whether the USB2.0 PHY provides a free-running PHY clock, which is active when the clock control input is active. Signed-off-by: NWilliam Wu <william.wu@rock-chips.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
No functional changes, just a slight cosmetic change. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
We don't use LST bit anymore, so this condition will never trigger. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
Upon transfer completion after a full ring, let's add more TRBs to our ring in order to complete our request successfully. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
- 22 8月, 2016 7 次提交
-
-
由 Felipe Balbi 提交于
If the ring is full and we are processing a big sglist, then let's interrupt so we can, later, add more TRBs to the ring. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
These two fields will be used in a follow-up patch to track how many entries of request's sglist we have already processed. The reason is that if a gadget driver sends an sglist with more entries then we can fit in the ring, we will have to continue processing remaining afterwards. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
We know that we have to iterate over the list of started requests. Instead of looping forever, we can rely on list_for_each_entry(). Likewise, instead of a do {} while loop over all, maybe available, scatterlist entries, we can detect if $this request uses scatterlist and rely on for_each_sg(). This makes the code easier to follow while making sure that we will *always* break out of the loop. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
Many of the comments in that function are really outdated and don't match what the driver is doing. Moreover, recent patches combined programming model for all non-control endpoints, this gives us an opportunity to get rid of our special cases in __dwc3_gadget_ep_queue(). Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
We always need to decrement our index by at least one. Simplify the implementation by using a temporary local variable and making sure that we will always decrement one extra if tmp == 0. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
Instead of waiting until giveback before incrementing the dequeue pointer, we can increment it from dwc3_cleanup_done_reqs(), that way we avoid an extra loop over all TRBs during giveback. While at that, also avoid using req->first_trb_index as that's completely unnecessary. A follow-up patch will clean up further uses of that and remove the field altogether. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
The only endpoint which actually requires LST bit and XferComplete is ep0/1. Let's save some time by completely removing LST bit support and XferComplete. This simplifies and consolidates endpoint handling for all other 3 transfer types while also avoiding extra interrupts. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
- 11 8月, 2016 3 次提交
-
-
由 Felipe Balbi 提交于
stop consuming TRBs when we reach one with HWO bit already set. This will prevent us from prematurely retiring a TRB. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Janusz Dziedzic 提交于
According to Synopsys Databook 2.60a, section 8.3.4, it's stated that: The LST bit should be set to 0 (isochronous transfers normally continue until the endpoint is removed entirely, at which time an End Transfer command is used to stop the transfer). This patch makes sure that detail is observed and fixes a regression with Android Audio playback caused by recent changes to DWC3 gadget. Signed-off-by: NJanusz Dziedzic <januszx.dziedzic@linux.intel.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Wei Yongjun 提交于
Add missing platform_set_drvdata() in dwc3_of_simple_probe(), otherwise calling platform_get_drvdata() in remove returns NULL. This is detected by Coccinelle semantic patch. Signed-off-by: NWei Yongjun <weiyj.lk@gmail.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
- 10 8月, 2016 4 次提交
-
-
由 Heikki Krogerus 提交于
Intel Kabylake PCH has the same DWC3 than Intel Sunrisepoint. Add the new ID to the supported devices. Cc: <stable@vger.kernel.org> Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
If we stop earlier due to short packet, we will not be able to giveback all TRBs. Cc: <stable@vger.kernel.org> Cc: Brian E Rogers <brian.e.rogers@intel.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
DWC3 has one interesting peculiarity with chained transfers. If we setup N chained transfers and we get a short packet before processing all N TRBs, DWC3 will (conditionally) issue a XferComplete or XferInProgress event and retire all TRBs from the one which got a short packet to the last without clearing their HWO bits. This means SW must clear HWO bit manually, which this patch is doing. Cc: <stable@vger.kernel.org> Cc: Brian E Rogers <brian.e.rogers@intel.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
When using SG lists, we would end up setting request->actual to: num_mapped_sgs * (request->length - count) Let's fix that up by incrementing request->actual only once. Cc: <stable@vger.kernel.org> Reported-by: NBrian E Rogers <brian.e.rogers@intel.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
- 01 7月, 2016 2 次提交
-
-
由 Roger Quadros 提交于
Looks like we lost all changes related to commit 9522def4 ("usb: dwc3: core: cleanup IRQ resources") in host.c when Felipe's next branch was merged into Greg's next branch. Fixes 215db948 ("Merge tag 'usb-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next") Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NFelipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
-
由 Lee Jones 提交于
We're making all reset line users specify whether their lines are shared with other IP or they operate them exclusively. In this case the line is exclusively used only by this IP, so use the *_exclusive() API accordingly. Acked-by: NFelipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: NLee Jones <lee.jones@linaro.org>
-
- 30 6月, 2016 1 次提交
-
-
由 Lee Jones 提交于
On the STiH410 B2120 development board the MiPHY28lp shares its reset line with the Synopsys DWC3 SuperSpeed (SS) USB 3.0 Dual-Role-Device (DRD). New functionality in the reset subsystems forces consumers to be explicit when requesting shared/exclusive reset lines. Acked-by: NFelipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: NLee Jones <lee.jones@linaro.org>
-
- 27 6月, 2016 1 次提交
-
-
由 Heikki Krogerus 提交于
This should allow xhci to remove handling of platform data. Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: NMathias Nyman <mathias.nyman@linux.intel.com> Acked-by: NFelipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
-
- 21 6月, 2016 11 次提交
-
-
由 Baolin Wang 提交于
It had changed to be suspend event for BIT6 in DEVT register from version 2.30a and above. Thus this patch introduces one suspend event handler to handle the suspend event. Signed-off-by: NBaolin Wang <baolin.wang@linaro.org> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Roger Quadros 提交于
Implementations might use different IRQs for host, gadget so use named interrupt resources to allow device tree to specify the interrupts. Following are the interrupt names Peripheral Interrupt - peripheral HOST Interrupt - host Maintain backward compatibility for a single named interrupt ("dwc3_usb3") for all interrupts as well as unnamed interrupt at index 0 for all interrupts. As platform_get_irq() variants are used, tackle the -EPROBE_DEFER case as well. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Baolin Wang 提交于
It will be crash to stop gadget when the dwc3 device had been into suspend state, thus we need to check if the dwc3 device had been into suspend state when UDC try to stop gadget. Signed-off-by: NBaolin Wang <baolin.wang@linaro.org> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
Because of recent changes to transfer handling on DWC3, we will not get XferComplete unless we completely fill up our TRB ring. This means that we might get a Reset or Disconnect without getting a XferComplete first. In order to correctly release our allocated Transfer Resource, we must issue ENDTRANSFER command whenever dep->resource_index is valid. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Roger Quadros 提交于
If there is a failure after pm_runtime_enable/get_sync() we need to call pm_runtime_disable/put_sync(). Otherwise it will lead to an unbalanced pm_runtime_enable() on the subsequent probe if the earlier probe bailed out due to -EPROBE_DEFER. pm_runtime_get_sync() can fail as well so deal with that case too. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
it's clear now that when is_on=true, we must loop until DWC3_DSTS_DEVCTRLHLT clears; while when is_on=false we must loop until DWC3_DSTS_DEVCTRLHLT gets set. Instead of adding actual if() statements, we can rely on XOR operation to evaluate to true only when the above conditions apply. Then, we can move the break condition back to the while() statement together with our timeout check and the resulting code is very compact and simpler to read. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
instead of looping forever and forcing a return if timeout reaches zero, we can just use timeout and loop's break condition directly. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
testing shows that udelay() is unnecessary as controller reaches Halted state almost instantenously as can be seen by our timeout variable never actually decrementing. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
We shouldn't change a host-only dwc3 to gadget-only if driver is built as gadget-only. Fix that up here. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
It's know that Intel's SoCs' dwc3 integration is peripheral-only since Intel implements its own portmux for role-swapping. In order to prevent dwc3 from ever registering and XHCI platform_device, let's just set dr-mode to peripheral-only on Intel SoCs. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
'modify' is what the current action is called. Let's rename it so it matches databook. While at that, also make sure to add support 'init' action too. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
- 20 6月, 2016 3 次提交
-
-
由 Felipe Balbi 提交于
If we don't, we will overwrite valid TRBs. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
Now we can try to issue Update Transfer every time gadget driver queues a new request. This will make sure we keep controller's queue busy for as long as possible. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-
由 Felipe Balbi 提交于
We don't need this IRQ anymore for interrupt or bulk endpoints. Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
-