提交 ffe0b2ff 编写于 作者: B Bjorn Helgaas 提交者: Jeff Kirsher

e1000e: Use standard #defines for PCIe Capability ASPM fields

Use the standard #defines for PCIe Capability ASPM fields.

Previously we used PCIE_LINK_STATE_L0S and PCIE_LINK_STATE_L1 directly, but
these are defined for the Linux ASPM interfaces, e.g.,
pci_disable_link_state(), and only coincidentally match the actual register
bits.  PCIE_LINK_STATE_CLKPM, also part of that interface, does not match
the register bit.
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
CC: e1000-devel@lists.sourceforge.net
Acked-by: NBruce Allan <bruce.w.allan@intel.com>
Tested-by: NAaron Brown <aaron.f.brown@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
上级 203e4151
...@@ -5548,14 +5548,21 @@ static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) ...@@ -5548,14 +5548,21 @@ static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
#else #else
static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
{ {
u16 aspm_ctl = 0;
if (state & PCIE_LINK_STATE_L0S)
aspm_ctl |= PCI_EXP_LNKCTL_ASPM_L0S;
if (state & PCIE_LINK_STATE_L1)
aspm_ctl |= PCI_EXP_LNKCTL_ASPM_L1;
/* Both device and parent should have the same ASPM setting. /* Both device and parent should have the same ASPM setting.
* Disable ASPM in downstream component first and then upstream. * Disable ASPM in downstream component first and then upstream.
*/ */
pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, state); pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_ctl);
if (pdev->bus->self) if (pdev->bus->self)
pcie_capability_clear_word(pdev->bus->self, PCI_EXP_LNKCTL, pcie_capability_clear_word(pdev->bus->self, PCI_EXP_LNKCTL,
state); aspm_ctl);
} }
#endif #endif
static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state) static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
......
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