提交 ff378ca1 编写于 作者: D David S. Miller

Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-next

Jeff Kirsher says:

====================
Intel Wired LAN Driver Updates

This series contains fixes to e1000e, igb, ixgbe, ixgebvf, i40e and
i40evf.

David provides a fix for e1000e to resolve an issue where the device is
capable of transmitting packets but is unable to receive packets until
a previously introduced workaround is called.

Jakub Kicinski provides PTP fixes for ixgbe, which include removing a
redundant if clause and make sure we are not generating both a software and
hardware timestamp.  As well as fix a race condition and leaking skbs
when multiple transmit rings try to claim time stamping.

Jean Sacren fixes a function declaration in ixgbe which was introduced
in commit c97506ab ("ixgbe: Add check for FW veto bit").  In addition
fixes a function header comment in i40e and fixes the error checking
by binding the check to the pertinent DMA bit mask.

Mark provides several fixes for ixgbe and ixgbevf.  Most notably are fixes
to resolve namespace issues and fix ECU warnings induced by LER for ixgbe
and ixgbevf.

Joe Perches fixes up unnecessary casts in i40e and i40evf.

Peter Senna Tschudin fixes igb to use pci_iounmap when the virtual mapping
was done with pci_iomap.
====================# Please enter a commit message to explain why this merge is necessary,
......@@ -2991,11 +2991,21 @@ static void e1000_setup_rctl(struct e1000_adapter *adapter)
u32 rctl, rfctl;
u32 pages = 0;
/* Workaround Si errata on PCHx - configure jumbo frame flow */
if ((hw->mac.type >= e1000_pch2lan) &&
(adapter->netdev->mtu > ETH_DATA_LEN) &&
e1000_lv_jumbo_workaround_ich8lan(hw, true))
e_dbg("failed to enable jumbo frame workaround mode\n");
/* Workaround Si errata on PCHx - configure jumbo frame flow.
* If jumbo frames not set, program related MAC/PHY registers
* to h/w defaults
*/
if (hw->mac.type >= e1000_pch2lan) {
s32 ret_val;
if (adapter->netdev->mtu > ETH_DATA_LEN)
ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
else
ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
if (ret_val)
e_dbg("failed to enable|disable jumbo frame workaround mode\n");
}
/* Program MC offset vector base */
rctl = er32(RCTL);
......
......@@ -1775,9 +1775,9 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
cap = (struct i40e_aqc_list_capabilities_element_resp *) buff;
if (list_type_opc == i40e_aqc_opc_list_dev_capabilities)
p = (struct i40e_hw_capabilities *)&hw->dev_caps;
p = &hw->dev_caps;
else if (list_type_opc == i40e_aqc_opc_list_func_capabilities)
p = (struct i40e_hw_capabilities *)&hw->func_caps;
p = &hw->func_caps;
else
return;
......
......@@ -396,7 +396,7 @@ static int i40e_get_eeprom(struct net_device *netdev,
ret_val = i40e_aq_read_nvm(hw, 0x0,
eeprom->offset + (I40E_NVM_SECTOR_SIZE * i),
len,
(u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i),
eeprom_buff + (I40E_NVM_SECTOR_SIZE * i),
last, NULL);
if (ret_val) {
dev_info(&pf->pdev->dev,
......@@ -408,7 +408,7 @@ static int i40e_get_eeprom(struct net_device *netdev,
release_nvm:
i40e_release_nvm(hw);
memcpy(bytes, (u8 *)eeprom_buff, eeprom->len);
memcpy(bytes, eeprom_buff, eeprom->len);
free_buff:
kfree(eeprom_buff);
return ret_val;
......
......@@ -8091,12 +8091,13 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
/* set up for high or low dma */
err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
if (err)
err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
if (err) {
dev_err(&pdev->dev,
"DMA configuration failed: 0x%x\n", err);
goto err_dma;
err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
if (err) {
dev_err(&pdev->dev,
"DMA configuration failed: 0x%x\n", err);
goto err_dma;
}
}
/* set up pci connections */
......
......@@ -299,7 +299,7 @@ static int i40e_add_del_fdir_tcpv4(struct i40e_vsi *vsi,
* @raw_packet: the pre-allocated packet buffer for FDir
* @add: true adds a filter, false removes it
*
* Returns 0 if the filters were successfully added or removed
* Always returns -EOPNOTSUPP
**/
static int i40e_add_del_fdir_sctpv4(struct i40e_vsi *vsi,
struct i40e_fdir_filter *fd_data,
......
......@@ -565,8 +565,7 @@ i40e_status i40e_aq_send_msg_to_pf(struct i40e_hw *hw,
details.async = true;
cmd_details = &details;
}
status = i40evf_asq_send_command(hw, (struct i40e_aq_desc *)&desc, msg,
msglen, cmd_details);
status = i40evf_asq_send_command(hw, &desc, msg, msglen, cmd_details);
return status;
}
......
......@@ -2191,12 +2191,13 @@ static int i40evf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
return err;
err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
if (err)
err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
if (err) {
dev_err(&pdev->dev,
"DMA configuration failed: 0x%x\n", err);
goto err_dma;
err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
if (err) {
dev_err(&pdev->dev,
"DMA configuration failed: 0x%x\n", err);
goto err_dma;
}
}
err = pci_request_regions(pdev, i40evf_driver_name);
......
......@@ -2652,7 +2652,7 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
iounmap(hw->flash_address);
err_sw_init:
igb_clear_interrupt_scheme(adapter);
iounmap(hw->hw_addr);
pci_iounmap(pdev, hw->hw_addr);
err_ioremap:
free_netdev(netdev);
err_alloc_etherdev:
......@@ -2819,7 +2819,7 @@ static void igb_remove(struct pci_dev *pdev)
igb_disable_sriov(pdev);
#endif
iounmap(hw->hw_addr);
pci_iounmap(pdev, hw->hw_addr);
if (hw->flash_address)
iounmap(hw->flash_address);
pci_release_selected_regions(pdev,
......
......@@ -808,10 +808,12 @@ enum ixgbe_state_t {
__IXGBE_TESTING,
__IXGBE_RESETTING,
__IXGBE_DOWN,
__IXGBE_DISABLED,
__IXGBE_REMOVING,
__IXGBE_SERVICE_SCHED,
__IXGBE_IN_SFP_INIT,
__IXGBE_PTP_RUNNING,
__IXGBE_PTP_TX_IN_PROGRESS,
};
struct ixgbe_cb {
......
......@@ -5566,6 +5566,8 @@ static int ixgbe_resume(struct pci_dev *pdev)
e_dev_err("Cannot enable PCI device from suspend\n");
return err;
}
smp_mb__before_clear_bit();
clear_bit(__IXGBE_DISABLED, &adapter->state);
pci_set_master(pdev);
pci_wake_from_d3(pdev, false);
......@@ -5663,7 +5665,8 @@ static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
ixgbe_release_hw_control(adapter);
pci_disable_device(pdev);
if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
pci_disable_device(pdev);
return 0;
}
......@@ -7042,9 +7045,9 @@ netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
}
skb_tx_timestamp(skb);
if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
!test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
&adapter->state))) {
skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
......@@ -7054,6 +7057,8 @@ netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
schedule_work(&adapter->ptp_tx_work);
}
skb_tx_timestamp(skb);
#ifdef CONFIG_PCI_IOV
/*
* Use the l2switch_enable flag - would be false if the DMA
......@@ -8311,7 +8316,8 @@ static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
pci_select_bars(pdev, IORESOURCE_MEM));
err_pci_reg:
err_dma:
pci_disable_device(pdev);
if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
pci_disable_device(pdev);
return err;
}
......@@ -8380,7 +8386,8 @@ static void ixgbe_remove(struct pci_dev *pdev)
pci_disable_pcie_error_reporting(pdev);
pci_disable_device(pdev);
if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
pci_disable_device(pdev);
}
/**
......@@ -8487,14 +8494,20 @@ static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
skip_bad_vf_detection:
#endif /* CONFIG_PCI_IOV */
rtnl_lock();
netif_device_detach(netdev);
if (state == pci_channel_io_perm_failure)
if (state == pci_channel_io_perm_failure) {
rtnl_unlock();
return PCI_ERS_RESULT_DISCONNECT;
}
if (netif_running(netdev))
ixgbe_down(adapter);
pci_disable_device(pdev);
if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
pci_disable_device(pdev);
rtnl_unlock();
/* Request a slot reset. */
return PCI_ERS_RESULT_NEED_RESET;
......@@ -8516,6 +8529,8 @@ static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
e_err(probe, "Cannot re-enable PCI device after reset.\n");
result = PCI_ERS_RESULT_DISCONNECT;
} else {
smp_mb__before_clear_bit();
clear_bit(__IXGBE_DISABLED, &adapter->state);
adapter->hw.hw_addr = adapter->io_addr;
pci_set_master(pdev);
pci_restore_state(pdev);
......
......@@ -107,7 +107,7 @@ s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw)
* have this bit just return false since the link can not be blocked
* via this method.
**/
s32 ixgbe_check_reset_blocked(struct ixgbe_hw *hw)
bool ixgbe_check_reset_blocked(struct ixgbe_hw *hw)
{
u32 mmngc;
......
......@@ -128,7 +128,7 @@ s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw,
s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw,
ixgbe_link_speed *speed,
bool *autoneg);
s32 ixgbe_check_reset_blocked(struct ixgbe_hw *hw);
bool ixgbe_check_reset_blocked(struct ixgbe_hw *hw);
/* PHY specific */
s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw,
......
......@@ -493,6 +493,7 @@ static void ixgbe_ptp_tx_hwtstamp(struct ixgbe_adapter *adapter)
dev_kfree_skb_any(adapter->ptp_tx_skb);
adapter->ptp_tx_skb = NULL;
clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
}
/**
......@@ -512,13 +513,10 @@ static void ixgbe_ptp_tx_hwtstamp_work(struct work_struct *work)
IXGBE_PTP_TX_TIMEOUT);
u32 tsynctxctl;
/* we have to have a valid skb */
if (!adapter->ptp_tx_skb)
return;
if (timeout) {
dev_kfree_skb_any(adapter->ptp_tx_skb);
adapter->ptp_tx_skb = NULL;
clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
e_warn(drv, "clearing Tx Timestamp hang");
return;
}
......@@ -929,6 +927,7 @@ void ixgbe_ptp_stop(struct ixgbe_adapter *adapter)
if (adapter->ptp_tx_skb) {
dev_kfree_skb_any(adapter->ptp_tx_skb);
adapter->ptp_tx_skb = NULL;
clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
}
if (adapter->ptp_clock) {
......
......@@ -540,10 +540,10 @@ static bool reg_pattern_test(struct ixgbevf_adapter *adapter, u64 *data,
return true;
}
for (pat = 0; pat < ARRAY_SIZE(register_test_patterns); pat++) {
before = ixgbe_read_reg(&adapter->hw, reg);
before = ixgbevf_read_reg(&adapter->hw, reg);
ixgbe_write_reg(&adapter->hw, reg,
register_test_patterns[pat] & write);
val = ixgbe_read_reg(&adapter->hw, reg);
val = ixgbevf_read_reg(&adapter->hw, reg);
if (val != (register_test_patterns[pat] & write & mask)) {
hw_dbg(&adapter->hw,
"pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
......@@ -567,9 +567,9 @@ static bool reg_set_and_check(struct ixgbevf_adapter *adapter, u64 *data,
*data = 1;
return true;
}
before = ixgbe_read_reg(&adapter->hw, reg);
before = ixgbevf_read_reg(&adapter->hw, reg);
ixgbe_write_reg(&adapter->hw, reg, write & mask);
val = ixgbe_read_reg(&adapter->hw, reg);
val = ixgbevf_read_reg(&adapter->hw, reg);
if ((write & mask) != (val & mask)) {
pr_err("set/check reg %04X test failed: got 0x%08X expected 0x%08X\n",
reg, (val & mask), write & mask);
......
......@@ -419,6 +419,7 @@ enum ixbgevf_state_t {
__IXGBEVF_TESTING,
__IXGBEVF_RESETTING,
__IXGBEVF_DOWN,
__IXGBEVF_DISABLED,
__IXGBEVF_REMOVING,
};
......
......@@ -124,12 +124,12 @@ static void ixgbevf_check_remove(struct ixgbe_hw *hw, u32 reg)
ixgbevf_remove_adapter(hw);
return;
}
value = ixgbe_read_reg(hw, IXGBE_VFSTATUS);
value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS);
if (value == IXGBE_FAILED_READ_REG)
ixgbevf_remove_adapter(hw);
}
u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg)
{
u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
u32 value;
......@@ -3329,7 +3329,8 @@ static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
return retval;
#endif
pci_disable_device(pdev);
if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
pci_disable_device(pdev);
return 0;
}
......@@ -3353,6 +3354,8 @@ static int ixgbevf_resume(struct pci_dev *pdev)
dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
return err;
}
smp_mb__before_clear_bit();
clear_bit(__IXGBEVF_DISABLED, &adapter->state);
pci_set_master(pdev);
ixgbevf_reset(adapter);
......@@ -3607,7 +3610,8 @@ static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
pci_release_regions(pdev);
err_pci_reg:
err_dma:
pci_disable_device(pdev);
if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
pci_disable_device(pdev);
return err;
}
......@@ -3645,7 +3649,8 @@ static void ixgbevf_remove(struct pci_dev *pdev)
free_netdev(netdev);
pci_disable_device(pdev);
if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
pci_disable_device(pdev);
}
/**
......@@ -3662,15 +3667,20 @@ static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
struct net_device *netdev = pci_get_drvdata(pdev);
struct ixgbevf_adapter *adapter = netdev_priv(netdev);
rtnl_lock();
netif_device_detach(netdev);
if (state == pci_channel_io_perm_failure)
if (state == pci_channel_io_perm_failure) {
rtnl_unlock();
return PCI_ERS_RESULT_DISCONNECT;
}
if (netif_running(netdev))
ixgbevf_down(adapter);
pci_disable_device(pdev);
if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
pci_disable_device(pdev);
rtnl_unlock();
/* Request a slot slot reset. */
return PCI_ERS_RESULT_NEED_RESET;
......@@ -3694,6 +3704,8 @@ static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
return PCI_ERS_RESULT_DISCONNECT;
}
smp_mb__before_clear_bit();
clear_bit(__IXGBEVF_DISABLED, &adapter->state);
pci_set_master(pdev);
ixgbevf_reset(adapter);
......
......@@ -186,8 +186,8 @@ static inline void ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 value)
}
#define IXGBE_WRITE_REG(h, r, v) ixgbe_write_reg(h, r, v)
u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg);
#define IXGBE_READ_REG(h, r) ixgbe_read_reg(h, r)
u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg);
#define IXGBE_READ_REG(h, r) ixgbevf_read_reg(h, r)
static inline void ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg,
u32 offset, u32 value)
......@@ -199,7 +199,7 @@ static inline void ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg,
static inline u32 ixgbe_read_reg_array(struct ixgbe_hw *hw, u32 reg,
u32 offset)
{
return ixgbe_read_reg(hw, reg + (offset << 2));
return ixgbevf_read_reg(hw, reg + (offset << 2));
}
#define IXGBE_READ_REG_ARRAY(h, r, o) ixgbe_read_reg_array(h, r, o)
......
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