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提交 fc2d10dd 编写于 作者: J Jean Delvare 提交者： Linus Torvalds
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matroxfb: get rid of unneeded macros ACCESS_FBINFO and MINFO 

With multihead support always enabled, these macros are no longer needed
and make the code harder to read.
Signed-off-by: NJean Delvare <khali@linux-fr.org>
Acked-by: NPetr Vandrovec <vandrove@vc.cvut.cz>
Cc: Krzysztof Helt <krzysztof.h1@poczta.fm>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
上级 0728bacb
展开全部 隐藏空白更改
内联 并排
Showing with 837 addition and 842 deletion
drivers/video/matrox/g450_pll.c
浏览文件 @ fc2d10dd
......@@ -30,7 +30,7 @@ static unsigned int g450_mnp2vco(CPMINFO unsigned int mnp) {
m = ((mnp >> 16) & 0x0FF) + 1;
n = ((mnp >> 7) & 0x1FE) + 4;
return (ACCESS_FBINFO(features).pll.ref_freq * n + (m >> 1)) / m;
return (minfo->features.pll.ref_freq * n + (m >> 1)) / m;
}
unsigned int g450_mnp2f(CPMINFO unsigned int mnp) {
......@@ -90,7 +90,7 @@ static unsigned int g450_nextpll(CPMINFO const struct matrox_pll_limits* pi, uns
} else {
m--;
}
n = ((tvco * (m+1) + ACCESS_FBINFO(features).pll.ref_freq) / (ACCESS_FBINFO(features).pll.ref_freq * 2)) - 2;
n = ((tvco * (m+1) + minfo->features.pll.ref_freq) / (minfo->features.pll.ref_freq * 2)) - 2;
} while (n < 0x03 || n > 0x7A);
return (m << 16) | (n << 8) | p;
}
......@@ -333,7 +333,7 @@ static int __g450_setclk(WPMINFO unsigned int fout, unsigned int pll,
matroxfb_DAC_out(PMINFO M1064_XPIXCLKCTRL, tmp);
/* DVI PLL preferred for frequencies up to
panel link max, standard PLL otherwise */
if (fout >= MINFO->max_pixel_clock_panellink)
if (fout >= minfo->max_pixel_clock_panellink)
tmp = 0;
else tmp =
M1064_XDVICLKCTRL_DVIDATAPATHSEL |
......@@ -363,20 +363,20 @@ static int __g450_setclk(WPMINFO unsigned int fout, unsigned int pll,
}
mga_outb(M_MISC_REG, misc);
}
pi = &ACCESS_FBINFO(limits.pixel);
ci = &ACCESS_FBINFO(cache.pixel);
pi = &minfo->limits.pixel;
ci = &minfo->cache.pixel;
break;
case M_SYSTEM_PLL:
{
u_int32_t opt;
pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, &opt);
pci_read_config_dword(minfo->pcidev, PCI_OPTION_REG, &opt);
if (!(opt & 0x20)) {
pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, opt | 0x20);
pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, opt | 0x20);
}
}
pi = &ACCESS_FBINFO(limits.system);
ci = &ACCESS_FBINFO(cache.system);
pi = &minfo->limits.system;
ci = &minfo->cache.system;
break;
case M_VIDEO_PLL:
{
......@@ -395,8 +395,8 @@ static int __g450_setclk(WPMINFO unsigned int fout, unsigned int pll,
pixel_vco = g450_mnp2vco(PMINFO mnp);
matroxfb_DAC_unlock_irqrestore(flags);
}
pi = &ACCESS_FBINFO(limits.video);
ci = &ACCESS_FBINFO(cache.video);
pi = &minfo->limits.video;
ci = &minfo->cache.video;
break;
default:
return -EINVAL;
......@@ -475,7 +475,7 @@ static int __g450_setclk(WPMINFO unsigned int fout, unsigned int pll,
mnp = g450_findworkingpll(PMINFO pll, mnparray, mnpcount);
g450_addcache(ci, mnparray[0], mnp);
}
updatehwstate_clk(&ACCESS_FBINFO(hw), mnp, pll);
updatehwstate_clk(&minfo->hw, mnp, pll);
matroxfb_DAC_unlock_irqrestore(flags);
return mnp;
}
......
drivers/video/matrox/i2c-matroxfb.c
浏览文件 @ fc2d10dd
......@@ -112,7 +112,7 @@ static int i2c_bus_reg(struct i2c_bit_adapter* b, struct matrox_fb_info* minfo,
i2c_set_adapdata(&b->adapter, b);
b->adapter.class = class;
b->adapter.algo_data = &b->bac;
b->adapter.dev.parent = &ACCESS_FBINFO(pcidev)->dev;
b->adapter.dev.parent = &minfo->pcidev->dev;
b->bac = matrox_i2c_algo_template;
b->bac.data = b;
err = i2c_bit_add_bus(&b->adapter);
......@@ -153,7 +153,7 @@ static void* i2c_matroxfb_probe(struct matrox_fb_info* minfo) {
matroxfb_DAC_out(PMINFO DAC_XGENIOCTRL, 0x00);
matroxfb_DAC_unlock_irqrestore(flags);
switch (ACCESS_FBINFO(chip)) {
switch (minfo->chip) {
case MGA_2064:
case MGA_2164:
err = i2c_bus_reg(&m2info->ddc1, minfo,
......@@ -168,7 +168,7 @@ static void* i2c_matroxfb_probe(struct matrox_fb_info* minfo) {
}
if (err)
goto fail_ddc1;
if (ACCESS_FBINFO(devflags.dualhead)) {
if (minfo->devflags.dualhead) {
err = i2c_bus_reg(&m2info->ddc2, minfo,
DDC2_DATA, DDC2_CLK,
"DDC:fb%u #1", I2C_CLASS_DDC);
......
drivers/video/matrox/matroxfb_Ti3026.c
浏览文件 @ fc2d10dd
......@@ -295,11 +295,11 @@ static int Ti3026_calcclock(CPMINFO unsigned int freq, unsigned int fmax, int* i
static int Ti3026_setpclk(WPMINFO int clk) {
unsigned int f_pll;
unsigned int pixfeed, pixin, pixpost;
struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);
struct matrox_hw_state *hw = &minfo->hw;
DBG(__func__)
f_pll = Ti3026_calcclock(PMINFO clk, ACCESS_FBINFO(max_pixel_clock), &pixin, &pixfeed, &pixpost);
f_pll = Ti3026_calcclock(PMINFO clk, minfo->max_pixel_clock, &pixin, &pixfeed, &pixpost);
hw->DACclk[0] = pixin | 0xC0;
hw->DACclk[1] = pixfeed;
......@@ -309,9 +309,9 @@ static int Ti3026_setpclk(WPMINFO int clk) {
unsigned int loopfeed, loopin, looppost, loopdiv, z;
unsigned int Bpp;
Bpp = ACCESS_FBINFO(curr.final_bppShift);
Bpp = minfo->curr.final_bppShift;
if (ACCESS_FBINFO(fbcon).var.bits_per_pixel == 24) {
if (minfo->fbcon.var.bits_per_pixel == 24) {
loopfeed = 3; /* set lm to any possible value */
loopin = 3 * 32 / Bpp;
} else {
......@@ -330,18 +330,18 @@ static int Ti3026_setpclk(WPMINFO int clk) {
looppost = 3;
loopdiv = z/16;
}
if (ACCESS_FBINFO(fbcon).var.bits_per_pixel == 24) {
if (minfo->fbcon.var.bits_per_pixel == 24) {
hw->DACclk[3] = ((65 - loopin) & 0x3F) | 0xC0;
hw->DACclk[4] = (65 - loopfeed) | 0x80;
if (ACCESS_FBINFO(accel.ramdac_rev) > 0x20) {
if (isInterleave(MINFO))
if (minfo->accel.ramdac_rev > 0x20) {
if (isInterleave(minfo))
hw->DACreg[POS3026_XLATCHCTRL] = TVP3026B_XLATCHCTRL_8_3;
else {
hw->DACclk[4] &= ~0xC0;
hw->DACreg[POS3026_XLATCHCTRL] = TVP3026B_XLATCHCTRL_4_3;
}
} else {
if (isInterleave(MINFO))
if (isInterleave(minfo))
; /* default... */
else {
hw->DACclk[4] ^= 0xC0; /* change from 0x80 to 0x40 */
......@@ -349,7 +349,7 @@ static int Ti3026_setpclk(WPMINFO int clk) {
}
}
hw->DACclk[5] = looppost | 0xF8;
if (ACCESS_FBINFO(devflags.mga_24bpp_fix))
if (minfo->devflags.mga_24bpp_fix)
hw->DACclk[5] ^= 0x40;
} else {
hw->DACclk[3] = ((65 - loopin) & 0x3F) | 0xC0;
......@@ -362,13 +362,13 @@ static int Ti3026_setpclk(WPMINFO int clk) {
}
static int Ti3026_init(WPMINFO struct my_timming* m) {
u_int8_t muxctrl = isInterleave(MINFO) ? TVP3026_XMUXCTRL_MEMORY_64BIT : TVP3026_XMUXCTRL_MEMORY_32BIT;
struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);
u_int8_t muxctrl = isInterleave(minfo) ? TVP3026_XMUXCTRL_MEMORY_64BIT : TVP3026_XMUXCTRL_MEMORY_32BIT;
struct matrox_hw_state *hw = &minfo->hw;
DBG(__func__)
memcpy(hw->DACreg, MGADACbpp32, sizeof(hw->DACreg));
switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
switch (minfo->fbcon.var.bits_per_pixel) {
case 4: hw->DACreg[POS3026_XLATCHCTRL] = TVP3026_XLATCHCTRL_16_1; /* or _8_1, they are same */
hw->DACreg[POS3026_XTRUECOLORCTRL] = TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR;
hw->DACreg[POS3026_XMUXCTRL] = muxctrl | TVP3026_XMUXCTRL_PIXEL_4BIT;
......@@ -383,7 +383,7 @@ static int Ti3026_init(WPMINFO struct my_timming* m) {
break;
case 16:
/* XLATCHCTRL should be _4_1 / _2_1... Why is not? (_2_1 is used everytime) */
hw->DACreg[POS3026_XTRUECOLORCTRL] = (ACCESS_FBINFO(fbcon).var.green.length == 5)? (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_ORGB_1555 ) : (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_RGB_565);
hw->DACreg[POS3026_XTRUECOLORCTRL] = (minfo->fbcon.var.green.length == 5) ? (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_ORGB_1555) : (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_RGB_565);
hw->DACreg[POS3026_XMUXCTRL] = muxctrl | TVP3026_XMUXCTRL_PIXEL_16BIT;
hw->DACreg[POS3026_XCLKCTRL] = TVP3026_XCLKCTRL_SRC_PLL | TVP3026_XCLKCTRL_DIV2;
break;
......@@ -412,9 +412,9 @@ static int Ti3026_init(WPMINFO struct my_timming* m) {
hw->DACreg[POS3026_XGENCTRL] |= TVP3026_XGENCTRL_SYNC_ON_GREEN;
/* set DELAY */
if (ACCESS_FBINFO(video.len) < 0x400000)
if (minfo->video.len < 0x400000)
hw->CRTCEXT[3] |= 0x08;
else if (ACCESS_FBINFO(video.len) > 0x400000)
else if (minfo->video.len > 0x400000)
hw->CRTCEXT[3] |= 0x10;
/* set HWCURSOR */
......@@ -426,7 +426,7 @@ static int Ti3026_init(WPMINFO struct my_timming* m) {
/* set interleaving */
hw->MXoptionReg &= ~0x00001000;
if (isInterleave(MINFO)) hw->MXoptionReg |= 0x00001000;
if (isInterleave(minfo)) hw->MXoptionReg |= 0x00001000;
/* set DAC */
Ti3026_setpclk(PMINFO m->pixclock);
......@@ -442,7 +442,7 @@ static void ti3026_setMCLK(WPMINFO int fout){
DBG(__func__)
f_pll = Ti3026_calcclock(PMINFO fout, ACCESS_FBINFO(max_pixel_clock), &mclk_n, &mclk_m, &mclk_p);
f_pll = Ti3026_calcclock(PMINFO fout, minfo->max_pixel_clock, &mclk_n, &mclk_m, &mclk_p);
/* save pclk */
outTi3026(PMINFO TVP3026_XPLLADDR, 0xFC);
......@@ -496,7 +496,7 @@ static void ti3026_setMCLK(WPMINFO int fout){
printk(KERN_ERR "matroxfb: Memory PLL not locked after 5 secs\n");
f_pll = f_pll * 333 / (10000 << mclk_p);
if (isMilleniumII(MINFO)) {
if (isMilleniumII(minfo)) {
rfhcnt = (f_pll - 128) / 256;
if (rfhcnt > 15)
rfhcnt = 15;
......@@ -505,8 +505,8 @@ static void ti3026_setMCLK(WPMINFO int fout){
if (rfhcnt > 15)
rfhcnt = 0;
}
ACCESS_FBINFO(hw).MXoptionReg = (ACCESS_FBINFO(hw).MXoptionReg & ~0x000F0000) | (rfhcnt << 16);
pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, ACCESS_FBINFO(hw).MXoptionReg);
minfo->hw.MXoptionReg = (minfo->hw.MXoptionReg & ~0x000F0000) | (rfhcnt << 16);
pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg);
/* output MCLK to MCLK pin */
outTi3026(PMINFO TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL);
......@@ -536,14 +536,14 @@ static void ti3026_ramdac_init(WPMINFO2) {
DBG(__func__)
ACCESS_FBINFO(features.pll.vco_freq_min) = 110000;
ACCESS_FBINFO(features.pll.ref_freq) = 114545;
ACCESS_FBINFO(features.pll.feed_div_min) = 2;
ACCESS_FBINFO(features.pll.feed_div_max) = 24;
ACCESS_FBINFO(features.pll.in_div_min) = 2;
ACCESS_FBINFO(features.pll.in_div_max) = 63;
ACCESS_FBINFO(features.pll.post_shift_max) = 3;
if (ACCESS_FBINFO(devflags.noinit))
minfo->features.pll.vco_freq_min = 110000;
minfo->features.pll.ref_freq = 114545;
minfo->features.pll.feed_div_min = 2;
minfo->features.pll.feed_div_max = 24;
minfo->features.pll.in_div_min = 2;
minfo->features.pll.in_div_max = 63;
minfo->features.pll.post_shift_max = 3;
if (minfo->devflags.noinit)
return;
ti3026_setMCLK(PMINFO 60000);
}
......@@ -551,7 +551,7 @@ static void ti3026_ramdac_init(WPMINFO2) {
static void Ti3026_restore(WPMINFO2) {
int i;
unsigned char progdac[6];
struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);
struct matrox_hw_state *hw = &minfo->hw;
CRITFLAGS
DBG(__func__)
......@@ -565,7 +565,7 @@ static void Ti3026_restore(WPMINFO2) {
CRITBEGIN
pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, hw->MXoptionReg);
pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg);
CRITEND
......@@ -573,7 +573,7 @@ static void Ti3026_restore(WPMINFO2) {
CRITBEGIN
ACCESS_FBINFO(crtc1.panpos) = -1;
minfo->crtc1.panpos = -1;
for (i = 0; i < 6; i++)
mga_setr(M_EXTVGA_INDEX, i, hw->CRTCEXT[i]);
......@@ -678,35 +678,35 @@ static int Ti3026_preinit(WPMINFO2) {
static const int vxres_mill1[] = { 640, 768, 800, 960,
1024, 1152, 1280, 1600, 1920,
2048, 0};
struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);
struct matrox_hw_state *hw = &minfo->hw;
DBG(__func__)
ACCESS_FBINFO(millenium) = 1;
ACCESS_FBINFO(milleniumII) = (ACCESS_FBINFO(pcidev)->device != PCI_DEVICE_ID_MATROX_MIL);
ACCESS_FBINFO(capable.cfb4) = 1;
ACCESS_FBINFO(capable.text) = 1; /* isMilleniumII(MINFO); */
ACCESS_FBINFO(capable.vxres) = isMilleniumII(MINFO)?vxres_mill2:vxres_mill1;
minfo->millenium = 1;
minfo->milleniumII = (minfo->pcidev->device != PCI_DEVICE_ID_MATROX_MIL);
minfo->capable.cfb4 = 1;
minfo->capable.text = 1; /* isMilleniumII(minfo); */
minfo->capable.vxres = isMilleniumII(minfo) ? vxres_mill2 : vxres_mill1;
ACCESS_FBINFO(outputs[0]).data = MINFO;
ACCESS_FBINFO(outputs[0]).output = &ti3026_output;
ACCESS_FBINFO(outputs[0]).src = ACCESS_FBINFO(outputs[0]).default_src;
ACCESS_FBINFO(outputs[0]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
minfo->outputs[0].data = minfo;
minfo->outputs[0].output = &ti3026_output;
minfo->outputs[0].src = minfo->outputs[0].default_src;
minfo->outputs[0].mode = MATROXFB_OUTPUT_MODE_MONITOR;
if (ACCESS_FBINFO(devflags.noinit))
if (minfo->devflags.noinit)
return 0;
/* preserve VGA I/O, BIOS and PPC */
hw->MXoptionReg &= 0xC0000100;
hw->MXoptionReg |= 0x002C0000;
if (ACCESS_FBINFO(devflags.novga))
if (minfo->devflags.novga)
hw->MXoptionReg &= ~0x00000100;
if (ACCESS_FBINFO(devflags.nobios))
if (minfo->devflags.nobios)
hw->MXoptionReg &= ~0x40000000;
if (ACCESS_FBINFO(devflags.nopciretry))
if (minfo->devflags.nopciretry)
hw->MXoptionReg |= 0x20000000;
pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, hw->MXoptionReg);
pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg);
ACCESS_FBINFO(accel.ramdac_rev) = inTi3026(PMINFO TVP3026_XSILICONREV);
minfo->accel.ramdac_rev = inTi3026(PMINFO TVP3026_XSILICONREV);
outTi3026(PMINFO TVP3026_XCLKCTRL, TVP3026_XCLKCTRL_SRC_CLK0VGA | TVP3026_XCLKCTRL_CLKSTOPPED);
outTi3026(PMINFO TVP3026_XTRUECOLORCTRL, TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR);
......
drivers/video/matrox/matroxfb_accel.c
浏览文件 @ fc2d10dd
......@@ -81,7 +81,7 @@
#include "matroxfb_Ti3026.h"
#include "matroxfb_misc.h"
#define curr_ydstorg(x) ACCESS_FBINFO2(x, curr.ydstorg.pixels)
#define curr_ydstorg(x) ((x)->curr.ydstorg.pixels)
#define mga_ydstlen(y,l) mga_outl(M_YDSTLEN | M_EXEC, ((y) << 16) | (l))
......@@ -115,59 +115,59 @@ void matrox_cfbX_init(WPMINFO2) {
DBG(__func__)
mpitch = ACCESS_FBINFO(fbcon).var.xres_virtual;
mpitch = minfo->fbcon.var.xres_virtual;
ACCESS_FBINFO(fbops).fb_copyarea = cfb_copyarea;
ACCESS_FBINFO(fbops).fb_fillrect = cfb_fillrect;
ACCESS_FBINFO(fbops).fb_imageblit = cfb_imageblit;
ACCESS_FBINFO(fbops).fb_cursor = NULL;
minfo->fbops.fb_copyarea = cfb_copyarea;
minfo->fbops.fb_fillrect = cfb_fillrect;
minfo->fbops.fb_imageblit = cfb_imageblit;
minfo->fbops.fb_cursor = NULL;
accel = (ACCESS_FBINFO(fbcon).var.accel_flags & FB_ACCELF_TEXT) == FB_ACCELF_TEXT;
accel = (minfo->fbcon.var.accel_flags & FB_ACCELF_TEXT) == FB_ACCELF_TEXT;
switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
switch (minfo->fbcon.var.bits_per_pixel) {
case 4: maccess = 0x00000000; /* accelerate as 8bpp video */
mpitch = (mpitch >> 1) | 0x8000; /* disable linearization */
mopmode = M_OPMODE_4BPP;
matrox_cfb4_pal(ACCESS_FBINFO(cmap));
matrox_cfb4_pal(minfo->cmap);
if (accel && !(mpitch & 1)) {
ACCESS_FBINFO(fbops).fb_copyarea = matroxfb_cfb4_copyarea;
ACCESS_FBINFO(fbops).fb_fillrect = matroxfb_cfb4_fillrect;
minfo->fbops.fb_copyarea = matroxfb_cfb4_copyarea;
minfo->fbops.fb_fillrect = matroxfb_cfb4_fillrect;
}
break;
case 8: maccess = 0x00000000;
mopmode = M_OPMODE_8BPP;
matrox_cfb8_pal(ACCESS_FBINFO(cmap));
matrox_cfb8_pal(minfo->cmap);
if (accel) {
ACCESS_FBINFO(fbops).fb_copyarea = matroxfb_copyarea;
ACCESS_FBINFO(fbops).fb_fillrect = matroxfb_fillrect;
ACCESS_FBINFO(fbops).fb_imageblit = matroxfb_imageblit;
minfo->fbops.fb_copyarea = matroxfb_copyarea;
minfo->fbops.fb_fillrect = matroxfb_fillrect;
minfo->fbops.fb_imageblit = matroxfb_imageblit;
}
break;
case 16: if (ACCESS_FBINFO(fbcon).var.green.length == 5)
case 16: if (minfo->fbcon.var.green.length == 5)
maccess = 0xC0000001;
else
maccess = 0x40000001;
mopmode = M_OPMODE_16BPP;
if (accel) {
ACCESS_FBINFO(fbops).fb_copyarea = matroxfb_copyarea;
ACCESS_FBINFO(fbops).fb_fillrect = matroxfb_fillrect;
ACCESS_FBINFO(fbops).fb_imageblit = matroxfb_imageblit;
minfo->fbops.fb_copyarea = matroxfb_copyarea;
minfo->fbops.fb_fillrect = matroxfb_fillrect;
minfo->fbops.fb_imageblit = matroxfb_imageblit;
}
break;
case 24: maccess = 0x00000003;
mopmode = M_OPMODE_24BPP;
if (accel) {
ACCESS_FBINFO(fbops).fb_copyarea = matroxfb_copyarea;
ACCESS_FBINFO(fbops).fb_fillrect = matroxfb_fillrect;
ACCESS_FBINFO(fbops).fb_imageblit = matroxfb_imageblit;
minfo->fbops.fb_copyarea = matroxfb_copyarea;
minfo->fbops.fb_fillrect = matroxfb_fillrect;
minfo->fbops.fb_imageblit = matroxfb_imageblit;
}
break;
case 32: maccess = 0x00000002;
mopmode = M_OPMODE_32BPP;
if (accel) {
ACCESS_FBINFO(fbops).fb_copyarea = matroxfb_copyarea;
ACCESS_FBINFO(fbops).fb_fillrect = matroxfb_fillrect;
ACCESS_FBINFO(fbops).fb_imageblit = matroxfb_imageblit;
minfo->fbops.fb_copyarea = matroxfb_copyarea;
minfo->fbops.fb_fillrect = matroxfb_fillrect;
minfo->fbops.fb_imageblit = matroxfb_imageblit;
}
break;
default: maccess = 0x00000000;
......@@ -176,10 +176,10 @@ void matrox_cfbX_init(WPMINFO2) {
}
mga_fifo(8);
mga_outl(M_PITCH, mpitch);
mga_outl(M_YDSTORG, curr_ydstorg(MINFO));
if (ACCESS_FBINFO(capable.plnwt))
mga_outl(M_YDSTORG, curr_ydstorg(minfo));
if (minfo->capable.plnwt)
mga_outl(M_PLNWT, -1);
if (ACCESS_FBINFO(capable.srcorg)) {
if (minfo->capable.srcorg) {
mga_outl(M_SRCORG, 0);
mga_outl(M_DSTORG, 0);
}
......@@ -188,9 +188,9 @@ void matrox_cfbX_init(WPMINFO2) {
mga_outl(M_YTOP, 0);
mga_outl(M_YBOT, 0x01FFFFFF);
mga_outl(M_MACCESS, maccess);
ACCESS_FBINFO(accel.m_dwg_rect) = M_DWG_TRAP | M_DWG_SOLID | M_DWG_ARZERO | M_DWG_SGNZERO | M_DWG_SHIFTZERO;
if (isMilleniumII(MINFO)) ACCESS_FBINFO(accel.m_dwg_rect) |= M_DWG_TRANSC;
ACCESS_FBINFO(accel.m_opmode) = mopmode;
minfo->accel.m_dwg_rect = M_DWG_TRAP | M_DWG_SOLID | M_DWG_ARZERO | M_DWG_SGNZERO | M_DWG_SHIFTZERO;
if (isMilleniumII(minfo)) minfo->accel.m_dwg_rect |= M_DWG_TRANSC;
minfo->accel.m_opmode = mopmode;
}
EXPORT_SYMBOL(matrox_cfbX_init);
......@@ -209,7 +209,7 @@ static void matrox_accel_bmove(WPMINFO int vxres, int sy, int sx, int dy, int dx
M_DWG_BFCOL | M_DWG_REPLACE);
mga_outl(M_AR5, vxres);
width--;
start = sy*vxres+sx+curr_ydstorg(MINFO);
start = sy*vxres+sx+curr_ydstorg(minfo);
end = start+width;
} else {
mga_fifo(3);
......@@ -217,7 +217,7 @@ static void matrox_accel_bmove(WPMINFO int vxres, int sy, int sx, int dy, int dx
mga_outl(M_SGN, 5);
mga_outl(M_AR5, -vxres);
width--;
end = (sy+height-1)*vxres+sx+curr_ydstorg(MINFO);
end = (sy+height-1)*vxres+sx+curr_ydstorg(minfo);
start = end+width;
dy += height-1;
}
......@@ -245,7 +245,7 @@ static void matrox_accel_bmove_lin(WPMINFO int vxres, int sy, int sx, int dy, in
M_DWG_BFCOL | M_DWG_REPLACE);
mga_outl(M_AR5, vxres);
width--;
start = sy*vxres+sx+curr_ydstorg(MINFO);
start = sy*vxres+sx+curr_ydstorg(minfo);
end = start+width;
} else {
mga_fifo(3);
......@@ -253,7 +253,7 @@ static void matrox_accel_bmove_lin(WPMINFO int vxres, int sy, int sx, int dy, in
mga_outl(M_SGN, 5);
mga_outl(M_AR5, -vxres);
width--;
end = (sy+height-1)*vxres+sx+curr_ydstorg(MINFO);
end = (sy+height-1)*vxres+sx+curr_ydstorg(minfo);
start = end+width;
dy += height-1;
}
......@@ -274,13 +274,13 @@ static void matroxfb_cfb4_copyarea(struct fb_info* info, const struct fb_copyare
if ((area->sx | area->dx | area->width) & 1)
cfb_copyarea(info, area);
else
matrox_accel_bmove_lin(PMINFO ACCESS_FBINFO(fbcon.var.xres_virtual) >> 1, area->sy, area->sx >> 1, area->dy, area->dx >> 1, area->height, area->width >> 1);
matrox_accel_bmove_lin(PMINFO minfo->fbcon.var.xres_virtual >> 1, area->sy, area->sx >> 1, area->dy, area->dx >> 1, area->height, area->width >> 1);
}
static void matroxfb_copyarea(struct fb_info* info, const struct fb_copyarea* area) {
MINFO_FROM_INFO(info);
matrox_accel_bmove(PMINFO ACCESS_FBINFO(fbcon.var.xres_virtual), area->sy, area->sx, area->dy, area->dx, area->height, area->width);
matrox_accel_bmove(PMINFO minfo->fbcon.var.xres_virtual, area->sy, area->sx, area->dy, area->dx, area->height, area->width);
}
static void matroxfb_accel_clear(WPMINFO u_int32_t color, int sy, int sx, int height,
......@@ -292,7 +292,7 @@ static void matroxfb_accel_clear(WPMINFO u_int32_t color, int sy, int sx, int he
CRITBEGIN
mga_fifo(5);
mga_outl(M_DWGCTL, ACCESS_FBINFO(accel.m_dwg_rect) | M_DWG_REPLACE);
mga_outl(M_DWGCTL, minfo->accel.m_dwg_rect | M_DWG_REPLACE);
mga_outl(M_FCOL, color);
mga_outl(M_FXBNDRY, ((sx + width) << 16) | sx);
mga_ydstlen(sy, height);
......@@ -333,16 +333,16 @@ static void matroxfb_cfb4_clear(WPMINFO u_int32_t bgx, int sy, int sx, int heigh
sx >>= 1;
if (width) {
mga_fifo(5);
mga_outl(M_DWGCTL, ACCESS_FBINFO(accel.m_dwg_rect) | M_DWG_REPLACE2);
mga_outl(M_DWGCTL, minfo->accel.m_dwg_rect | M_DWG_REPLACE2);
mga_outl(M_FCOL, bgx);
mga_outl(M_FXBNDRY, ((sx + width) << 16) | sx);
mga_outl(M_YDST, sy * ACCESS_FBINFO(fbcon).var.xres_virtual >> 6);
mga_outl(M_YDST, sy * minfo->fbcon.var.xres_virtual >> 6);
mga_outl(M_LEN | M_EXEC, height);
WaitTillIdle();
}
if (whattodo) {
u_int32_t step = ACCESS_FBINFO(fbcon).var.xres_virtual >> 1;
vaddr_t vbase = ACCESS_FBINFO(video.vbase);
u_int32_t step = minfo->fbcon.var.xres_virtual >> 1;
vaddr_t vbase = minfo->video.vbase;
if (whattodo & 1) {
unsigned int uaddr = sy * step + sx - 1;
u_int32_t loop;
......@@ -412,7 +412,7 @@ static void matroxfb_1bpp_imageblit(WPMINFO u_int32_t fgx, u_int32_t bgx,
mga_outl(M_FCOL, fgx);
mga_outl(M_BCOL, bgx);
fxbndry = ((xx + width - 1) << 16) | xx;
mmio = ACCESS_FBINFO(mmio.vbase);
mmio = minfo->mmio.vbase;
mga_fifo(6);
mga_writel(mmio, M_FXBNDRY, fxbndry);
......
drivers/video/matrox/matroxfb_base.h
浏览文件 @ fc2d10dd
......@@ -524,11 +524,6 @@ struct matrox_fb_info {
#define info2minfo(info) container_of(info, struct matrox_fb_info, fbcon)
#define ACCESS_FBINFO2(info, x) (info->x)
#define ACCESS_FBINFO(x) ACCESS_FBINFO2(minfo,x)
#define MINFO minfo
#define WPMINFO2 struct matrox_fb_info* minfo
#define WPMINFO WPMINFO2 ,
#define CPMINFO2 const struct matrox_fb_info* minfo
......@@ -707,11 +702,11 @@ void matroxfb_unregister_driver(struct matroxfb_driver* drv);
#endif
#endif
#define mga_inb(addr) mga_readb(ACCESS_FBINFO(mmio.vbase), (addr))
#define mga_inl(addr) mga_readl(ACCESS_FBINFO(mmio.vbase), (addr))
#define mga_outb(addr,val) mga_writeb(ACCESS_FBINFO(mmio.vbase), (addr), (val))
#define mga_outw(addr,val) mga_writew(ACCESS_FBINFO(mmio.vbase), (addr), (val))
#define mga_outl(addr,val) mga_writel(ACCESS_FBINFO(mmio.vbase), (addr), (val))
#define mga_inb(addr) mga_readb(minfo->mmio.vbase, (addr))
#define mga_inl(addr) mga_readl(minfo->mmio.vbase, (addr))
#define mga_outb(addr,val) mga_writeb(minfo->mmio.vbase, (addr), (val))
#define mga_outw(addr,val) mga_writew(minfo->mmio.vbase, (addr), (val))
#define mga_outl(addr,val) mga_writel(minfo->mmio.vbase, (addr), (val))
#define mga_readr(port,idx) (mga_outb((port),(idx)), mga_inb((port)+1))
#define mga_setr(addr,port,val) mga_outw(addr, ((val)<<8) | (port))
......@@ -730,10 +725,10 @@ void matroxfb_unregister_driver(struct matroxfb_driver* drv);
#define isMilleniumII(x) (0)
#endif
#define matroxfb_DAC_lock() spin_lock(&ACCESS_FBINFO(lock.DAC))
#define matroxfb_DAC_unlock() spin_unlock(&ACCESS_FBINFO(lock.DAC))
#define matroxfb_DAC_lock_irqsave(flags) spin_lock_irqsave(&ACCESS_FBINFO(lock.DAC),flags)
#define matroxfb_DAC_unlock_irqrestore(flags) spin_unlock_irqrestore(&ACCESS_FBINFO(lock.DAC),flags)
#define matroxfb_DAC_lock() spin_lock(&minfo->lock.DAC)
#define matroxfb_DAC_unlock() spin_unlock(&minfo->lock.DAC)
#define matroxfb_DAC_lock_irqsave(flags) spin_lock_irqsave(&minfo->lock.DAC, flags)
#define matroxfb_DAC_unlock_irqrestore(flags) spin_unlock_irqrestore(&minfo->lock.DAC, flags)
extern void matroxfb_DAC_out(CPMINFO int reg, int val);
extern int matroxfb_DAC_in(CPMINFO int reg);
extern void matroxfb_var2my(struct fb_var_screeninfo* fvsi, struct my_timming* mt);
......@@ -741,8 +736,8 @@ extern int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc);
extern int matroxfb_enable_irq(WPMINFO int reenable);
#ifdef MATROXFB_USE_SPINLOCKS
#define CRITBEGIN spin_lock_irqsave(&ACCESS_FBINFO(lock.accel), critflags);
#define CRITEND spin_unlock_irqrestore(&ACCESS_FBINFO(lock.accel), critflags);
#define CRITBEGIN spin_lock_irqsave(&minfo->lock.accel, critflags);
#define CRITEND spin_unlock_irqrestore(&minfo->lock.accel, critflags);
#define CRITFLAGS unsigned long critflags;
#else
#define CRITBEGIN
......
drivers/video/matrox/matroxfb_crtc2.c
浏览文件 @ fc2d10dd
......@@ -81,11 +81,11 @@ static void matroxfb_dh_restore(struct matroxfb_dh_fb_info* m2info,
}
tmp |= 0x00000001; /* enable CRTC2 */
datactl = 0;
if (ACCESS_FBINFO(outputs[1]).src == MATROXFB_SRC_CRTC2) {
if (ACCESS_FBINFO(devflags.g450dac)) {
if (minfo->outputs[1].src == MATROXFB_SRC_CRTC2) {
if (minfo->devflags.g450dac) {
tmp |= 0x00000006; /* source from secondary pixel PLL */
/* no vidrst when in monitor mode */
if (ACCESS_FBINFO(outputs[1]).mode != MATROXFB_OUTPUT_MODE_MONITOR) {
if (minfo->outputs[1].mode != MATROXFB_OUTPUT_MODE_MONITOR) {
tmp |= 0xC0001000; /* Enable H/V vidrst */
}
} else {
......@@ -93,11 +93,11 @@ static void matroxfb_dh_restore(struct matroxfb_dh_fb_info* m2info,
tmp |= 0xC0000000; /* enable vvidrst & hvidrst */
/* MGA TVO is our clock source */
}
} else if (ACCESS_FBINFO(outputs[0]).src == MATROXFB_SRC_CRTC2) {
} else if (minfo->outputs[0].src == MATROXFB_SRC_CRTC2) {
tmp |= 0x00000004; /* source from pixclock */
/* PIXPLL is our clock source */
}
if (ACCESS_FBINFO(outputs[0]).src == MATROXFB_SRC_CRTC2) {
if (minfo->outputs[0].src == MATROXFB_SRC_CRTC2) {
tmp |= 0x00100000; /* connect CRTC2 to DAC */
}
if (mt->interlaced) {
......@@ -146,7 +146,7 @@ static void matroxfb_dh_restore(struct matroxfb_dh_fb_info* m2info,
}
}
mga_outl(0x3C10, tmp);
ACCESS_FBINFO(hw).crtc2.ctl = tmp;
minfo->hw.crtc2.ctl = tmp;
tmp = mt->VDisplay << 16; /* line compare */
if (mt->sync & FB_SYNC_HOR_HIGH_ACT)
......@@ -160,7 +160,7 @@ static void matroxfb_dh_disable(struct matroxfb_dh_fb_info* m2info) {
MINFO_FROM(m2info->primary_dev);
mga_outl(0x3C10, 0x00000004); /* disable CRTC2, CRTC1->DAC1, PLL as clock source */
ACCESS_FBINFO(hw).crtc2.ctl = 0x00000004;
minfo->hw.crtc2.ctl = 0x00000004;
}
static void matroxfb_dh_pan_var(struct matroxfb_dh_fb_info* m2info,
......@@ -262,13 +262,13 @@ static int matroxfb_dh_open(struct fb_info* info, int user) {
#define m2info (container_of(info, struct matroxfb_dh_fb_info, fbcon))
MINFO_FROM(m2info->primary_dev);
if (MINFO) {
if (minfo) {
int err;
if (ACCESS_FBINFO(dead)) {
if (minfo->dead) {
return -ENXIO;
}
err = ACCESS_FBINFO(fbops).fb_open(&ACCESS_FBINFO(fbcon), user);
err = minfo->fbops.fb_open(&minfo->fbcon, user);
if (err) {
return err;
}
......@@ -282,8 +282,8 @@ static int matroxfb_dh_release(struct fb_info* info, int user) {
int err = 0;
MINFO_FROM(m2info->primary_dev);
if (MINFO) {
err = ACCESS_FBINFO(fbops).fb_release(&ACCESS_FBINFO(fbcon), user);
if (minfo) {
err = minfo->fbops.fb_release(&minfo->fbcon, user);
}
return err;
#undef m2info
......@@ -352,18 +352,18 @@ static int matroxfb_dh_set_par(struct fb_info* info) {
pos = (m2info->fbcon.var.yoffset * m2info->fbcon.var.xres_virtual + m2info->fbcon.var.xoffset) * m2info->fbcon.var.bits_per_pixel >> 3;
pos += m2info->video.offbase;
cnt = 0;
down_read(&ACCESS_FBINFO(altout).lock);
down_read(&minfo->altout.lock);
for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC2) {
if (minfo->outputs[out].src == MATROXFB_SRC_CRTC2) {
cnt++;
if (ACCESS_FBINFO(outputs[out]).output->compute) {
ACCESS_FBINFO(outputs[out]).output->compute(ACCESS_FBINFO(outputs[out]).data, &mt);
if (minfo->outputs[out].output->compute) {
minfo->outputs[out].output->compute(minfo->outputs[out].data, &mt);
}
}
}
ACCESS_FBINFO(crtc2).pixclock = mt.pixclock;
ACCESS_FBINFO(crtc2).mnp = mt.mnp;
up_read(&ACCESS_FBINFO(altout).lock);
minfo->crtc2.pixclock = mt.pixclock;
minfo->crtc2.mnp = mt.mnp;
up_read(&minfo->altout.lock);
if (cnt) {
matroxfb_dh_restore(m2info, &mt, mode, pos);
} else {
......@@ -371,20 +371,20 @@ static int matroxfb_dh_set_par(struct fb_info* info) {
}
DAC1064_global_init(PMINFO2);
DAC1064_global_restore(PMINFO2);
down_read(&ACCESS_FBINFO(altout).lock);
down_read(&minfo->altout.lock);
for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC2 &&
ACCESS_FBINFO(outputs[out]).output->program) {
ACCESS_FBINFO(outputs[out]).output->program(ACCESS_FBINFO(outputs[out]).data);
if (minfo->outputs[out].src == MATROXFB_SRC_CRTC2 &&
minfo->outputs[out].output->program) {
minfo->outputs[out].output->program(minfo->outputs[out].data);
}
}
for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC2 &&
ACCESS_FBINFO(outputs[out]).output->start) {
ACCESS_FBINFO(outputs[out]).output->start(ACCESS_FBINFO(outputs[out]).data);
if (minfo->outputs[out].src == MATROXFB_SRC_CRTC2 &&
minfo->outputs[out].output->start) {
minfo->outputs[out].output->start(minfo->outputs[out].data);
}
}
up_read(&ACCESS_FBINFO(altout).lock);
up_read(&minfo->altout.lock);
}
m2info->initialized = 1;
return 0;
......@@ -409,11 +409,11 @@ static int matroxfb_dh_get_vblank(const struct matroxfb_dh_fb_info* m2info, stru
/* compatibility stuff */
if (vblank->vcount >= m2info->fbcon.var.yres)
vblank->flags |= FB_VBLANK_VBLANKING;
if (test_bit(0, &ACCESS_FBINFO(irq_flags))) {
if (test_bit(0, &minfo->irq_flags)) {
vblank->flags |= FB_VBLANK_HAVE_COUNT;
/* Only one writer, aligned int value...
it should work without lock and without atomic_t */
vblank->count = ACCESS_FBINFO(crtc2).vsync.cnt;
vblank->count = minfo->crtc2.vsync.cnt;
}
return 0;
}
......@@ -455,7 +455,7 @@ static int matroxfb_dh_ioctl(struct fb_info *info,
case MATROXFB_GET_OUTPUT_MODE:
case MATROXFB_GET_ALL_OUTPUTS:
{
return ACCESS_FBINFO(fbcon.fbops)->fb_ioctl(&ACCESS_FBINFO(fbcon), cmd, arg);
return minfo->fbcon.fbops->fb_ioctl(&minfo->fbcon, cmd, arg);
}
case MATROXFB_SET_OUTPUT_CONNECTION:
{
......@@ -469,9 +469,9 @@ static int matroxfb_dh_ioctl(struct fb_info *info,
if (tmp & (1 << out)) {
if (out >= MATROXFB_MAX_OUTPUTS)
return -ENXIO;
if (!ACCESS_FBINFO(outputs[out]).output)
if (!minfo->outputs[out].output)
return -ENXIO;
switch (ACCESS_FBINFO(outputs[out]).src) {
switch (minfo->outputs[out].src) {
case MATROXFB_SRC_NONE:
case MATROXFB_SRC_CRTC2:
break;
......@@ -480,22 +480,22 @@ static int matroxfb_dh_ioctl(struct fb_info *info,
}
}
}
if (ACCESS_FBINFO(devflags.panellink)) {
if (minfo->devflags.panellink) {
if (tmp & MATROXFB_OUTPUT_CONN_DFP)
return -EINVAL;
if ((ACCESS_FBINFO(outputs[2]).src == MATROXFB_SRC_CRTC1) && tmp)
if ((minfo->outputs[2].src == MATROXFB_SRC_CRTC1) && tmp)
return -EBUSY;
}
changes = 0;
for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
if (tmp & (1 << out)) {
if (ACCESS_FBINFO(outputs[out]).src != MATROXFB_SRC_CRTC2) {
if (minfo->outputs[out].src != MATROXFB_SRC_CRTC2) {
changes = 1;
ACCESS_FBINFO(outputs[out]).src = MATROXFB_SRC_CRTC2;
minfo->outputs[out].src = MATROXFB_SRC_CRTC2;
}
} else if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC2) {
} else if (minfo->outputs[out].src == MATROXFB_SRC_CRTC2) {
changes = 1;
ACCESS_FBINFO(outputs[out]).src = MATROXFB_SRC_NONE;
minfo->outputs[out].src = MATROXFB_SRC_NONE;
}
}
if (!changes)
......@@ -509,7 +509,7 @@ static int matroxfb_dh_ioctl(struct fb_info *info,
int out;
for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC2) {
if (minfo->outputs[out].src == MATROXFB_SRC_CRTC2) {
conn |= 1 << out;
}
}
......@@ -523,8 +523,8 @@ static int matroxfb_dh_ioctl(struct fb_info *info,
int out;
for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
if (ACCESS_FBINFO(outputs[out]).output) {
switch (ACCESS_FBINFO(outputs[out]).src) {
if (minfo->outputs[out].output) {
switch (minfo->outputs[out].src) {
case MATROXFB_SRC_NONE:
case MATROXFB_SRC_CRTC2:
tmp |= 1 << out;
......@@ -532,9 +532,9 @@ static int matroxfb_dh_ioctl(struct fb_info *info,
}
}
}
if (ACCESS_FBINFO(devflags.panellink)) {
if (minfo->devflags.panellink) {
tmp &= ~MATROXFB_OUTPUT_CONN_DFP;
if (ACCESS_FBINFO(outputs[2]).src == MATROXFB_SRC_CRTC1) {
if (minfo->outputs[2].src == MATROXFB_SRC_CRTC1) {
tmp = 0;
}
}
......@@ -611,21 +611,21 @@ static int matroxfb_dh_regit(CPMINFO struct matroxfb_dh_fb_info* m2info) {
if (mem < 64*1024)
mem *= 1024;
mem &= ~0x00000FFF; /* PAGE_MASK? */
if (ACCESS_FBINFO(video.len_usable) + mem <= ACCESS_FBINFO(video.len))
m2info->video.offbase = ACCESS_FBINFO(video.len) - mem;
else if (ACCESS_FBINFO(video.len) < mem) {
if (minfo->video.len_usable + mem <= minfo->video.len)
m2info->video.offbase = minfo->video.len - mem;
else if (minfo->video.len < mem) {
return -ENOMEM;
} else { /* check yres on first head... */
m2info->video.borrowed = mem;
ACCESS_FBINFO(video.len_usable) -= mem;
m2info->video.offbase = ACCESS_FBINFO(video.len_usable);
minfo->video.len_usable -= mem;
m2info->video.offbase = minfo->video.len_usable;
}
m2info->video.base = ACCESS_FBINFO(video.base) + m2info->video.offbase;
m2info->video.base = minfo->video.base + m2info->video.offbase;
m2info->video.len = m2info->video.len_usable = m2info->video.len_maximum = mem;
m2info->video.vbase.vaddr = vaddr_va(ACCESS_FBINFO(video.vbase)) + m2info->video.offbase;
m2info->mmio.base = ACCESS_FBINFO(mmio.base);
m2info->mmio.vbase = ACCESS_FBINFO(mmio.vbase);
m2info->mmio.len = ACCESS_FBINFO(mmio.len);
m2info->video.vbase.vaddr = vaddr_va(minfo->video.vbase) + m2info->video.offbase;
m2info->mmio.base = minfo->mmio.base;
m2info->mmio.vbase = minfo->mmio.vbase;
m2info->mmio.len = minfo->mmio.len;
matroxfb_dh_init_fix(m2info);
if (register_framebuffer(&m2info->fbcon)) {
......@@ -633,10 +633,10 @@ static int matroxfb_dh_regit(CPMINFO struct matroxfb_dh_fb_info* m2info) {
}
if (!m2info->initialized)
fb_set_var(&m2info->fbcon, &matroxfb_dh_defined);
down_write(&ACCESS_FBINFO(crtc2.lock));
oldcrtc2 = ACCESS_FBINFO(crtc2.info);
ACCESS_FBINFO(crtc2.info) = m2info;
up_write(&ACCESS_FBINFO(crtc2.lock));
down_write(&minfo->crtc2.lock);
oldcrtc2 = minfo->crtc2.info;
minfo->crtc2.info = m2info;
up_write(&minfo->crtc2.lock);
if (oldcrtc2) {
printk(KERN_ERR "matroxfb_crtc2: Internal consistency check failed: crtc2 already present: %p\n",
oldcrtc2);
......@@ -654,7 +654,7 @@ static int matroxfb_dh_registerfb(struct matroxfb_dh_fb_info* m2info) {
return -1;
}
printk(KERN_INFO "matroxfb_crtc2: secondary head of fb%u was registered as fb%u\n",
ACCESS_FBINFO(fbcon.node), m2info->fbcon.node);
minfo->fbcon.node, m2info->fbcon.node);
m2info->fbcon_registered = 1;
return 0;
#undef minfo
......@@ -666,11 +666,11 @@ static void matroxfb_dh_deregisterfb(struct matroxfb_dh_fb_info* m2info) {
int id;
struct matroxfb_dh_fb_info* crtc2;
down_write(&ACCESS_FBINFO(crtc2.lock));
crtc2 = ACCESS_FBINFO(crtc2.info);
down_write(&minfo->crtc2.lock);
crtc2 = minfo->crtc2.info;
if (crtc2 == m2info)
ACCESS_FBINFO(crtc2.info) = NULL;
up_write(&ACCESS_FBINFO(crtc2.lock));
minfo->crtc2.info = NULL;
up_write(&minfo->crtc2.lock);
if (crtc2 != m2info) {
printk(KERN_ERR "matroxfb_crtc2: Internal consistency check failed: crtc2 mismatch at unload: %p != %p\n",
crtc2, m2info);
......@@ -680,7 +680,7 @@ static void matroxfb_dh_deregisterfb(struct matroxfb_dh_fb_info* m2info) {
id = m2info->fbcon.node;
unregister_framebuffer(&m2info->fbcon);
/* return memory back to primary head */
ACCESS_FBINFO(video.len_usable) += m2info->video.borrowed;
minfo->video.len_usable += m2info->video.borrowed;
printk(KERN_INFO "matroxfb_crtc2: fb%u unregistered\n", id);
m2info->fbcon_registered = 0;
}
......@@ -691,14 +691,14 @@ static void* matroxfb_crtc2_probe(struct matrox_fb_info* minfo) {
struct matroxfb_dh_fb_info* m2info;
/* hardware is CRTC2 incapable... */
if (!ACCESS_FBINFO(devflags.crtc2))
if (!minfo->devflags.crtc2)
return NULL;
m2info = kzalloc(sizeof(*m2info), GFP_KERNEL);
if (!m2info) {
printk(KERN_ERR "matroxfb_crtc2: Not enough memory for CRTC2 control structs\n");
return NULL;
}
m2info->primary_dev = MINFO;
m2info->primary_dev = minfo;
if (matroxfb_dh_registerfb(m2info)) {
kfree(m2info);
printk(KERN_ERR "matroxfb_crtc2: CRTC2 framebuffer failed to register\n");
......
drivers/video/matrox/matroxfb_g450.c
浏览文件 @ fc2d10dd
......@@ -81,7 +81,7 @@ static int get_ctrl_id(__u32 v4l2_id) {
}
static inline int* get_ctrl_ptr(WPMINFO unsigned int idx) {
return (int*)((char*)MINFO + g450_controls[idx].control);
return (int*)((char*)minfo + g450_controls[idx].control);
}
static void tvo_fill_defaults(WPMINFO2) {
......@@ -124,8 +124,8 @@ static void cve2_set_reg10(WPMINFO int reg, int val) {
}
static void g450_compute_bwlevel(CPMINFO int *bl, int *wl) {
const int b = ACCESS_FBINFO(altout.tvo_params.brightness) + BLMIN;
const int c = ACCESS_FBINFO(altout.tvo_params.contrast);
const int b = minfo->altout.tvo_params.brightness + BLMIN;
const int c = minfo->altout.tvo_params.contrast;
*bl = max(b - c, BLMIN);
*wl = min(b + c, WLMAX);
......@@ -509,31 +509,31 @@ static void cve2_init_TV(WPMINFO const struct mavenregs* m) {
static int matroxfb_g450_compute(void* md, struct my_timming* mt) {
MINFO_FROM(md);
dprintk(KERN_DEBUG "Computing, mode=%u\n", ACCESS_FBINFO(outputs[1]).mode);
dprintk(KERN_DEBUG "Computing, mode=%u\n", minfo->outputs[1].mode);
if (mt->crtc == MATROXFB_SRC_CRTC2 &&
ACCESS_FBINFO(outputs[1]).mode != MATROXFB_OUTPUT_MODE_MONITOR) {
minfo->outputs[1].mode != MATROXFB_OUTPUT_MODE_MONITOR) {
const struct output_desc* outd;
cve2_init_TVdata(ACCESS_FBINFO(outputs[1]).mode, &ACCESS_FBINFO(hw).maven, &outd);
cve2_init_TVdata(minfo->outputs[1].mode, &minfo->hw.maven, &outd);
{
int blacklevel, whitelevel;
g450_compute_bwlevel(PMINFO &blacklevel, &whitelevel);
ACCESS_FBINFO(hw).maven.regs[0x0E] = blacklevel >> 2;
ACCESS_FBINFO(hw).maven.regs[0x0F] = blacklevel & 3;
ACCESS_FBINFO(hw).maven.regs[0x1E] = whitelevel >> 2;
ACCESS_FBINFO(hw).maven.regs[0x1F] = whitelevel & 3;
minfo->hw.maven.regs[0x0E] = blacklevel >> 2;
minfo->hw.maven.regs[0x0F] = blacklevel & 3;
minfo->hw.maven.regs[0x1E] = whitelevel >> 2;
minfo->hw.maven.regs[0x1F] = whitelevel & 3;
ACCESS_FBINFO(hw).maven.regs[0x20] =
ACCESS_FBINFO(hw).maven.regs[0x22] = ACCESS_FBINFO(altout.tvo_params.saturation);
minfo->hw.maven.regs[0x20] =
minfo->hw.maven.regs[0x22] = minfo->altout.tvo_params.saturation;
ACCESS_FBINFO(hw).maven.regs[0x25] = ACCESS_FBINFO(altout.tvo_params.hue);
minfo->hw.maven.regs[0x25] = minfo->altout.tvo_params.hue;
if (ACCESS_FBINFO(altout.tvo_params.testout)) {
ACCESS_FBINFO(hw).maven.regs[0x05] |= 0x02;
if (minfo->altout.tvo_params.testout) {
minfo->hw.maven.regs[0x05] |= 0x02;
}
}
computeRegs(PMINFO &ACCESS_FBINFO(hw).maven, mt, outd);
computeRegs(PMINFO &minfo->hw.maven, mt, outd);
} else if (mt->mnp < 0) {
/* We must program clocks before CRTC2, otherwise interlaced mode
startup may fail */
......@@ -547,8 +547,8 @@ static int matroxfb_g450_compute(void* md, struct my_timming* mt) {
static int matroxfb_g450_program(void* md) {
MINFO_FROM(md);
if (ACCESS_FBINFO(outputs[1]).mode != MATROXFB_OUTPUT_MODE_MONITOR) {
cve2_init_TV(PMINFO &ACCESS_FBINFO(hw).maven);
if (minfo->outputs[1].mode != MATROXFB_OUTPUT_MODE_MONITOR) {
cve2_init_TV(PMINFO &minfo->hw.maven);
}
return 0;
}
......@@ -589,33 +589,33 @@ static struct matrox_altout matroxfb_g450_dvi = {
};
void matroxfb_g450_connect(WPMINFO2) {
if (ACCESS_FBINFO(devflags.g450dac)) {
down_write(&ACCESS_FBINFO(altout.lock));
if (minfo->devflags.g450dac) {
down_write(&minfo->altout.lock);
tvo_fill_defaults(PMINFO2);
ACCESS_FBINFO(outputs[1]).src = ACCESS_FBINFO(outputs[1]).default_src;
ACCESS_FBINFO(outputs[1]).data = MINFO;
ACCESS_FBINFO(outputs[1]).output = &matroxfb_g450_altout;
ACCESS_FBINFO(outputs[1]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
ACCESS_FBINFO(outputs[2]).src = ACCESS_FBINFO(outputs[2]).default_src;
ACCESS_FBINFO(outputs[2]).data = MINFO;
ACCESS_FBINFO(outputs[2]).output = &matroxfb_g450_dvi;
ACCESS_FBINFO(outputs[2]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
up_write(&ACCESS_FBINFO(altout.lock));
minfo->outputs[1].src = minfo->outputs[1].default_src;
minfo->outputs[1].data = minfo;
minfo->outputs[1].output = &matroxfb_g450_altout;
minfo->outputs[1].mode = MATROXFB_OUTPUT_MODE_MONITOR;
minfo->outputs[2].src = minfo->outputs[2].default_src;
minfo->outputs[2].data = minfo;
minfo->outputs[2].output = &matroxfb_g450_dvi;
minfo->outputs[2].mode = MATROXFB_OUTPUT_MODE_MONITOR;
up_write(&minfo->altout.lock);
}
}
void matroxfb_g450_shutdown(WPMINFO2) {
if (ACCESS_FBINFO(devflags.g450dac)) {
down_write(&ACCESS_FBINFO(altout.lock));
ACCESS_FBINFO(outputs[1]).src = MATROXFB_SRC_NONE;
ACCESS_FBINFO(outputs[1]).output = NULL;
ACCESS_FBINFO(outputs[1]).data = NULL;
ACCESS_FBINFO(outputs[1]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
ACCESS_FBINFO(outputs[2]).src = MATROXFB_SRC_NONE;
ACCESS_FBINFO(outputs[2]).output = NULL;
ACCESS_FBINFO(outputs[2]).data = NULL;
ACCESS_FBINFO(outputs[2]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
up_write(&ACCESS_FBINFO(altout.lock));
if (minfo->devflags.g450dac) {
down_write(&minfo->altout.lock);
minfo->outputs[1].src = MATROXFB_SRC_NONE;
minfo->outputs[1].output = NULL;
minfo->outputs[1].data = NULL;
minfo->outputs[1].mode = MATROXFB_OUTPUT_MODE_MONITOR;
minfo->outputs[2].src = MATROXFB_SRC_NONE;
minfo->outputs[2].output = NULL;
minfo->outputs[2].data = NULL;
minfo->outputs[2].mode = MATROXFB_OUTPUT_MODE_MONITOR;
up_write(&minfo->altout.lock);
}
}
......
drivers/video/matrox/matroxfb_maven.c
浏览文件 @ fc2d10dd
......@@ -460,7 +460,7 @@ static void maven_init_TVdata(const struct maven_data* md, struct mavenregs* dat
}, MATROXFB_OUTPUT_MODE_NTSC, 525, 60 };
MINFO_FROM(md->primary_head);
if (ACCESS_FBINFO(outputs[1]).mode == MATROXFB_OUTPUT_MODE_PAL)
if (minfo->outputs[1].mode == MATROXFB_OUTPUT_MODE_PAL)
*data = palregs;
else
*data = ntscregs;
......@@ -496,11 +496,11 @@ static void maven_init_TVdata(const struct maven_data* md, struct mavenregs* dat
/* Set saturation */
{
data->regs[0x20] =
data->regs[0x22] = ACCESS_FBINFO(altout.tvo_params.saturation);
data->regs[0x22] = minfo->altout.tvo_params.saturation;
}
/* Set HUE */
data->regs[0x25] = ACCESS_FBINFO(altout.tvo_params.hue);
data->regs[0x25] = minfo->altout.tvo_params.hue;
return;
}
......@@ -743,7 +743,7 @@ static inline int maven_compute_timming(struct maven_data* md,
unsigned int a, bv, c;
MINFO_FROM(md->primary_head);
m->mode = ACCESS_FBINFO(outputs[1]).mode;
m->mode = minfo->outputs[1].mode;
if (m->mode != MATROXFB_OUTPUT_MODE_MONITOR) {
unsigned int lmargin;
unsigned int umargin;
......@@ -1132,7 +1132,7 @@ static int maven_get_control (struct maven_data* md,
static int maven_out_compute(void* md, struct my_timming* mt) {
#define mdinfo ((struct maven_data*)md)
#define minfo (mdinfo->primary_head)
return maven_compute_timming(md, mt, &ACCESS_FBINFO(hw).maven);
return maven_compute_timming(md, mt, &minfo->hw.maven);
#undef minfo
#undef mdinfo
}
......@@ -1140,7 +1140,7 @@ static int maven_out_compute(void* md, struct my_timming* mt) {
static int maven_out_program(void* md) {
#define mdinfo ((struct maven_data*)md)
#define minfo (mdinfo->primary_head)
return maven_program_timming(md, &ACCESS_FBINFO(hw).maven);
return maven_program_timming(md, &minfo->hw.maven);
#undef minfo
#undef mdinfo
}
......@@ -1186,14 +1186,14 @@ static int maven_init_client(struct i2c_client* clnt) {
struct maven_data* md = i2c_get_clientdata(clnt);
MINFO_FROM(container_of(clnt->adapter, struct i2c_bit_adapter, adapter)->minfo);
md->primary_head = MINFO;
md->primary_head = minfo;
md->client = clnt;
down_write(&ACCESS_FBINFO(altout.lock));
ACCESS_FBINFO(outputs[1]).output = &maven_altout;
ACCESS_FBINFO(outputs[1]).src = ACCESS_FBINFO(outputs[1]).default_src;
ACCESS_FBINFO(outputs[1]).data = md;
ACCESS_FBINFO(outputs[1]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
up_write(&ACCESS_FBINFO(altout.lock));
down_write(&minfo->altout.lock);
minfo->outputs[1].output = &maven_altout;
minfo->outputs[1].src = minfo->outputs[1].default_src;
minfo->outputs[1].data = md;
minfo->outputs[1].mode = MATROXFB_OUTPUT_MODE_MONITOR;
up_write(&minfo->altout.lock);
if (maven_get_reg(clnt, 0xB2) < 0x14) {
md->version = MGATVO_B;
/* Tweak some things for this old chip */
......@@ -1220,12 +1220,12 @@ static int maven_shutdown_client(struct i2c_client* clnt) {
if (md->primary_head) {
MINFO_FROM(md->primary_head);
down_write(&ACCESS_FBINFO(altout.lock));
ACCESS_FBINFO(outputs[1]).src = MATROXFB_SRC_NONE;
ACCESS_FBINFO(outputs[1]).output = NULL;
ACCESS_FBINFO(outputs[1]).data = NULL;
ACCESS_FBINFO(outputs[1]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
up_write(&ACCESS_FBINFO(altout.lock));
down_write(&minfo->altout.lock);
minfo->outputs[1].src = MATROXFB_SRC_NONE;
minfo->outputs[1].output = NULL;
minfo->outputs[1].data = NULL;
minfo->outputs[1].mode = MATROXFB_OUTPUT_MODE_MONITOR;
up_write(&minfo->altout.lock);
md->primary_head = NULL;
}
return 0;
......
drivers/video/matrox/matroxfb_misc.c
浏览文件 @ fc2d10dd
......@@ -190,7 +190,7 @@ int matroxfb_vgaHWinit(WPMINFO struct my_timming* m) {
unsigned int wd;
unsigned int divider;
int i;
struct matrox_hw_state * const hw = &ACCESS_FBINFO(hw);
struct matrox_hw_state * const hw = &minfo->hw;
DBG(__func__)
......@@ -240,7 +240,7 @@ int matroxfb_vgaHWinit(WPMINFO struct my_timming* m) {
/* standard timmings are in 8pixels, but for interleaved we cannot */
/* do it for 4bpp (because of (4bpp >> 1(interleaved))/4 == 0) */
/* using 16 or more pixels per unit can save us */
divider = ACCESS_FBINFO(curr.final_bppShift);
divider = minfo->curr.final_bppShift;
while (divider & 3) {
hd >>= 1;
hs >>= 1;
......@@ -270,7 +270,7 @@ int matroxfb_vgaHWinit(WPMINFO struct my_timming* m) {
if (((ht & 0x07) == 0x06) || ((ht & 0x0F) == 0x04))
ht++;
hbe = ht;
wd = ACCESS_FBINFO(fbcon).var.xres_virtual * ACCESS_FBINFO(curr.final_bppShift) / 64;
wd = minfo->fbcon.var.xres_virtual * minfo->curr.final_bppShift / 64;
hw->CRTCEXT[0] = 0;
hw->CRTCEXT[5] = 0;
......@@ -287,7 +287,7 @@ int matroxfb_vgaHWinit(WPMINFO struct my_timming* m) {
((hs & 0x100) >> 6) | /* sync start */
(hbe & 0x040); /* end hor. blanking */
/* FIXME: Enable vidrst only on G400, and only if TV-out is used */
if (ACCESS_FBINFO(outputs[1]).src == MATROXFB_SRC_CRTC1)
if (minfo->outputs[1].src == MATROXFB_SRC_CRTC1)
hw->CRTCEXT[1] |= 0x88; /* enable horizontal and vertical vidrst */
hw->CRTCEXT[2] = ((vt & 0xC00) >> 10) |
((vd & 0x400) >> 8) | /* disp end */
......@@ -333,7 +333,7 @@ int matroxfb_vgaHWinit(WPMINFO struct my_timming* m) {
void matroxfb_vgaHWrestore(WPMINFO2) {
int i;
struct matrox_hw_state * const hw = &ACCESS_FBINFO(hw);
struct matrox_hw_state * const hw = &minfo->hw;
CRITFLAGS
DBG(__func__)
......@@ -533,98 +533,98 @@ static int parse_pins1(WPMINFO const struct matrox_bios* bd) {
if (get_unaligned_le16(bd->pins + 24)) {
maxdac = get_unaligned_le16(bd->pins + 24) * 10;
}
MINFO->limits.pixel.vcomax = maxdac;
MINFO->values.pll.system = get_unaligned_le16(bd->pins + 28) ?
minfo->limits.pixel.vcomax = maxdac;
minfo->values.pll.system = get_unaligned_le16(bd->pins + 28) ?
get_unaligned_le16(bd->pins + 28) * 10 : 50000;
/* ignore 4MB, 8MB, module clocks */
MINFO->features.pll.ref_freq = 14318;
MINFO->values.reg.mctlwtst = 0x00030101;
minfo->features.pll.ref_freq = 14318;
minfo->values.reg.mctlwtst = 0x00030101;
return 0;
}
static void default_pins1(WPMINFO2) {
/* Millennium */
MINFO->limits.pixel.vcomax = 220000;
MINFO->values.pll.system = 50000;
MINFO->features.pll.ref_freq = 14318;
MINFO->values.reg.mctlwtst = 0x00030101;
minfo->limits.pixel.vcomax = 220000;
minfo->values.pll.system = 50000;
minfo->features.pll.ref_freq = 14318;
minfo->values.reg.mctlwtst = 0x00030101;
}
static int parse_pins2(WPMINFO const struct matrox_bios* bd) {
MINFO->limits.pixel.vcomax =
MINFO->limits.system.vcomax = (bd->pins[41] == 0xFF) ? 230000 : ((bd->pins[41] + 100) * 1000);
MINFO->values.reg.mctlwtst = ((bd->pins[51] & 0x01) ? 0x00000001 : 0) |
minfo->limits.pixel.vcomax =
minfo->limits.system.vcomax = (bd->pins[41] == 0xFF) ? 230000 : ((bd->pins[41] + 100) * 1000);
minfo->values.reg.mctlwtst = ((bd->pins[51] & 0x01) ? 0x00000001 : 0) |
((bd->pins[51] & 0x02) ? 0x00000100 : 0) |
((bd->pins[51] & 0x04) ? 0x00010000 : 0) |
((bd->pins[51] & 0x08) ? 0x00020000 : 0);
MINFO->values.pll.system = (bd->pins[43] == 0xFF) ? 50000 : ((bd->pins[43] + 100) * 1000);
MINFO->features.pll.ref_freq = 14318;
minfo->values.pll.system = (bd->pins[43] == 0xFF) ? 50000 : ((bd->pins[43] + 100) * 1000);
minfo->features.pll.ref_freq = 14318;
return 0;
}
static void default_pins2(WPMINFO2) {
/* Millennium II, Mystique */
MINFO->limits.pixel.vcomax =
MINFO->limits.system.vcomax = 230000;
MINFO->values.reg.mctlwtst = 0x00030101;
MINFO->values.pll.system = 50000;
MINFO->features.pll.ref_freq = 14318;
minfo->limits.pixel.vcomax =
minfo->limits.system.vcomax = 230000;
minfo->values.reg.mctlwtst = 0x00030101;
minfo->values.pll.system = 50000;
minfo->features.pll.ref_freq = 14318;
}
static int parse_pins3(WPMINFO const struct matrox_bios* bd) {
MINFO->limits.pixel.vcomax =
MINFO->limits.system.vcomax = (bd->pins[36] == 0xFF) ? 230000 : ((bd->pins[36] + 100) * 1000);
MINFO->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 48) == 0xFFFFFFFF ?
minfo->limits.pixel.vcomax =
minfo->limits.system.vcomax = (bd->pins[36] == 0xFF) ? 230000 : ((bd->pins[36] + 100) * 1000);
minfo->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 48) == 0xFFFFFFFF ?
0x01250A21 : get_unaligned_le32(bd->pins + 48);
/* memory config */
MINFO->values.reg.memrdbk = ((bd->pins[57] << 21) & 0x1E000000) |
minfo->values.reg.memrdbk = ((bd->pins[57] << 21) & 0x1E000000) |
((bd->pins[57] << 22) & 0x00C00000) |
((bd->pins[56] << 1) & 0x000001E0) |
( bd->pins[56] & 0x0000000F);
MINFO->values.reg.opt = (bd->pins[54] & 7) << 10;
MINFO->values.reg.opt2 = bd->pins[58] << 12;
MINFO->features.pll.ref_freq = (bd->pins[52] & 0x20) ? 14318 : 27000;
minfo->values.reg.opt = (bd->pins[54] & 7) << 10;
minfo->values.reg.opt2 = bd->pins[58] << 12;
minfo->features.pll.ref_freq = (bd->pins[52] & 0x20) ? 14318 : 27000;
return 0;
}
static void default_pins3(WPMINFO2) {
/* G100, G200 */
MINFO->limits.pixel.vcomax =
MINFO->limits.system.vcomax = 230000;
MINFO->values.reg.mctlwtst = 0x01250A21;
MINFO->values.reg.memrdbk = 0x00000000;
MINFO->values.reg.opt = 0x00000C00;
MINFO->values.reg.opt2 = 0x00000000;
MINFO->features.pll.ref_freq = 27000;
minfo->limits.pixel.vcomax =
minfo->limits.system.vcomax = 230000;
minfo->values.reg.mctlwtst = 0x01250A21;
minfo->values.reg.memrdbk = 0x00000000;
minfo->values.reg.opt = 0x00000C00;
minfo->values.reg.opt2 = 0x00000000;
minfo->features.pll.ref_freq = 27000;
}
static int parse_pins4(WPMINFO const struct matrox_bios* bd) {
MINFO->limits.pixel.vcomax = (bd->pins[ 39] == 0xFF) ? 230000 : bd->pins[ 39] * 4000;
MINFO->limits.system.vcomax = (bd->pins[ 38] == 0xFF) ? MINFO->limits.pixel.vcomax : bd->pins[ 38] * 4000;
MINFO->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 71);
MINFO->values.reg.memrdbk = ((bd->pins[87] << 21) & 0x1E000000) |
minfo->limits.pixel.vcomax = (bd->pins[ 39] == 0xFF) ? 230000 : bd->pins[ 39] * 4000;
minfo->limits.system.vcomax = (bd->pins[ 38] == 0xFF) ? minfo->limits.pixel.vcomax : bd->pins[ 38] * 4000;
minfo->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 71);
minfo->values.reg.memrdbk = ((bd->pins[87] << 21) & 0x1E000000) |
((bd->pins[87] << 22) & 0x00C00000) |
((bd->pins[86] << 1) & 0x000001E0) |
( bd->pins[86] & 0x0000000F);
MINFO->values.reg.opt = ((bd->pins[53] << 15) & 0x00400000) |
minfo->values.reg.opt = ((bd->pins[53] << 15) & 0x00400000) |
((bd->pins[53] << 22) & 0x10000000) |
((bd->pins[53] << 7) & 0x00001C00);
MINFO->values.reg.opt3 = get_unaligned_le32(bd->pins + 67);
MINFO->values.pll.system = (bd->pins[ 65] == 0xFF) ? 200000 : bd->pins[ 65] * 4000;
MINFO->features.pll.ref_freq = (bd->pins[ 92] & 0x01) ? 14318 : 27000;
minfo->values.reg.opt3 = get_unaligned_le32(bd->pins + 67);
minfo->values.pll.system = (bd->pins[ 65] == 0xFF) ? 200000 : bd->pins[ 65] * 4000;
minfo->features.pll.ref_freq = (bd->pins[ 92] & 0x01) ? 14318 : 27000;
return 0;
}
static void default_pins4(WPMINFO2) {
/* G400 */
MINFO->limits.pixel.vcomax =
MINFO->limits.system.vcomax = 252000;
MINFO->values.reg.mctlwtst = 0x04A450A1;
MINFO->values.reg.memrdbk = 0x000000E7;
MINFO->values.reg.opt = 0x10000400;
MINFO->values.reg.opt3 = 0x0190A419;
MINFO->values.pll.system = 200000;
MINFO->features.pll.ref_freq = 27000;
minfo->limits.pixel.vcomax =
minfo->limits.system.vcomax = 252000;
minfo->values.reg.mctlwtst = 0x04A450A1;
minfo->values.reg.memrdbk = 0x000000E7;
minfo->values.reg.opt = 0x10000400;
minfo->values.reg.opt3 = 0x0190A419;
minfo->values.pll.system = 200000;
minfo->features.pll.ref_freq = 27000;
}
static int parse_pins5(WPMINFO const struct matrox_bios* bd) {
......@@ -632,65 +632,65 @@ static int parse_pins5(WPMINFO const struct matrox_bios* bd) {
mult = bd->pins[4]?8000:6000;
MINFO->limits.pixel.vcomax = (bd->pins[ 38] == 0xFF) ? 600000 : bd->pins[ 38] * mult;
MINFO->limits.system.vcomax = (bd->pins[ 36] == 0xFF) ? MINFO->limits.pixel.vcomax : bd->pins[ 36] * mult;
MINFO->limits.video.vcomax = (bd->pins[ 37] == 0xFF) ? MINFO->limits.system.vcomax : bd->pins[ 37] * mult;
MINFO->limits.pixel.vcomin = (bd->pins[123] == 0xFF) ? 256000 : bd->pins[123] * mult;
MINFO->limits.system.vcomin = (bd->pins[121] == 0xFF) ? MINFO->limits.pixel.vcomin : bd->pins[121] * mult;
MINFO->limits.video.vcomin = (bd->pins[122] == 0xFF) ? MINFO->limits.system.vcomin : bd->pins[122] * mult;
MINFO->values.pll.system =
MINFO->values.pll.video = (bd->pins[ 92] == 0xFF) ? 284000 : bd->pins[ 92] * 4000;
MINFO->values.reg.opt = get_unaligned_le32(bd->pins + 48);
MINFO->values.reg.opt2 = get_unaligned_le32(bd->pins + 52);
MINFO->values.reg.opt3 = get_unaligned_le32(bd->pins + 94);
MINFO->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 98);
MINFO->values.reg.memmisc = get_unaligned_le32(bd->pins + 102);
MINFO->values.reg.memrdbk = get_unaligned_le32(bd->pins + 106);
MINFO->features.pll.ref_freq = (bd->pins[110] & 0x01) ? 14318 : 27000;
MINFO->values.memory.ddr = (bd->pins[114] & 0x60) == 0x20;
MINFO->values.memory.dll = (bd->pins[115] & 0x02) != 0;
MINFO->values.memory.emrswen = (bd->pins[115] & 0x01) != 0;
MINFO->values.reg.maccess = MINFO->values.memory.emrswen ? 0x00004000 : 0x00000000;
minfo->limits.pixel.vcomax = (bd->pins[ 38] == 0xFF) ? 600000 : bd->pins[ 38] * mult;
minfo->limits.system.vcomax = (bd->pins[ 36] == 0xFF) ? minfo->limits.pixel.vcomax : bd->pins[ 36] * mult;
minfo->limits.video.vcomax = (bd->pins[ 37] == 0xFF) ? minfo->limits.system.vcomax : bd->pins[ 37] * mult;
minfo->limits.pixel.vcomin = (bd->pins[123] == 0xFF) ? 256000 : bd->pins[123] * mult;
minfo->limits.system.vcomin = (bd->pins[121] == 0xFF) ? minfo->limits.pixel.vcomin : bd->pins[121] * mult;
minfo->limits.video.vcomin = (bd->pins[122] == 0xFF) ? minfo->limits.system.vcomin : bd->pins[122] * mult;
minfo->values.pll.system =
minfo->values.pll.video = (bd->pins[ 92] == 0xFF) ? 284000 : bd->pins[ 92] * 4000;
minfo->values.reg.opt = get_unaligned_le32(bd->pins + 48);
minfo->values.reg.opt2 = get_unaligned_le32(bd->pins + 52);
minfo->values.reg.opt3 = get_unaligned_le32(bd->pins + 94);
minfo->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 98);
minfo->values.reg.memmisc = get_unaligned_le32(bd->pins + 102);
minfo->values.reg.memrdbk = get_unaligned_le32(bd->pins + 106);
minfo->features.pll.ref_freq = (bd->pins[110] & 0x01) ? 14318 : 27000;
minfo->values.memory.ddr = (bd->pins[114] & 0x60) == 0x20;
minfo->values.memory.dll = (bd->pins[115] & 0x02) != 0;
minfo->values.memory.emrswen = (bd->pins[115] & 0x01) != 0;
minfo->values.reg.maccess = minfo->values.memory.emrswen ? 0x00004000 : 0x00000000;
if (bd->pins[115] & 4) {
MINFO->values.reg.mctlwtst_core = MINFO->values.reg.mctlwtst;
minfo->values.reg.mctlwtst_core = minfo->values.reg.mctlwtst;
} else {
u_int32_t wtst_xlat[] = { 0, 1, 5, 6, 7, 5, 2, 3 };
MINFO->values.reg.mctlwtst_core = (MINFO->values.reg.mctlwtst & ~7) |
wtst_xlat[MINFO->values.reg.mctlwtst & 7];
minfo->values.reg.mctlwtst_core = (minfo->values.reg.mctlwtst & ~7) |
wtst_xlat[minfo->values.reg.mctlwtst & 7];
}
MINFO->max_pixel_clock_panellink = bd->pins[47] * 4000;
minfo->max_pixel_clock_panellink = bd->pins[47] * 4000;
return 0;
}
static void default_pins5(WPMINFO2) {
/* Mine 16MB G450 with SDRAM DDR */
MINFO->limits.pixel.vcomax =
MINFO->limits.system.vcomax =
MINFO->limits.video.vcomax = 600000;
MINFO->limits.pixel.vcomin =
MINFO->limits.system.vcomin =
MINFO->limits.video.vcomin = 256000;
MINFO->values.pll.system =
MINFO->values.pll.video = 284000;
MINFO->values.reg.opt = 0x404A1160;
MINFO->values.reg.opt2 = 0x0000AC00;
MINFO->values.reg.opt3 = 0x0090A409;
MINFO->values.reg.mctlwtst_core =
MINFO->values.reg.mctlwtst = 0x0C81462B;
MINFO->values.reg.memmisc = 0x80000004;
MINFO->values.reg.memrdbk = 0x01001103;
MINFO->features.pll.ref_freq = 27000;
MINFO->values.memory.ddr = 1;
MINFO->values.memory.dll = 1;
MINFO->values.memory.emrswen = 1;
MINFO->values.reg.maccess = 0x00004000;
minfo->limits.pixel.vcomax =
minfo->limits.system.vcomax =
minfo->limits.video.vcomax = 600000;
minfo->limits.pixel.vcomin =
minfo->limits.system.vcomin =
minfo->limits.video.vcomin = 256000;
minfo->values.pll.system =
minfo->values.pll.video = 284000;
minfo->values.reg.opt = 0x404A1160;
minfo->values.reg.opt2 = 0x0000AC00;
minfo->values.reg.opt3 = 0x0090A409;
minfo->values.reg.mctlwtst_core =
minfo->values.reg.mctlwtst = 0x0C81462B;
minfo->values.reg.memmisc = 0x80000004;
minfo->values.reg.memrdbk = 0x01001103;
minfo->features.pll.ref_freq = 27000;
minfo->values.memory.ddr = 1;
minfo->values.memory.dll = 1;
minfo->values.memory.emrswen = 1;
minfo->values.reg.maccess = 0x00004000;
}
static int matroxfb_set_limits(WPMINFO const struct matrox_bios* bd) {
unsigned int pins_version;
static const unsigned int pinslen[] = { 64, 64, 64, 128, 128 };
switch (ACCESS_FBINFO(chip)) {
switch (minfo->chip) {
case MGA_2064: default_pins1(PMINFO2); break;
case MGA_2164:
case MGA_1064:
......@@ -743,19 +743,19 @@ void matroxfb_read_pins(WPMINFO2) {
u32 opt;
u32 biosbase;
u32 fbbase;
struct pci_dev* pdev = ACCESS_FBINFO(pcidev);
struct pci_dev *pdev = minfo->pcidev;
memset(&ACCESS_FBINFO(bios), 0, sizeof(ACCESS_FBINFO(bios)));
memset(&minfo->bios, 0, sizeof(minfo->bios));
pci_read_config_dword(pdev, PCI_OPTION_REG, &opt);
pci_write_config_dword(pdev, PCI_OPTION_REG, opt | PCI_OPTION_ENABLE_ROM);
pci_read_config_dword(pdev, PCI_ROM_ADDRESS, &biosbase);
pci_read_config_dword(pdev, ACCESS_FBINFO(devflags.fbResource), &fbbase);
pci_read_config_dword(pdev, minfo->devflags.fbResource, &fbbase);
pci_write_config_dword(pdev, PCI_ROM_ADDRESS, (fbbase & PCI_ROM_ADDRESS_MASK) | PCI_ROM_ADDRESS_ENABLE);
parse_bios(vaddr_va(ACCESS_FBINFO(video).vbase), &ACCESS_FBINFO(bios));
parse_bios(vaddr_va(minfo->video.vbase), &minfo->bios);
pci_write_config_dword(pdev, PCI_ROM_ADDRESS, biosbase);
pci_write_config_dword(pdev, PCI_OPTION_REG, opt);
#ifdef CONFIG_X86
if (!ACCESS_FBINFO(bios).bios_valid) {
if (!minfo->bios.bios_valid) {
unsigned char __iomem* b;
b = ioremap(0x000C0000, 65536);
......@@ -769,15 +769,15 @@ void matroxfb_read_pins(WPMINFO2) {
printk(KERN_INFO "matroxfb: Legacy BIOS is for %04X:%04X, while this device is %04X:%04X\n",
ven, dev, pdev->vendor, pdev->device);
} else {
parse_bios(b, &ACCESS_FBINFO(bios));
parse_bios(b, &minfo->bios);
}
iounmap(b);
}
}
#endif
matroxfb_set_limits(PMINFO &ACCESS_FBINFO(bios));
matroxfb_set_limits(PMINFO &minfo->bios);
printk(KERN_INFO "PInS memtype = %u\n",
(ACCESS_FBINFO(values).reg.opt & 0x1C00) >> 10);
(minfo->values.reg.opt & 0x1C00) >> 10);
}
EXPORT_SYMBOL(matroxfb_DAC_in);
......
drivers/video/matrox/matroxfb_misc.h
浏览文件 @ fc2d10dd
......@@ -8,7 +8,7 @@ int matroxfb_PLL_calcclock(const struct matrox_pll_features* pll, unsigned int f
unsigned int* in, unsigned int* feed, unsigned int* post);
static inline int PLL_calcclock(CPMINFO unsigned int freq, unsigned int fmax,
unsigned int* in, unsigned int* feed, unsigned int* post) {
return matroxfb_PLL_calcclock(&ACCESS_FBINFO(features.pll), freq, fmax, in, feed, post);
return matroxfb_PLL_calcclock(&minfo->features.pll, freq, fmax, in, feed, post);
}
int matroxfb_vgaHWinit(WPMINFO struct my_timming* m);
......
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