提交 fa4a8d72 编写于 作者: M Mian Yousaf Kaukab 提交者: Felipe Balbi

usb: dwc2: gadget: fix phy interface configuration

hsotg->phyif is set in dwc2_gadget_init according to phy interface
width. Use it for configuration instead of hardcoded value.
Moreover, set USB turnaround time according to phy width.
Tested-by: NRobert Baldyga <r.baldyga@samsung.com>
Acked-by: NJohn Youn <johnyoun@synopsys.com>
Signed-off-by: NMian Yousaf Kaukab <yousaf.kaukab@intel.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>
上级 ccb34a91
......@@ -2290,8 +2290,9 @@ void s3c_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
*/
/* set the PLL on, remove the HNP/SRP and set the PHY */
val = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
writel(hsotg->phyif | GUSBCFG_TOUTCAL(7) |
(0x5 << 10), hsotg->regs + GUSBCFG);
(val << 10), hsotg->regs + GUSBCFG);
s3c_hsotg_init_fifo(hsotg);
......@@ -2978,6 +2979,7 @@ static void s3c_hsotg_phy_disable(struct dwc2_hsotg *hsotg)
*/
static void s3c_hsotg_init(struct dwc2_hsotg *hsotg)
{
u32 trdtim;
/* unmask subset of endpoint interrupts */
writel(DIEPMSK_TIMEOUTMSK | DIEPMSK_AHBERRMSK |
......@@ -3002,8 +3004,10 @@ static void s3c_hsotg_init(struct dwc2_hsotg *hsotg)
s3c_hsotg_init_fifo(hsotg);
/* set the PLL on, remove the HNP/SRP and set the PHY */
writel(GUSBCFG_PHYIF16 | GUSBCFG_TOUTCAL(7) | (0x5 << 10),
hsotg->regs + GUSBCFG);
trdtim = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
writel(hsotg->phyif | GUSBCFG_TOUTCAL(7) |
(trdtim << 10),
hsotg->regs + GUSBCFG);
if (using_dma(hsotg))
__orr32(hsotg->regs + GAHBCFG, GAHBCFG_DMA_EN);
......
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