amd64_edac: Fix missing csrows sysfs nodes
While initializing the array of csrow attribute instances, a few csrows were uninitialized. This happened because the module only performed a check for DRAM base ctl register0's and not DRAM base ctl register1's chip select enable bit. There could be systems with DIMMs populated on only single memory channel whereas the module also assumed that a dual channel dimm had double the memory size of a single memory channel instead of checking the memory on each channel. This patch fixes these above issues. Signed-off-by: NAshish Shenoy <ashenoy@riverbed.com> Signed-off-by: NPrasanna S. Panchamukhi <ppanchamukhi@riverbed.com> Link: http://lkml.kernel.org/r/4F459CFA.5090604@riverbed.comSigned-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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