提交 f86770aa 编写于 作者: B Ben Skeggs

drm/nouveau/dmaobj: merge everything except ctor and bind together

Simplifies things a little, and currently no reason to need
chipset-specific dmaobj constructors.
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
上级 0a32241d
...@@ -28,37 +28,39 @@ ...@@ -28,37 +28,39 @@
#include <subdev/fb.h> #include <subdev/fb.h>
#include <engine/dmaobj.h> #include <engine/dmaobj.h>
int static int
nouveau_dmaobj_create_(struct nouveau_object *parent, nouveau_dmaobj_ctor(struct nouveau_object *parent,
struct nouveau_object *engine, struct nouveau_object *engine,
struct nouveau_oclass *oclass, struct nouveau_oclass *oclass, void *data, u32 size,
void *data, u32 size, int len, void **pobject) struct nouveau_object **pobject)
{ {
struct nouveau_dmaeng *dmaeng = (void *)engine;
struct nouveau_dmaobj *dmaobj;
struct nouveau_gpuobj *gpuobj;
struct nv_dma_class *args = data; struct nv_dma_class *args = data;
struct nouveau_dmaobj *object;
int ret; int ret;
if (size < sizeof(*args)) if (size < sizeof(*args))
return -EINVAL; return -EINVAL;
ret = nouveau_object_create_(parent, engine, oclass, 0, len, pobject); ret = nouveau_object_create(parent, engine, oclass, 0, &dmaobj);
object = *pobject; *pobject = nv_object(dmaobj);
if (ret) if (ret)
return ret; return ret;
switch (args->flags & NV_DMA_TARGET_MASK) { switch (args->flags & NV_DMA_TARGET_MASK) {
case NV_DMA_TARGET_VM: case NV_DMA_TARGET_VM:
object->target = NV_MEM_TARGET_VM; dmaobj->target = NV_MEM_TARGET_VM;
break; break;
case NV_DMA_TARGET_VRAM: case NV_DMA_TARGET_VRAM:
object->target = NV_MEM_TARGET_VRAM; dmaobj->target = NV_MEM_TARGET_VRAM;
break; break;
case NV_DMA_TARGET_PCI: case NV_DMA_TARGET_PCI:
object->target = NV_MEM_TARGET_PCI; dmaobj->target = NV_MEM_TARGET_PCI;
break; break;
case NV_DMA_TARGET_PCI_US: case NV_DMA_TARGET_PCI_US:
case NV_DMA_TARGET_AGP: case NV_DMA_TARGET_AGP:
object->target = NV_MEM_TARGET_PCI_NOSNOOP; dmaobj->target = NV_MEM_TARGET_PCI_NOSNOOP;
break; break;
default: default:
return -EINVAL; return -EINVAL;
...@@ -66,22 +68,58 @@ nouveau_dmaobj_create_(struct nouveau_object *parent, ...@@ -66,22 +68,58 @@ nouveau_dmaobj_create_(struct nouveau_object *parent,
switch (args->flags & NV_DMA_ACCESS_MASK) { switch (args->flags & NV_DMA_ACCESS_MASK) {
case NV_DMA_ACCESS_VM: case NV_DMA_ACCESS_VM:
object->access = NV_MEM_ACCESS_VM; dmaobj->access = NV_MEM_ACCESS_VM;
break; break;
case NV_DMA_ACCESS_RD: case NV_DMA_ACCESS_RD:
object->access = NV_MEM_ACCESS_RO; dmaobj->access = NV_MEM_ACCESS_RO;
break; break;
case NV_DMA_ACCESS_WR: case NV_DMA_ACCESS_WR:
object->access = NV_MEM_ACCESS_WO; dmaobj->access = NV_MEM_ACCESS_WO;
break; break;
case NV_DMA_ACCESS_RDWR: case NV_DMA_ACCESS_RDWR:
object->access = NV_MEM_ACCESS_RW; dmaobj->access = NV_MEM_ACCESS_RW;
break; break;
default: default:
return -EINVAL; return -EINVAL;
} }
object->start = args->start; dmaobj->start = args->start;
object->limit = args->limit; dmaobj->limit = args->limit;
return 0;
switch (nv_mclass(parent)) {
case NV_DEVICE_CLASS:
break;
case NV03_CHANNEL_DMA_CLASS:
case NV10_CHANNEL_DMA_CLASS:
case NV17_CHANNEL_DMA_CLASS:
case NV40_CHANNEL_DMA_CLASS:
case NV50_CHANNEL_DMA_CLASS:
case NV84_CHANNEL_DMA_CLASS:
case NV50_CHANNEL_IND_CLASS:
case NV84_CHANNEL_IND_CLASS:
ret = dmaeng->bind(dmaeng, *pobject, dmaobj, &gpuobj);
nouveau_object_ref(NULL, pobject);
*pobject = nv_object(gpuobj);
break;
default:
return -EINVAL;
}
return ret;
} }
static struct nouveau_ofuncs
nouveau_dmaobj_ofuncs = {
.ctor = nouveau_dmaobj_ctor,
.dtor = nouveau_object_destroy,
.init = nouveau_object_init,
.fini = nouveau_object_fini,
};
struct nouveau_oclass
nouveau_dmaobj_sclass[] = {
{ NV_DMA_FROM_MEMORY_CLASS, &nouveau_dmaobj_ofuncs },
{ NV_DMA_TO_MEMORY_CLASS, &nouveau_dmaobj_ofuncs },
{ NV_DMA_IN_MEMORY_CLASS, &nouveau_dmaobj_ofuncs },
{}
};
...@@ -34,10 +34,6 @@ struct nv04_dmaeng_priv { ...@@ -34,10 +34,6 @@ struct nv04_dmaeng_priv {
struct nouveau_dmaeng base; struct nouveau_dmaeng base;
}; };
struct nv04_dmaobj_priv {
struct nouveau_dmaobj base;
};
static int static int
nv04_dmaobj_bind(struct nouveau_dmaeng *dmaeng, nv04_dmaobj_bind(struct nouveau_dmaeng *dmaeng,
struct nouveau_object *parent, struct nouveau_object *parent,
...@@ -105,56 +101,6 @@ nv04_dmaobj_bind(struct nouveau_dmaeng *dmaeng, ...@@ -105,56 +101,6 @@ nv04_dmaobj_bind(struct nouveau_dmaeng *dmaeng,
return ret; return ret;
} }
static int
nv04_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject)
{
struct nouveau_dmaeng *dmaeng = (void *)engine;
struct nv04_dmaobj_priv *dmaobj;
struct nouveau_gpuobj *gpuobj;
int ret;
ret = nouveau_dmaobj_create(parent, engine, oclass,
data, size, &dmaobj);
*pobject = nv_object(dmaobj);
if (ret)
return ret;
switch (nv_mclass(parent)) {
case NV_DEVICE_CLASS:
break;
case NV03_CHANNEL_DMA_CLASS:
case NV10_CHANNEL_DMA_CLASS:
case NV17_CHANNEL_DMA_CLASS:
case NV40_CHANNEL_DMA_CLASS:
ret = dmaeng->bind(dmaeng, *pobject, &dmaobj->base, &gpuobj);
nouveau_object_ref(NULL, pobject);
*pobject = nv_object(gpuobj);
break;
default:
return -EINVAL;
}
return ret;
}
static struct nouveau_ofuncs
nv04_dmaobj_ofuncs = {
.ctor = nv04_dmaobj_ctor,
.dtor = _nouveau_dmaobj_dtor,
.init = _nouveau_dmaobj_init,
.fini = _nouveau_dmaobj_fini,
};
static struct nouveau_oclass
nv04_dmaobj_sclass[] = {
{ 0x0002, &nv04_dmaobj_ofuncs },
{ 0x0003, &nv04_dmaobj_ofuncs },
{ 0x003d, &nv04_dmaobj_ofuncs },
{}
};
static int static int
nv04_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine, nv04_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_oclass *oclass, void *data, u32 size,
...@@ -168,7 +114,7 @@ nv04_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine, ...@@ -168,7 +114,7 @@ nv04_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
if (ret) if (ret)
return ret; return ret;
priv->base.base.sclass = nv04_dmaobj_sclass; nv_engine(priv)->sclass = nouveau_dmaobj_sclass;
priv->base.bind = nv04_dmaobj_bind; priv->base.bind = nv04_dmaobj_bind;
return 0; return 0;
} }
......
...@@ -32,10 +32,6 @@ struct nv50_dmaeng_priv { ...@@ -32,10 +32,6 @@ struct nv50_dmaeng_priv {
struct nouveau_dmaeng base; struct nouveau_dmaeng base;
}; };
struct nv50_dmaobj_priv {
struct nouveau_dmaobj base;
};
static int static int
nv50_dmaobj_bind(struct nouveau_dmaeng *dmaeng, nv50_dmaobj_bind(struct nouveau_dmaeng *dmaeng,
struct nouveau_object *parent, struct nouveau_object *parent,
...@@ -93,56 +89,6 @@ nv50_dmaobj_bind(struct nouveau_dmaeng *dmaeng, ...@@ -93,56 +89,6 @@ nv50_dmaobj_bind(struct nouveau_dmaeng *dmaeng,
return ret; return ret;
} }
static int
nv50_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject)
{
struct nouveau_dmaeng *dmaeng = (void *)engine;
struct nv50_dmaobj_priv *dmaobj;
struct nouveau_gpuobj *gpuobj;
int ret;
ret = nouveau_dmaobj_create(parent, engine, oclass,
data, size, &dmaobj);
*pobject = nv_object(dmaobj);
if (ret)
return ret;
switch (nv_mclass(parent)) {
case NV_DEVICE_CLASS:
break;
case NV50_CHANNEL_DMA_CLASS:
case NV84_CHANNEL_DMA_CLASS:
case NV50_CHANNEL_IND_CLASS:
case NV84_CHANNEL_IND_CLASS:
ret = dmaeng->bind(dmaeng, *pobject, &dmaobj->base, &gpuobj);
nouveau_object_ref(NULL, pobject);
*pobject = nv_object(gpuobj);
break;
default:
return -EINVAL;
}
return ret;
}
static struct nouveau_ofuncs
nv50_dmaobj_ofuncs = {
.ctor = nv50_dmaobj_ctor,
.dtor = _nouveau_dmaobj_dtor,
.init = _nouveau_dmaobj_init,
.fini = _nouveau_dmaobj_fini,
};
static struct nouveau_oclass
nv50_dmaobj_sclass[] = {
{ 0x0002, &nv50_dmaobj_ofuncs },
{ 0x0003, &nv50_dmaobj_ofuncs },
{ 0x003d, &nv50_dmaobj_ofuncs },
{}
};
static int static int
nv50_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine, nv50_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_oclass *oclass, void *data, u32 size,
...@@ -156,7 +102,7 @@ nv50_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine, ...@@ -156,7 +102,7 @@ nv50_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
if (ret) if (ret)
return ret; return ret;
priv->base.base.sclass = nv50_dmaobj_sclass; nv_engine(priv)->sclass = nouveau_dmaobj_sclass;
priv->base.bind = nv50_dmaobj_bind; priv->base.bind = nv50_dmaobj_bind;
return 0; return 0;
} }
......
...@@ -22,54 +22,14 @@ ...@@ -22,54 +22,14 @@
* Authors: Ben Skeggs * Authors: Ben Skeggs
*/ */
#include <core/gpuobj.h> #include <core/device.h>
#include <subdev/fb.h>
#include <engine/dmaobj.h> #include <engine/dmaobj.h>
struct nvc0_dmaeng_priv { struct nvc0_dmaeng_priv {
struct nouveau_dmaeng base; struct nouveau_dmaeng base;
}; };
struct nvc0_dmaobj_priv {
struct nouveau_dmaobj base;
};
static int
nvc0_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject)
{
struct nvc0_dmaobj_priv *dmaobj;
int ret;
ret = nouveau_dmaobj_create(parent, engine, oclass, data, size, &dmaobj);
*pobject = nv_object(dmaobj);
if (ret)
return ret;
if (dmaobj->base.target != NV_MEM_TARGET_VM || dmaobj->base.start)
return -EINVAL;
return 0;
}
static struct nouveau_ofuncs
nvc0_dmaobj_ofuncs = {
.ctor = nvc0_dmaobj_ctor,
.dtor = _nouveau_dmaobj_dtor,
.init = _nouveau_dmaobj_init,
.fini = _nouveau_dmaobj_fini,
};
static struct nouveau_oclass
nvc0_dmaobj_sclass[] = {
{ 0x0002, &nvc0_dmaobj_ofuncs },
{ 0x0003, &nvc0_dmaobj_ofuncs },
{ 0x003d, &nvc0_dmaobj_ofuncs },
{}
};
static int static int
nvc0_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine, nvc0_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size, struct nouveau_oclass *oclass, void *data, u32 size,
...@@ -83,7 +43,7 @@ nvc0_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine, ...@@ -83,7 +43,7 @@ nvc0_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
if (ret) if (ret)
return ret; return ret;
priv->base.base.sclass = nvc0_dmaobj_sclass; nv_engine(priv)->sclass = nouveau_dmaobj_sclass;
return 0; return 0;
} }
......
...@@ -14,23 +14,6 @@ struct nouveau_dmaobj { ...@@ -14,23 +14,6 @@ struct nouveau_dmaobj {
u64 limit; u64 limit;
}; };
#define nouveau_dmaobj_create(p,e,c,a,s,d) \
nouveau_dmaobj_create_((p), (e), (c), (a), (s), sizeof(**d), (void **)d)
#define nouveau_dmaobj_destroy(p) \
nouveau_object_destroy(&(p)->base)
#define nouveau_dmaobj_init(p) \
nouveau_object_init(&(p)->base)
#define nouveau_dmaobj_fini(p,s) \
nouveau_object_fini(&(p)->base, (s))
int nouveau_dmaobj_create_(struct nouveau_object *, struct nouveau_object *,
struct nouveau_oclass *, void *data, u32 size,
int length, void **);
#define _nouveau_dmaobj_dtor nouveau_object_destroy
#define _nouveau_dmaobj_init nouveau_object_init
#define _nouveau_dmaobj_fini nouveau_object_fini
struct nouveau_dmaeng { struct nouveau_dmaeng {
struct nouveau_engine base; struct nouveau_engine base;
int (*bind)(struct nouveau_dmaeng *, struct nouveau_object *parent, int (*bind)(struct nouveau_dmaeng *, struct nouveau_object *parent,
...@@ -54,4 +37,6 @@ extern struct nouveau_oclass nv04_dmaeng_oclass; ...@@ -54,4 +37,6 @@ extern struct nouveau_oclass nv04_dmaeng_oclass;
extern struct nouveau_oclass nv50_dmaeng_oclass; extern struct nouveau_oclass nv50_dmaeng_oclass;
extern struct nouveau_oclass nvc0_dmaeng_oclass; extern struct nouveau_oclass nvc0_dmaeng_oclass;
extern struct nouveau_oclass nouveau_dmaobj_sclass[];
#endif #endif
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