提交 f22fdf25 编写于 作者: Y Yuval Mintz 提交者: David S. Miller

bnx2x: Take chip version from MFW

In latest boards, the CHIP_METAL register contains an incorrect
revision value, so the correct one needs to be obtained in a
different manner.
Signed-off-by: NYuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: NAriel Elior <ariele@broadcom.com>
Signed-off-by: NEilon Greenstein <eilong@broadcom.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
上级 005a07ba
...@@ -10034,8 +10034,12 @@ static void bnx2x_get_common_hwinfo(struct bnx2x *bp) ...@@ -10034,8 +10034,12 @@ static void bnx2x_get_common_hwinfo(struct bnx2x *bp)
id = ((val & 0xffff) << 16); id = ((val & 0xffff) << 16);
val = REG_RD(bp, MISC_REG_CHIP_REV); val = REG_RD(bp, MISC_REG_CHIP_REV);
id |= ((val & 0xf) << 12); id |= ((val & 0xf) << 12);
val = REG_RD(bp, MISC_REG_CHIP_METAL);
id |= ((val & 0xff) << 4); /* Metal is read from PCI regs, but we can't access >=0x400 from
* the configuration space (so we need to reg_rd)
*/
val = REG_RD(bp, PCICFG_OFFSET + PCI_ID_VAL3);
id |= (((val >> 24) & 0xf) << 4);
val = REG_RD(bp, MISC_REG_BOND_ID); val = REG_RD(bp, MISC_REG_BOND_ID);
id |= (val & 0xf); id |= (val & 0xf);
bp->common.chip_id = id; bp->common.chip_id = id;
......
...@@ -1491,10 +1491,6 @@ ...@@ -1491,10 +1491,6 @@
/* [R 4] This field indicates the type of the device. '0' - 2 Ports; '1' - 1 /* [R 4] This field indicates the type of the device. '0' - 2 Ports; '1' - 1
Port. */ Port. */
#define MISC_REG_BOND_ID 0xa400 #define MISC_REG_BOND_ID 0xa400
/* [R 8] These bits indicate the metal revision of the chip. This value
starts at 0x00 for each all-layer tape-out and increments by one for each
tape-out. */
#define MISC_REG_CHIP_METAL 0xa404
/* [R 16] These bits indicate the part number for the chip. */ /* [R 16] These bits indicate the part number for the chip. */
#define MISC_REG_CHIP_NUM 0xa408 #define MISC_REG_CHIP_NUM 0xa408
/* [R 4] These bits indicate the base revision of the chip. This value /* [R 4] These bits indicate the base revision of the chip. This value
...@@ -6331,6 +6327,8 @@ ...@@ -6331,6 +6327,8 @@
#define PCI_PM_DATA_B 0x414 #define PCI_PM_DATA_B 0x414
#define PCI_ID_VAL1 0x434 #define PCI_ID_VAL1 0x434
#define PCI_ID_VAL2 0x438 #define PCI_ID_VAL2 0x438
#define PCI_ID_VAL3 0x43c
#define GRC_CONFIG_REG_PF_INIT_VF 0x624 #define GRC_CONFIG_REG_PF_INIT_VF 0x624
#define GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK 0xf #define GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK 0xf
/* First VF_NUM for PF is encoded in this register. /* First VF_NUM for PF is encoded in this register.
......
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