提交 efd0f0f3 编写于 作者: B Benjamin Herrenschmidt

Merge commit 'jwb/next' into next

...@@ -60,6 +60,7 @@ ...@@ -60,6 +60,7 @@
d-cache-size = <32768>; d-cache-size = <32768>;
dcr-controller; dcr-controller;
dcr-access-method = "native"; dcr-access-method = "native";
next-level-cache = <&L2C0>;
}; };
}; };
...@@ -146,6 +147,13 @@ ...@@ -146,6 +147,13 @@
dcr-reg = <0x010 0x002>; dcr-reg = <0x010 0x002>;
}; };
CRYPTO: crypto@180000 {
compatible = "amcc,ppc460gt-crypto", "amcc,ppc4xx-crypto";
reg = <4 0x00180000 0x80400>;
interrupt-parent = <&UIC0>;
interrupts = <0x1d 0x4>;
};
MAL0: mcmal { MAL0: mcmal {
compatible = "ibm,mcmal-460gt", "ibm,mcmal2"; compatible = "ibm,mcmal-460gt", "ibm,mcmal2";
dcr-reg = <0x180 0x062>; dcr-reg = <0x180 0x062>;
...@@ -274,6 +282,7 @@ ...@@ -274,6 +282,7 @@
max-frame-size = <9000>; max-frame-size = <9000>;
rx-fifo-size = <4096>; rx-fifo-size = <4096>;
tx-fifo-size = <2048>; tx-fifo-size = <2048>;
rx-fifo-size-gige = <16384>;
phy-mode = "sgmii"; phy-mode = "sgmii";
phy-map = <0xffffffff>; phy-map = <0xffffffff>;
gpcs-address = <0x0000000a>; gpcs-address = <0x0000000a>;
...@@ -302,6 +311,7 @@ ...@@ -302,6 +311,7 @@
max-frame-size = <9000>; max-frame-size = <9000>;
rx-fifo-size = <4096>; rx-fifo-size = <4096>;
tx-fifo-size = <2048>; tx-fifo-size = <2048>;
rx-fifo-size-gige = <16384>;
phy-mode = "sgmii"; phy-mode = "sgmii";
phy-map = <0x00000000>; phy-map = <0x00000000>;
gpcs-address = <0x0000000b>; gpcs-address = <0x0000000b>;
...@@ -331,6 +341,8 @@ ...@@ -331,6 +341,8 @@
max-frame-size = <9000>; max-frame-size = <9000>;
rx-fifo-size = <4096>; rx-fifo-size = <4096>;
tx-fifo-size = <2048>; tx-fifo-size = <2048>;
rx-fifo-size-gige = <16384>;
tx-fifo-size-gige = <16384>; /* emac2&3 only */
phy-mode = "sgmii"; phy-mode = "sgmii";
phy-map = <0x00000001>; phy-map = <0x00000001>;
gpcs-address = <0x0000000C>; gpcs-address = <0x0000000C>;
......
/* /*
* Device Tree Source for AMCC Glacier (460GT) * Device Tree Source for AMCC Glacier (460GT)
* *
* Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de> * Copyright 2008-2010 DENX Software Engineering, Stefan Roese <sr@denx.de>
* *
* This file is licensed under the terms of the GNU General Public * This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without * License version 2. This program is licensed "as is" without
...@@ -42,6 +42,7 @@ ...@@ -42,6 +42,7 @@
d-cache-size = <32768>; d-cache-size = <32768>;
dcr-controller; dcr-controller;
dcr-access-method = "native"; dcr-access-method = "native";
next-level-cache = <&L2C0>;
}; };
}; };
...@@ -106,6 +107,16 @@ ...@@ -106,6 +107,16 @@
dcr-reg = <0x00c 0x002>; dcr-reg = <0x00c 0x002>;
}; };
L2C0: l2c {
compatible = "ibm,l2-cache-460gt", "ibm,l2-cache";
dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
0x030 0x008>; /* L2 cache DCR's */
cache-line-size = <32>; /* 32 bytes */
cache-size = <262144>; /* L2, 256K */
interrupt-parent = <&UIC1>;
interrupts = <11 1>;
};
plb { plb {
compatible = "ibm,plb-460gt", "ibm,plb4"; compatible = "ibm,plb-460gt", "ibm,plb4";
#address-cells = <2>; #address-cells = <2>;
...@@ -118,6 +129,13 @@ ...@@ -118,6 +129,13 @@
dcr-reg = <0x010 0x002>; dcr-reg = <0x010 0x002>;
}; };
CRYPTO: crypto@180000 {
compatible = "amcc,ppc460gt-crypto", "amcc,ppc4xx-crypto";
reg = <4 0x00180000 0x80400>;
interrupt-parent = <&UIC0>;
interrupts = <0x1d 0x4>;
};
MAL0: mcmal { MAL0: mcmal {
compatible = "ibm,mcmal-460gt", "ibm,mcmal2"; compatible = "ibm,mcmal-460gt", "ibm,mcmal2";
dcr-reg = <0x180 0x062>; dcr-reg = <0x180 0x062>;
...@@ -186,6 +204,29 @@ ...@@ -186,6 +204,29 @@
reg = <0x03fa0000 0x00060000>; reg = <0x03fa0000 0x00060000>;
}; };
}; };
ndfc@3,0 {
compatible = "ibm,ndfc";
reg = <0x00000003 0x00000000 0x00002000>;
ccr = <0x00001000>;
bank-settings = <0x80002222>;
#address-cells = <1>;
#size-cells = <1>;
nand {
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x00000000 0x00100000>;
};
partition@100000 {
label = "user";
reg = <0x00000000 0x03f00000>;
};
};
};
}; };
UART0: serial@ef600300 { UART0: serial@ef600300 {
...@@ -237,6 +278,20 @@ ...@@ -237,6 +278,20 @@
reg = <0xef600700 0x00000014>; reg = <0xef600700 0x00000014>;
interrupt-parent = <&UIC0>; interrupt-parent = <&UIC0>;
interrupts = <0x2 0x4>; interrupts = <0x2 0x4>;
#address-cells = <1>;
#size-cells = <0>;
rtc@68 {
compatible = "stm,m41t80";
reg = <0x68>;
interrupt-parent = <&UIC2>;
interrupts = <0x19 0x8>;
};
sttm@48 {
compatible = "ad,ad7414";
reg = <0x48>;
interrupt-parent = <&UIC1>;
interrupts = <0x14 0x8>;
};
}; };
IIC1: i2c@ef600800 { IIC1: i2c@ef600800 {
...@@ -275,7 +330,7 @@ ...@@ -275,7 +330,7 @@
EMAC0: ethernet@ef600e00 { EMAC0: ethernet@ef600e00 {
device_type = "network"; device_type = "network";
compatible = "ibm,emac-460gt", "ibm,emac4"; compatible = "ibm,emac-460gt", "ibm,emac4sync";
interrupt-parent = <&EMAC0>; interrupt-parent = <&EMAC0>;
interrupts = <0x0 0x1>; interrupts = <0x0 0x1>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
...@@ -283,7 +338,7 @@ ...@@ -283,7 +338,7 @@
#size-cells = <0>; #size-cells = <0>;
interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4 interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
/*Wake*/ 0x1 &UIC2 0x14 0x4>; /*Wake*/ 0x1 &UIC2 0x14 0x4>;
reg = <0xef600e00 0x00000074>; reg = <0xef600e00 0x000000c4>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */ local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>; mal-device = <&MAL0>;
mal-tx-channel = <0>; mal-tx-channel = <0>;
...@@ -305,7 +360,7 @@ ...@@ -305,7 +360,7 @@
EMAC1: ethernet@ef600f00 { EMAC1: ethernet@ef600f00 {
device_type = "network"; device_type = "network";
compatible = "ibm,emac-460gt", "ibm,emac4"; compatible = "ibm,emac-460gt", "ibm,emac4sync";
interrupt-parent = <&EMAC1>; interrupt-parent = <&EMAC1>;
interrupts = <0x0 0x1>; interrupts = <0x0 0x1>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
...@@ -313,7 +368,7 @@ ...@@ -313,7 +368,7 @@
#size-cells = <0>; #size-cells = <0>;
interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4 interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4
/*Wake*/ 0x1 &UIC2 0x15 0x4>; /*Wake*/ 0x1 &UIC2 0x15 0x4>;
reg = <0xef600f00 0x00000074>; reg = <0xef600f00 0x000000c4>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */ local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>; mal-device = <&MAL0>;
mal-tx-channel = <1>; mal-tx-channel = <1>;
...@@ -336,7 +391,7 @@ ...@@ -336,7 +391,7 @@
EMAC2: ethernet@ef601100 { EMAC2: ethernet@ef601100 {
device_type = "network"; device_type = "network";
compatible = "ibm,emac-460gt", "ibm,emac4"; compatible = "ibm,emac-460gt", "ibm,emac4sync";
interrupt-parent = <&EMAC2>; interrupt-parent = <&EMAC2>;
interrupts = <0x0 0x1>; interrupts = <0x0 0x1>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
...@@ -344,7 +399,7 @@ ...@@ -344,7 +399,7 @@
#size-cells = <0>; #size-cells = <0>;
interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4 interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4
/*Wake*/ 0x1 &UIC2 0x16 0x4>; /*Wake*/ 0x1 &UIC2 0x16 0x4>;
reg = <0xef601100 0x00000074>; reg = <0xef601100 0x000000c4>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */ local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>; mal-device = <&MAL0>;
mal-tx-channel = <2>; mal-tx-channel = <2>;
...@@ -366,7 +421,7 @@ ...@@ -366,7 +421,7 @@
EMAC3: ethernet@ef601200 { EMAC3: ethernet@ef601200 {
device_type = "network"; device_type = "network";
compatible = "ibm,emac-460gt", "ibm,emac4"; compatible = "ibm,emac-460gt", "ibm,emac4sync";
interrupt-parent = <&EMAC3>; interrupt-parent = <&EMAC3>;
interrupts = <0x0 0x1>; interrupts = <0x0 0x1>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
...@@ -374,7 +429,7 @@ ...@@ -374,7 +429,7 @@
#size-cells = <0>; #size-cells = <0>;
interrupt-map = </*Status*/ 0x0 &UIC2 0x13 0x4 interrupt-map = </*Status*/ 0x0 &UIC2 0x13 0x4
/*Wake*/ 0x1 &UIC2 0x17 0x4>; /*Wake*/ 0x1 &UIC2 0x17 0x4>;
reg = <0xef601200 0x00000074>; reg = <0xef601200 0x000000c4>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */ local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>; mal-device = <&MAL0>;
mal-tx-channel = <3>; mal-tx-channel = <3>;
...@@ -414,6 +469,7 @@ ...@@ -414,6 +469,7 @@
* later cannot be changed * later cannot be changed
*/ */
ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000
0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */ /* Inbound 2GB range starting at 0 */
...@@ -444,6 +500,7 @@ ...@@ -444,6 +500,7 @@
* later cannot be changed * later cannot be changed
*/ */
ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */ /* Inbound 2GB range starting at 0 */
...@@ -485,6 +542,7 @@ ...@@ -485,6 +542,7 @@
* later cannot be changed * later cannot be changed
*/ */
ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000
0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */ /* Inbound 2GB range starting at 0 */
......
...@@ -156,7 +156,7 @@ ...@@ -156,7 +156,7 @@
compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb"; compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0x00000000 0x00000004 0xe0000000 0x20000000>; ranges = <0xe0000000 0x00000004 0xe0000000 0x20000000>;
clock-frequency = <0>; /* Filled in by zImage */ clock-frequency = <0>; /* Filled in by zImage */
EBC0: ebc { EBC0: ebc {
...@@ -165,14 +165,47 @@ ...@@ -165,14 +165,47 @@
#address-cells = <2>; #address-cells = <2>;
#size-cells = <1>; #size-cells = <1>;
clock-frequency = <0>; /* Filled in by zImage */ clock-frequency = <0>; /* Filled in by zImage */
/* ranges property is supplied by U-Boot */
interrupts = <0x5 0x1>; interrupts = <0x5 0x1>;
interrupt-parent = <&UIC1>; interrupt-parent = <&UIC1>;
nor_flash@0,0 {
compatible = "cfi-flash";
bank-width = <2>;
reg = <0x00000000 0x00000000 0x01000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0x00000000 0x001e0000>;
};
partition@1e0000 {
label = "dtb";
reg = <0x001e0000 0x00020000>;
};
partition@200000 {
label = "root";
reg = <0x00200000 0x00200000>;
};
partition@400000 {
label = "user";
reg = <0x00400000 0x00b60000>;
};
partition@f60000 {
label = "env";
reg = <0x00f60000 0x00040000>;
};
partition@fa0000 {
label = "u-boot";
reg = <0x00fa0000 0x00060000>;
};
};
}; };
UART0: serial@10000200 { UART0: serial@f0000200 {
device_type = "serial"; device_type = "serial";
compatible = "ns16550"; compatible = "ns16550";
reg = <0x10000200 0x00000008>; reg = <0xf0000200 0x00000008>;
virtual-reg = <0xa0000200>; virtual-reg = <0xa0000200>;
clock-frequency = <0>; /* Filled in by zImage */ clock-frequency = <0>; /* Filled in by zImage */
current-speed = <115200>; current-speed = <115200>;
...@@ -180,10 +213,10 @@ ...@@ -180,10 +213,10 @@
interrupts = <0x0 0x4>; interrupts = <0x0 0x4>;
}; };
UART1: serial@10000300 { UART1: serial@f0000300 {
device_type = "serial"; device_type = "serial";
compatible = "ns16550"; compatible = "ns16550";
reg = <0x10000300 0x00000008>; reg = <0xf0000300 0x00000008>;
virtual-reg = <0xa0000300>; virtual-reg = <0xa0000300>;
clock-frequency = <0>; clock-frequency = <0>;
current-speed = <0>; current-speed = <0>;
...@@ -192,10 +225,10 @@ ...@@ -192,10 +225,10 @@
}; };
UART2: serial@10000600 { UART2: serial@f0000600 {
device_type = "serial"; device_type = "serial";
compatible = "ns16550"; compatible = "ns16550";
reg = <0x10000600 0x00000008>; reg = <0xf0000600 0x00000008>;
virtual-reg = <0xa0000600>; virtual-reg = <0xa0000600>;
clock-frequency = <0>; clock-frequency = <0>;
current-speed = <0>; current-speed = <0>;
...@@ -203,27 +236,27 @@ ...@@ -203,27 +236,27 @@
interrupts = <0x5 0x4>; interrupts = <0x5 0x4>;
}; };
IIC0: i2c@10000400 { IIC0: i2c@f0000400 {
compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
reg = <0x10000400 0x00000014>; reg = <0xf0000400 0x00000014>;
interrupt-parent = <&UIC0>; interrupt-parent = <&UIC0>;
interrupts = <0x2 0x4>; interrupts = <0x2 0x4>;
}; };
IIC1: i2c@10000500 { IIC1: i2c@f0000500 {
compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
reg = <0x10000500 0x00000014>; reg = <0xf0000500 0x00000014>;
interrupt-parent = <&UIC0>; interrupt-parent = <&UIC0>;
interrupts = <0x3 0x4>; interrupts = <0x3 0x4>;
}; };
EMAC0: ethernet@10000800 { EMAC0: ethernet@f0000800 {
linux,network-index = <0x0>; linux,network-index = <0x0>;
device_type = "network"; device_type = "network";
compatible = "ibm,emac-440spe", "ibm,emac4"; compatible = "ibm,emac-440spe", "ibm,emac4";
interrupt-parent = <&UIC1>; interrupt-parent = <&UIC1>;
interrupts = <0x1c 0x4 0x1d 0x4>; interrupts = <0x1c 0x4 0x1d 0x4>;
reg = <0x10000800 0x00000074>; reg = <0xf0000800 0x00000074>;
local-mac-address = [000000000000]; local-mac-address = [000000000000];
mal-device = <&MAL0>; mal-device = <&MAL0>;
mal-tx-channel = <0>; mal-tx-channel = <0>;
...@@ -248,11 +281,11 @@ ...@@ -248,11 +281,11 @@
primary; primary;
large-inbound-windows; large-inbound-windows;
enable-msi-hole; enable-msi-hole;
reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */
0x00000000 0x00000000 0x00000000 /* no IACK cycles */ 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */
/* Outbound ranges, one memory and one IO, /* Outbound ranges, one memory and one IO,
* later cannot be changed * later cannot be changed
...@@ -453,6 +486,6 @@ ...@@ -453,6 +486,6 @@
}; };
chosen { chosen {
linux,stdout-path = "/plb/opb/serial@10000200"; linux,stdout-path = "/plb/opb/serial@f0000200";
}; };
}; };
# #
# Automatically generated make config: don't edit # Automatically generated make config: don't edit
# Linux kernel version: 2.6.33-rc1 # Linux kernel version: 2.6.33-rc5
# Mon Jan 4 14:55:34 2010 # Tue Jan 26 14:40:58 2010
# #
# CONFIG_PPC64 is not set # CONFIG_PPC64 is not set
...@@ -106,6 +106,7 @@ CONFIG_INITRAMFS_SOURCE="" ...@@ -106,6 +106,7 @@ CONFIG_INITRAMFS_SOURCE=""
CONFIG_RD_GZIP=y CONFIG_RD_GZIP=y
# CONFIG_RD_BZIP2 is not set # CONFIG_RD_BZIP2 is not set
# CONFIG_RD_LZMA is not set # CONFIG_RD_LZMA is not set
# CONFIG_RD_LZO is not set
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y CONFIG_ANON_INODES=y
...@@ -442,7 +443,90 @@ CONFIG_EXTRA_FIRMWARE="" ...@@ -442,7 +443,90 @@ CONFIG_EXTRA_FIRMWARE=""
# CONFIG_SYS_HYPERVISOR is not set # CONFIG_SYS_HYPERVISOR is not set
CONFIG_CONNECTOR=y CONFIG_CONNECTOR=y
CONFIG_PROC_EVENTS=y CONFIG_PROC_EVENTS=y
# CONFIG_MTD is not set CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_TESTS is not set
# CONFIG_MTD_CONCAT is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_REDBOOT_PARTS is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_OF_PARTS=y
# CONFIG_MTD_AR7_PARTS is not set
#
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
# CONFIG_RFD_FTL is not set
# CONFIG_SSFDC is not set
# CONFIG_MTD_OOPS is not set
#
# RAM/ROM/Flash chip drivers
#
CONFIG_MTD_CFI=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
CONFIG_MTD_MAP_BANK_WIDTH_2=y
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CFI_AMDSTD=y
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=y
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_PHYSMAP is not set
CONFIG_MTD_PHYSMAP_OF=y
# CONFIG_MTD_INTEL_VR_NOR is not set
# CONFIG_MTD_PLATRAM is not set
#
# Self-contained MTD device drivers
#
# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLOCK2MTD is not set
#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
# CONFIG_MTD_NAND is not set
# CONFIG_MTD_ONENAND is not set
#
# LPDDR flash memory drivers
#
# CONFIG_MTD_LPDDR is not set
#
# UBI - Unsorted block images
#
# CONFIG_MTD_UBI is not set
CONFIG_OF_DEVICE=y CONFIG_OF_DEVICE=y
# CONFIG_PARPORT is not set # CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y CONFIG_BLK_DEV=y
...@@ -500,7 +584,7 @@ CONFIG_HAVE_IDE=y ...@@ -500,7 +584,7 @@ CONFIG_HAVE_IDE=y
# #
# #
# See the help texts for more information. # The newer stack is recommended.
# #
# CONFIG_FIREWIRE is not set # CONFIG_FIREWIRE is not set
# CONFIG_IEEE1394 is not set # CONFIG_IEEE1394 is not set
...@@ -763,7 +847,6 @@ CONFIG_EXT2_FS=y ...@@ -763,7 +847,6 @@ CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XIP is not set # CONFIG_EXT2_FS_XIP is not set
# CONFIG_EXT3_FS is not set # CONFIG_EXT3_FS is not set
# CONFIG_EXT4_FS is not set # CONFIG_EXT4_FS is not set
CONFIG_EXT4_USE_FOR_EXT23=y
# CONFIG_REISERFS_FS is not set # CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set # CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set # CONFIG_FS_POSIX_ACL is not set
...@@ -820,6 +903,7 @@ CONFIG_MISC_FILESYSTEMS=y ...@@ -820,6 +903,7 @@ CONFIG_MISC_FILESYSTEMS=y
# CONFIG_BEFS_FS is not set # CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set # CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set # CONFIG_EFS_FS is not set
# CONFIG_JFFS2_FS is not set
CONFIG_CRAMFS=y CONFIG_CRAMFS=y
# CONFIG_SQUASHFS is not set # CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set # CONFIG_VXFS_FS is not set
......
...@@ -84,8 +84,8 @@ void __init MMU_init_hw(void) ...@@ -84,8 +84,8 @@ void __init MMU_init_hw(void)
* vectors and the kernel live in real-mode. * vectors and the kernel live in real-mode.
*/ */
mtspr(SPRN_DCCR, 0xF0000000); /* 512 MB of data space at 0x0. */ mtspr(SPRN_DCCR, 0xFFFF0000); /* 2GByte of data space at 0x0. */
mtspr(SPRN_ICCR, 0xF0000000); /* 512 MB of instr. space at 0x0. */ mtspr(SPRN_ICCR, 0xFFFF0000); /* 2GByte of instr. space at 0x0. */
} }
#define LARGE_PAGE_SIZE_16M (1<<24) #define LARGE_PAGE_SIZE_16M (1<<24)
......
...@@ -174,7 +174,8 @@ static int __init ppc4xx_l2c_probe(void) ...@@ -174,7 +174,8 @@ static int __init ppc4xx_l2c_probe(void)
| L2C_CFG_CPIM | L2C_CFG_TPIM | L2C_CFG_LIM | L2C_CFG_SMCM; | L2C_CFG_CPIM | L2C_CFG_TPIM | L2C_CFG_LIM | L2C_CFG_SMCM;
/* Check for 460EX/GT special handling */ /* Check for 460EX/GT special handling */
if (of_device_is_compatible(np, "ibm,l2-cache-460ex")) if (of_device_is_compatible(np, "ibm,l2-cache-460ex") ||
of_device_is_compatible(np, "ibm,l2-cache-460gt"))
r |= L2C_CFG_RDBW; r |= L2C_CFG_RDBW;
mtdcr(dcrbase_l2c + DCRN_L2C0_CFG, r); mtdcr(dcrbase_l2c + DCRN_L2C0_CFG, r);
......
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