提交 ef750c71 编写于 作者: V Vahram Aharonyan 提交者: Felipe Balbi

usb: dwc2: gadget: Start DDMA IN status phase in StsPhseRcvd handler

In DDMA mode of operation IN status phase of control write transfer
should start after getting StsPhseRcvd interrupt. This interrupt is
issued by HW once host starts to send IN tokens after data stage.
Signed-off-by: NVahram Aharonyan <vahrama@synopsys.com>
Signed-off-by: NJohn Youn <johnyoun@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>
上级 9d9a6b07
......@@ -1991,7 +1991,9 @@ static void dwc2_hsotg_handle_outdone(struct dwc2_hsotg *hsotg, int epnum)
*/
}
if (epnum == 0 && hsotg->ep0_state == DWC2_EP0_DATA_OUT) {
/* DDMA IN status phase will start from StsPhseRcvd interrupt */
if (!using_desc_dma(hsotg) && epnum == 0 &&
hsotg->ep0_state == DWC2_EP0_DATA_OUT) {
/* Move to STATUS IN */
dwc2_hsotg_ep0_zlp(hsotg, true);
return;
......@@ -2614,9 +2616,14 @@ static void dwc2_hsotg_epint(struct dwc2_hsotg *hsotg, unsigned int idx,
}
}
if (ints & DXEPINT_STSPHSERCVD)
if (ints & DXEPINT_STSPHSERCVD) {
dev_dbg(hsotg->dev, "%s: StsPhseRcvd\n", __func__);
/* Move to STATUS IN for DDMA */
if (using_desc_dma(hsotg))
dwc2_hsotg_ep0_zlp(hsotg, true);
}
if (ints & DXEPINT_BACK2BACKSETUP)
dev_dbg(hsotg->dev, "%s: B2BSetup/INEPNakEff\n", __func__);
......
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