提交 ec5b849e 编写于 作者: S Soren Brinkmann 提交者: Michal Simek

arm: zynq: timer: Remove unused #defines

Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NJohn Linn <john.linn@xilinx.com>
Tested-by: NJosh Cartwright <josh.cartwright@ni.com>
上级 af7f032d
...@@ -39,9 +39,6 @@ ...@@ -39,9 +39,6 @@
#define XTTCPS_CNT_CNTRL_OFFSET 0x0C /* Counter Control Reg, RW */ #define XTTCPS_CNT_CNTRL_OFFSET 0x0C /* Counter Control Reg, RW */
#define XTTCPS_COUNT_VAL_OFFSET 0x18 /* Counter Value Reg, RO */ #define XTTCPS_COUNT_VAL_OFFSET 0x18 /* Counter Value Reg, RO */
#define XTTCPS_INTR_VAL_OFFSET 0x24 /* Interval Count Reg, RW */ #define XTTCPS_INTR_VAL_OFFSET 0x24 /* Interval Count Reg, RW */
#define XTTCPS_MATCH_1_OFFSET 0x30 /* Match 1 Value Reg, RW */
#define XTTCPS_MATCH_2_OFFSET 0x3C /* Match 2 Value Reg, RW */
#define XTTCPS_MATCH_3_OFFSET 0x48 /* Match 3 Value Reg, RW */
#define XTTCPS_ISR_OFFSET 0x54 /* Interrupt Status Reg, RO */ #define XTTCPS_ISR_OFFSET 0x54 /* Interrupt Status Reg, RO */
#define XTTCPS_IER_OFFSET 0x60 /* Interrupt Enable Reg, RW */ #define XTTCPS_IER_OFFSET 0x60 /* Interrupt Enable Reg, RW */
......
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