提交 e86ffc41 编写于 作者: S Sachin Kamat 提交者: Tomasz Figa

clk: exynos5250: Add CLK_SET_RATE_PARENT flag to mout_apll

Add CLK_SET_RATE_PARENT flag to mout_apll clock. This will let us set the
clock rate in the cpufreq driver.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NTomasz Figa <t.figa@samsung.com>
上级 96987ded
...@@ -262,7 +262,8 @@ static struct samsung_mux_clock exynos5250_mux_clks[] __initdata = { ...@@ -262,7 +262,8 @@ static struct samsung_mux_clock exynos5250_mux_clks[] __initdata = {
/* /*
* CMU_CPU * CMU_CPU
*/ */
MUX_A(none, "mout_apll", mout_apll_p, SRC_CPU, 0, 1, "mout_apll"), MUX_FA(none, "mout_apll", mout_apll_p, SRC_CPU, 0, 1,
CLK_SET_RATE_PARENT, 0, "mout_apll"),
MUX_A(none, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1, "mout_cpu"), MUX_A(none, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1, "mout_cpu"),
/* /*
......
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