ncr5380: Remove BOARD_REQUIRES_NO_DELAY macro

The io_recovery_delay macro is intended to insert a microsecond delay
between the chip register accesses that begin a DMA operation. This
is reportedly needed for some ISA boards.

Reverse the sense of the macro test so that in the common case,
where no delay is required, drivers need not define the macro.
Signed-off-by: NFinn Thain <fthain@telegraphics.com.au>
Reviewed-by: NHannes Reinecke <hare@suse.com>
Tested-by: NMichael Schmitz <schmitzmic@gmail.com>
Tested-by: NOndrej Zary <linux@rainbow-software.org>
Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>

drivers/scsi/NCR5380.c

@@ -39,12 +39,6 @@
  * tagged queueing)
  */
 
-#ifdef BOARD_REQUIRES_NO_DELAY
-#define io_recovery_delay(x)
-#else
-#define io_recovery_delay(x)	udelay(x)
-#endif
-
 /*
  * Design
  *
@@ -150,6 +144,10 @@
  * possible) function may be used.
  */
 
+#ifndef NCR5380_io_delay
+#define NCR5380_io_delay(x)
+#endif
+
 static int do_abort(struct Scsi_Host *);
 static void do_reset(struct Scsi_Host *);
 
@@ -1468,14 +1466,14 @@ static int NCR5380_transfer_dma(struct Scsi_Host *instance,
 	 */
 
 	if (p & SR_IO) {
-		io_recovery_delay(1);
+		NCR5380_io_delay(1);
 		NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
 	} else {
-		io_recovery_delay(1);
+		NCR5380_io_delay(1);
 		NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
-		io_recovery_delay(1);
+		NCR5380_io_delay(1);
 		NCR5380_write(START_DMA_SEND_REG, 0);
-		io_recovery_delay(1);
+		NCR5380_io_delay(1);
 	}
 
 /*

drivers/scsi/dtc.h

@@ -28,6 +28,8 @@
 #define NCR5380_bus_reset		dtc_bus_reset
 #define NCR5380_info			dtc_info
 
+#define NCR5380_io_delay(x)		udelay(x)
+
 /* 15 12 11 10
    1001 1100 0000 0000 */
 

drivers/scsi/g_NCR5380.h

@@ -71,6 +71,8 @@
 #define NCR5380_pwrite generic_NCR5380_pwrite
 #define NCR5380_info generic_NCR5380_info
 
+#define NCR5380_io_delay(x)		udelay(x)
+
 #define BOARD_NCR5380	0
 #define BOARD_NCR53C400	1
 #define BOARD_NCR53C400A 2

drivers/scsi/t128.h

@@ -84,6 +84,8 @@
 #define NCR5380_bus_reset t128_bus_reset
 #define NCR5380_info t128_info
 
+#define NCR5380_io_delay(x)		udelay(x)
+
 /* 15 14 12 10 7 5 3
    1101 0100 1010 1000 */