提交 e3943aa6 编写于 作者: D Daniel Scheller 提交者: Mauro Carvalho Chehab

[media] dvb-frontends/cxd2841er: make lock wait in set_fe_tc() optional

Don't wait for FE_HAS_LOCK in set_frontend_tc() and thus don't hammer the
lock status register with inquiries when CXD2841ER_NO_WAIT_LOCK is set
in the configuration, which also unneccessarily blocks applications until
a TS LOCK has been acquired. Rather, API and applications will check for
a TS LOCK by utilising the tune fe_op, read_status and get_frontend ops,
which is sufficient.
Signed-off-by: NDaniel Scheller <d.scheller@gmx.net>
Acked-by: NAbylay Ospan <aospan@netup.ru>
Signed-off-by: NMauro Carvalho Chehab <mchehab@s-opensource.com>
上级 763f857e
...@@ -3460,6 +3460,10 @@ static int cxd2841er_set_frontend_tc(struct dvb_frontend *fe) ...@@ -3460,6 +3460,10 @@ static int cxd2841er_set_frontend_tc(struct dvb_frontend *fe)
cxd2841er_tuner_set(fe); cxd2841er_tuner_set(fe);
cxd2841er_tune_done(priv); cxd2841er_tune_done(priv);
if (priv->flags & CXD2841ER_NO_WAIT_LOCK)
goto done;
timeout = 2500; timeout = 2500;
while (timeout > 0) { while (timeout > 0) {
ret = cxd2841er_read_status_tc(fe, &status); ret = cxd2841er_read_status_tc(fe, &status);
......
...@@ -29,6 +29,7 @@ ...@@ -29,6 +29,7 @@
#define CXD2841ER_TS_SERIAL 4 /* bit 2 */ #define CXD2841ER_TS_SERIAL 4 /* bit 2 */
#define CXD2841ER_ASCOT 8 /* bit 3 */ #define CXD2841ER_ASCOT 8 /* bit 3 */
#define CXD2841ER_EARLY_TUNE 16 /* bit 4 */ #define CXD2841ER_EARLY_TUNE 16 /* bit 4 */
#define CXD2841ER_NO_WAIT_LOCK 32 /* bit 5 */
enum cxd2841er_xtal { enum cxd2841er_xtal {
SONY_XTAL_20500, /* 20.5 MHz */ SONY_XTAL_20500, /* 20.5 MHz */
......
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