drm/amd/display: enable clock gating and dchubp power gating
also refactor to clean reduce loc to achieve same logic Signed-off-by: NTony Cheng <tony.cheng@amd.com> Acked-by: NHarry Wentland <Harry.Wentland@amd.com> Reviewed-by: NYongqiang Sun <yongqiang.sun@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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