clk: qoriq: add clock configuration for ls1088a soc
Clock on ls1088a chip takes primary clocking input from the external SYSCLK signal. The SYSCLK input (frequency) is multiplied using multiple phase locked loops (PLL) to create a variety of frequencies which can then be passed to a variety of internal logic, including cores and peripheral IP modules. Signed-off-by: NTang Yuantian <andy.tang@nxp.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Showing
想要评论请 注册 或 登录