提交 e0373607 编写于 作者: V Viresh Kumar 提交者: Arnd Bergmann

SPEAr3xx: Add pinctrl support for boards

Signed-off-by: NViresh Kumar <viresh.kumar@st.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Reviewed-by: NStephen Warren <swarren@wwwdotorg.org>
上级 8076dd1b
......@@ -25,6 +25,44 @@
};
ahb {
pinmux@99000000 {
st,pinmux-mode = <2>;
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinmux {
i2c0 {
st,pins = "i2c0_grp";
st,function = "i2c0";
};
ssp0 {
st,pins = "ssp0_grp";
st,function = "ssp0";
};
mii0 {
st,pins = "mii0_grp";
st,function = "mii0";
};
uart0 {
st,pins = "uart0_grp";
st,function = "uart0";
};
clcd {
st,pins = "clcd_pfmode_grp";
st,function = "clcd";
};
sdhci {
st,pins = "sdhci_4bit_grp";
st,function = "sdhci";
};
gpio1 {
st,pins = "gpio1_4_to_7_grp",
"gpio1_0_to_3_grp";
st,function = "gpio1";
};
};
};
clcd@60000000 {
status = "okay";
};
......
......@@ -21,6 +21,11 @@
ranges = <0x60000000 0x60000000 0x50000000
0xd0000000 0xd0000000 0x30000000>;
pinmux@99000000 {
compatible = "st,spear300-pinmux";
reg = <0x99000000 0x1000>;
};
clcd@60000000 {
compatible = "arm,clcd-pl110", "arm,primecell";
reg = <0x60000000 0x1000>;
......
......@@ -25,6 +25,67 @@
};
ahb {
pinmux@b4000000 {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinmux {
gpio0 {
st,pins = "gpio0_pin0_grp",
"gpio0_pin1_grp",
"gpio0_pin2_grp",
"gpio0_pin3_grp",
"gpio0_pin4_grp",
"gpio0_pin5_grp";
st,function = "gpio0";
};
i2c0 {
st,pins = "i2c0_grp";
st,function = "i2c0";
};
mii0 {
st,pins = "mii0_grp";
st,function = "mii0";
};
ssp0 {
st,pins = "ssp0_grp";
st,function = "ssp0";
};
uart0 {
st,pins = "uart0_grp";
st,function = "uart0";
};
emi {
st,pins = "emi_cs_0_to_5_grp";
st,function = "emi";
};
fsmc {
st,pins = "fsmc_grp";
st,function = "fsmc";
};
uart1 {
st,pins = "uart1_grp";
st,function = "uart1";
};
uart2 {
st,pins = "uart2_grp";
st,function = "uart2";
};
uart3 {
st,pins = "uart3_grp";
st,function = "uart3";
};
uart4 {
st,pins = "uart4_grp";
st,function = "uart4";
};
uart5 {
st,pins = "uart5_grp";
st,function = "uart5";
};
};
};
dma@fc400000 {
status = "okay";
};
......
......@@ -22,6 +22,11 @@
0xb0000000 0xb0000000 0x10000000
0xd0000000 0xd0000000 0x30000000>;
pinmux@b4000000 {
compatible = "st,spear310-pinmux";
reg = <0xb4000000 0x1000>;
};
fsmc: flash@44000000 {
compatible = "st,spear600-fsmc-nand";
#address-cells = <1>;
......
......@@ -25,6 +25,67 @@
};
ahb {
pinmux@b3000000 {
st,pinmux-mode = <3>;
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinmux {
i2c0 {
st,pins = "i2c0_grp";
st,function = "i2c0";
};
mii0 {
st,pins = "mii0_grp";
st,function = "mii0";
};
ssp0 {
st,pins = "ssp0_grp";
st,function = "ssp0";
};
uart0 {
st,pins = "uart0_grp";
st,function = "uart0";
};
sdhci {
st,pins = "sdhci_cd_51_grp";
st,function = "sdhci";
};
i2s {
st,pins = "i2s_grp";
st,function = "i2s";
};
uart1 {
st,pins = "uart1_grp";
st,function = "uart1";
};
uart2 {
st,pins = "uart2_grp";
st,function = "uart2";
};
can0 {
st,pins = "can0_grp";
st,function = "can0";
};
can1 {
st,pins = "can1_grp";
st,function = "can1";
};
mii2 {
st,pins = "mii2_grp";
st,function = "mii2";
};
pwm0_1 {
st,pins = "pwm0_1_pin_14_15_grp";
st,function = "pwm0_1";
};
pwm2 {
st,pins = "pwm2_pin_13_grp";
st,function = "pwm2";
};
};
};
clcd@90000000 {
status = "okay";
};
......
......@@ -18,9 +18,14 @@
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges = <0x40000000 0x40000000 0x70000000
ranges = <0x40000000 0x40000000 0x80000000
0xd0000000 0xd0000000 0x30000000>;
pinmux@b3000000 {
compatible = "st,spear320-pinmux";
reg = <0xb3000000 0x1000>;
};
clcd@90000000 {
compatible = "arm,clcd-pl110", "arm,primecell";
reg = <0x90000000 0x1000>;
......
......@@ -7,16 +7,19 @@ if ARCH_SPEAR3XX
menu "SPEAr3xx Implementations"
config MACH_SPEAR300
bool "SPEAr300 Machine support with Device Tree"
select PINCTRL_SPEAR300
help
Supports ST SPEAr300 machine configured via the device-tree
config MACH_SPEAR310
bool "SPEAr310 Machine support with Device Tree"
select PINCTRL_SPEAR310
help
Supports ST SPEAr310 machine configured via the device-tree
config MACH_SPEAR320
bool "SPEAr320 Machine support with Device Tree"
select PINCTRL_SPEAR320
help
Supports ST SPEAr320 machine configured via the device-tree
endmenu
......
......@@ -13,6 +13,7 @@ config ARCH_SPEAR3XX
select ARM_VIC
select CPU_ARM926T
select USE_OF
select PINCTRL
help
Supports for ARM's SPEAR3XX family
......
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