提交 dea77ccd 编写于 作者: L Linus Torvalds

Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lliubbo/blackfin

Pull blackfin update from Bob Liu.

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lliubbo/blackfin:
  Blackfin: smp: add smp_mb() to keep coherency
  Blackfin: drop irq enable in init_arch_irq()
  Blackfin: fix wrong place disabled irq
  Blackfin: update defconfig for bf609-ezkit
  Blackfin: add bf548 v0.4 revision
  Blackfin: bf60x: Add bf608 and bf609 specific perpheral MMRs
  Blackfin: cpufreq: fix dpm_state_table
  Blackfin: bfin_gpio: proc: fix return value
  Blackfin: CM-BF537E: Update SPORT support in board file.
  Blackfin: bf537: fix lq035 platform device name
  Blackfin: bf533-ezkit: enable flash drivers by default
...@@ -298,7 +298,7 @@ config BF_REV_0_3 ...@@ -298,7 +298,7 @@ config BF_REV_0_3
config BF_REV_0_4 config BF_REV_0_4
bool "0.4" bool "0.4"
depends on (BF561 || BF533 || BF532 || BF531 || BF538 || BF539) depends on (BF561 || BF533 || BF532 || BF531 || BF538 || BF539 || BF54x)
config BF_REV_0_5 config BF_REV_0_5
bool "0.5" bool "0.5"
......
...@@ -52,10 +52,13 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" ...@@ -52,10 +52,13 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_MTD_CHAR=m CONFIG_MTD_CHAR=m
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
CONFIG_MTD_JEDECPROBE=m CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_RAM=y CONFIG_MTD_RAM=y
CONFIG_MTD_ROM=m CONFIG_MTD_ROM=y
CONFIG_MTD_COMPLEX_MAPPINGS=y CONFIG_MTD_COMPLEX_MAPPINGS=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PLATRAM=y
CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
......
CONFIG_EXPERIMENTAL=y CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y CONFIG_SYSVIPC=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_IKCONFIG=y CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14 CONFIG_LOG_BUF_SHIFT=14
...@@ -24,7 +25,6 @@ CONFIG_BF609=y ...@@ -24,7 +25,6 @@ CONFIG_BF609=y
CONFIG_PINT1_ASSIGN=0x01010000 CONFIG_PINT1_ASSIGN=0x01010000
CONFIG_PINT2_ASSIGN=0x07000101 CONFIG_PINT2_ASSIGN=0x07000101
CONFIG_PINT3_ASSIGN=0x02020303 CONFIG_PINT3_ASSIGN=0x02020303
CONFIG_HIGH_RES_TIMERS=y
CONFIG_IP_CHECKSUM_L1=y CONFIG_IP_CHECKSUM_L1=y
CONFIG_SYSCALL_TAB_L1=y CONFIG_SYSCALL_TAB_L1=y
CONFIG_CPLB_SWITCH_TAB_L1=y CONFIG_CPLB_SWITCH_TAB_L1=y
...@@ -116,9 +116,6 @@ CONFIG_SND_PCM_OSS=m ...@@ -116,9 +116,6 @@ CONFIG_SND_PCM_OSS=m
# CONFIG_SND_SPI is not set # CONFIG_SND_SPI is not set
# CONFIG_SND_USB is not set # CONFIG_SND_USB is not set
CONFIG_SND_SOC=m CONFIG_SND_SOC=m
CONFIG_SND_BF6XX_I2S=m
CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61=m
CONFIG_SND_SOC_ALL_CODECS=m
CONFIG_USB=y CONFIG_USB=y
CONFIG_USB_MUSB_HDRC=y CONFIG_USB_MUSB_HDRC=y
CONFIG_USB_MUSB_BLACKFIN=m CONFIG_USB_MUSB_BLACKFIN=m
...@@ -136,7 +133,6 @@ CONFIG_VFAT_FS=y ...@@ -136,7 +133,6 @@ CONFIG_VFAT_FS=y
CONFIG_JFFS2_FS=m CONFIG_JFFS2_FS=m
CONFIG_UBIFS_FS=m CONFIG_UBIFS_FS=m
CONFIG_NFS_FS=m CONFIG_NFS_FS=m
CONFIG_NFS_V3=y
CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y CONFIG_NLS_ISO8859_1=y
CONFIG_DEBUG_FS=y CONFIG_DEBUG_FS=y
...@@ -149,9 +145,9 @@ CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y ...@@ -149,9 +145,9 @@ CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y
CONFIG_EARLY_PRINTK=y CONFIG_EARLY_PRINTK=y
CONFIG_CPLB_INFO=y CONFIG_CPLB_INFO=y
CONFIG_BFIN_PSEUDODBG_INSNS=y CONFIG_BFIN_PSEUDODBG_INSNS=y
CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_HMAC=m
CONFIG_CRYPTO_MD4=y CONFIG_CRYPTO_MD4=m
CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_MD5=m
CONFIG_CRYPTO_ARC4=y CONFIG_CRYPTO_ARC4=m
# CONFIG_CRYPTO_ANSI_CPRNG is not set # CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_DEV_BFIN_CRC=y CONFIG_CRYPTO_DEV_BFIN_CRC=m
...@@ -1265,8 +1265,8 @@ static __init int gpio_register_proc(void) ...@@ -1265,8 +1265,8 @@ static __init int gpio_register_proc(void)
{ {
struct proc_dir_entry *proc_gpio; struct proc_dir_entry *proc_gpio;
proc_gpio = proc_create("gpio", S_IRUGO, NULL, &gpio_proc_ops); proc_gpio = proc_create("gpio", 0, NULL, &gpio_proc_ops);
return proc_gpio != NULL; return proc_gpio == NULL;
} }
__initcall(gpio_register_proc); __initcall(gpio_register_proc);
#endif #endif
......
...@@ -86,7 +86,6 @@ void native_machine_restart(char *cmd) ...@@ -86,7 +86,6 @@ void native_machine_restart(char *cmd)
void machine_restart(char *cmd) void machine_restart(char *cmd)
{ {
native_machine_restart(cmd); native_machine_restart(cmd);
local_irq_disable();
if (smp_processor_id()) if (smp_processor_id())
smp_call_function((void *)bfin_reset, 0, 1); smp_call_function((void *)bfin_reset, 0, 1);
else else
......
...@@ -25,6 +25,7 @@ ...@@ -25,6 +25,7 @@
#include <asm/bfin5xx_spi.h> #include <asm/bfin5xx_spi.h>
#include <asm/portmux.h> #include <asm/portmux.h>
#include <asm/dpmc.h> #include <asm/dpmc.h>
#include <asm/bfin_sport.h>
/* /*
* Name the Board for the /proc/cpuinfo * Name the Board for the /proc/cpuinfo
...@@ -143,6 +144,71 @@ static struct platform_device bfin_spi0_device = { ...@@ -143,6 +144,71 @@ static struct platform_device bfin_spi0_device = {
}; };
#endif /* spi master and devices */ #endif /* spi master and devices */
#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
/* SPORT SPI controller data */
static struct bfin5xx_spi_master bfin_sport_spi0_info = {
.num_chipselect = MAX_BLACKFIN_GPIOS,
.enable_dma = 0, /* master don't support DMA */
.pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
};
static struct resource bfin_sport_spi0_resource[] = {
[0] = {
.start = SPORT0_TCR1,
.end = SPORT0_TCR1 + 0xFF,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_SPORT0_ERROR,
.end = IRQ_SPORT0_ERROR,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device bfin_sport_spi0_device = {
.name = "bfin-sport-spi",
.id = 1, /* Bus number */
.num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
.resource = bfin_sport_spi0_resource,
.dev = {
.platform_data = &bfin_sport_spi0_info, /* Passed to driver */
},
};
static struct bfin5xx_spi_master bfin_sport_spi1_info = {
.num_chipselect = MAX_BLACKFIN_GPIOS,
.enable_dma = 0, /* master don't support DMA */
.pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
};
static struct resource bfin_sport_spi1_resource[] = {
[0] = {
.start = SPORT1_TCR1,
.end = SPORT1_TCR1 + 0xFF,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_SPORT1_ERROR,
.end = IRQ_SPORT1_ERROR,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device bfin_sport_spi1_device = {
.name = "bfin-sport-spi",
.id = 2, /* Bus number */
.num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
.resource = bfin_sport_spi1_resource,
.dev = {
.platform_data = &bfin_sport_spi1_info, /* Passed to driver */
},
};
#endif /* sport spi master and devices */
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
static struct platform_device rtc_device = { static struct platform_device rtc_device = {
.name = "rtc-bfin", .name = "rtc-bfin",
...@@ -512,6 +578,13 @@ static struct platform_device i2c_bfin_twi_device = { ...@@ -512,6 +578,13 @@ static struct platform_device i2c_bfin_twi_device = {
}; };
#endif #endif
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) \
|| defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
unsigned short bfin_sport0_peripherals[] = {
P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
};
#endif
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
static struct resource bfin_sport0_uart_resources[] = { static struct resource bfin_sport0_uart_resources[] = {
...@@ -532,11 +605,6 @@ static struct resource bfin_sport0_uart_resources[] = { ...@@ -532,11 +605,6 @@ static struct resource bfin_sport0_uart_resources[] = {
}, },
}; };
static unsigned short bfin_sport0_peripherals[] = {
P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
};
static struct platform_device bfin_sport0_uart_device = { static struct platform_device bfin_sport0_uart_device = {
.name = "bfin-sport-uart", .name = "bfin-sport-uart",
.id = 0, .id = 0,
...@@ -582,6 +650,49 @@ static struct platform_device bfin_sport1_uart_device = { ...@@ -582,6 +650,49 @@ static struct platform_device bfin_sport1_uart_device = {
}; };
#endif #endif
#endif #endif
#if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
static struct resource bfin_sport0_resources[] = {
{
.start = SPORT0_TCR1,
.end = SPORT0_MRCS3+4,
.flags = IORESOURCE_MEM,
},
{
.start = IRQ_SPORT0_RX,
.end = IRQ_SPORT0_RX+1,
.flags = IORESOURCE_IRQ,
},
{
.start = IRQ_SPORT0_TX,
.end = IRQ_SPORT0_TX+1,
.flags = IORESOURCE_IRQ,
},
{
.start = IRQ_SPORT0_ERROR,
.end = IRQ_SPORT0_ERROR,
.flags = IORESOURCE_IRQ,
},
{
.start = CH_SPORT0_TX,
.end = CH_SPORT0_TX,
.flags = IORESOURCE_DMA,
},
{
.start = CH_SPORT0_RX,
.end = CH_SPORT0_RX,
.flags = IORESOURCE_DMA,
},
};
static struct platform_device bfin_sport0_device = {
.name = "bfin_sport_raw",
.id = 0,
.num_resources = ARRAY_SIZE(bfin_sport0_resources),
.resource = bfin_sport0_resources,
.dev = {
.platform_data = &bfin_sport0_peripherals, /* Passed to driver */
},
};
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
#include <linux/bfin_mac.h> #include <linux/bfin_mac.h>
...@@ -684,6 +795,10 @@ static struct platform_device *cm_bf537e_devices[] __initdata = { ...@@ -684,6 +795,10 @@ static struct platform_device *cm_bf537e_devices[] __initdata = {
&bfin_dpmc, &bfin_dpmc,
#if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
&bfin_sport0_device,
#endif
#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE) #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
&hitachi_fb_device, &hitachi_fb_device,
#endif #endif
...@@ -744,6 +859,11 @@ static struct platform_device *cm_bf537e_devices[] __initdata = { ...@@ -744,6 +859,11 @@ static struct platform_device *cm_bf537e_devices[] __initdata = {
&bfin_spi0_device, &bfin_spi0_device,
#endif #endif
#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
&bfin_sport_spi0_device,
&bfin_sport_spi1_device,
#endif
#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
&bfin_pata_device, &bfin_pata_device,
#endif #endif
......
...@@ -1525,7 +1525,7 @@ static struct platform_device bfin_sport_spi1_device = { ...@@ -1525,7 +1525,7 @@ static struct platform_device bfin_sport_spi1_device = {
#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
static struct platform_device bfin_fb_device = { static struct platform_device bfin_fb_device = {
.name = "bf537-lq035", .name = "bf537_lq035",
}; };
#endif #endif
......
...@@ -77,15 +77,14 @@ static void __init bfin_init_tables(unsigned long cclk, unsigned long sclk) ...@@ -77,15 +77,14 @@ static void __init bfin_init_tables(unsigned long cclk, unsigned long sclk)
csel = bfin_read32(CGU0_DIV) & 0x1F; csel = bfin_read32(CGU0_DIV) & 0x1F;
#endif #endif
for (index = 0; (cclk >> index) >= min_cclk && csel <= 3; index++, csel++) { for (index = 0; (cclk >> index) >= min_cclk && csel <= 3 && index < 3; index++, csel++) {
bfin_freq_table[index].frequency = cclk >> index; bfin_freq_table[index].frequency = cclk >> index;
#ifndef CONFIG_BF60x #ifndef CONFIG_BF60x
dpm_state_table[index].csel = csel << 4; /* Shift now into PLL_DIV bitpos */ dpm_state_table[index].csel = csel << 4; /* Shift now into PLL_DIV bitpos */
dpm_state_table[index].tscale = (TIME_SCALE / (1 << csel)) - 1;
#else #else
dpm_state_table[index].csel = csel; dpm_state_table[index].csel = csel;
dpm_state_table[index].tscale = TIME_SCALE >> index;
#endif #endif
dpm_state_table[index].tscale = (TIME_SCALE >> index) - 1;
pr_debug("cpufreq: freq:%d csel:0x%x tscale:%d\n", pr_debug("cpufreq: freq:%d csel:0x%x tscale:%d\n",
bfin_freq_table[index].frequency, bfin_freq_table[index].frequency,
...@@ -135,7 +134,7 @@ static int bfin_target(struct cpufreq_policy *poli, ...@@ -135,7 +134,7 @@ static int bfin_target(struct cpufreq_policy *poli,
unsigned int plldiv; unsigned int plldiv;
#endif #endif
unsigned int index, cpu; unsigned int index, cpu;
unsigned long flags, cclk_hz; unsigned long cclk_hz;
struct cpufreq_freqs freqs; struct cpufreq_freqs freqs;
static unsigned long lpj_ref; static unsigned long lpj_ref;
static unsigned int lpj_ref_freq; static unsigned int lpj_ref_freq;
...@@ -166,7 +165,6 @@ static int bfin_target(struct cpufreq_policy *poli, ...@@ -166,7 +165,6 @@ static int bfin_target(struct cpufreq_policy *poli,
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
if (cpu == CPUFREQ_CPU) { if (cpu == CPUFREQ_CPU) {
flags = hard_local_irq_save();
#ifndef CONFIG_BF60x #ifndef CONFIG_BF60x
plldiv = (bfin_read_PLL_DIV() & SSEL) | plldiv = (bfin_read_PLL_DIV() & SSEL) |
dpm_state_table[index].csel; dpm_state_table[index].csel;
...@@ -195,7 +193,6 @@ static int bfin_target(struct cpufreq_policy *poli, ...@@ -195,7 +193,6 @@ static int bfin_target(struct cpufreq_policy *poli,
loops_per_jiffy = cpufreq_scale(lpj_ref, loops_per_jiffy = cpufreq_scale(lpj_ref,
lpj_ref_freq, freqs.new); lpj_ref_freq, freqs.new);
} }
hard_local_irq_restore(flags);
} }
/* TODO: just test case for cycles clock source, remove later */ /* TODO: just test case for cycles clock source, remove later */
cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
......
...@@ -1441,7 +1441,6 @@ int __init init_arch_irq(void) ...@@ -1441,7 +1441,6 @@ int __init init_arch_irq(void)
IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
bfin_sti(bfin_irq_flags);
/* This implicitly covers ANOMALY_05000171 /* This implicitly covers ANOMALY_05000171
* Boot-ROM code modifies SICA_IWRx wakeup registers * Boot-ROM code modifies SICA_IWRx wakeup registers
......
...@@ -146,7 +146,7 @@ static irqreturn_t ipi_handler_int1(int irq, void *dev_instance) ...@@ -146,7 +146,7 @@ static irqreturn_t ipi_handler_int1(int irq, void *dev_instance)
platform_clear_ipi(cpu, IRQ_SUPPLE_1); platform_clear_ipi(cpu, IRQ_SUPPLE_1);
bfin_ipi_data = &__get_cpu_var(bfin_ipi); bfin_ipi_data = &__get_cpu_var(bfin_ipi);
smp_mb();
while ((pending = xchg(&bfin_ipi_data->bits, 0)) != 0) { while ((pending = xchg(&bfin_ipi_data->bits, 0)) != 0) {
msg = 0; msg = 0;
do { do {
...@@ -195,7 +195,7 @@ void send_ipi(const struct cpumask *cpumask, enum ipi_message_type msg) ...@@ -195,7 +195,7 @@ void send_ipi(const struct cpumask *cpumask, enum ipi_message_type msg)
unsigned long flags; unsigned long flags;
local_irq_save(flags); local_irq_save(flags);
smp_mb();
for_each_cpu(cpu, cpumask) { for_each_cpu(cpu, cpumask) {
bfin_ipi_data = &per_cpu(bfin_ipi, cpu); bfin_ipi_data = &per_cpu(bfin_ipi, cpu);
smp_mb(); smp_mb();
......
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