drm/rockchip: vop: Correct enabled clocks during setup
When doing the initial setup both the hclk and the aclk need to be enabled otherwise the board will simply hang. This only occurs when building the vop driver as a module, when its built-in the initial setup happens to run before the clock framework shuts of unused clocks (including the aclk). While there also switch to doing prepare and enable in one step rather then separate steps to reduce the amount of code required. Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: NMark Yao <mark.yao@rock-chips.com> Tested-by: NYakir Yang <ykk@rock-chips.com> Tested-by: NRomain Perier <romain.perier@gmail.com>
Showing
想要评论请 注册 或 登录