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d5c5bcf6
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d5c5bcf6
编写于
8月 20, 2015
作者:
B
Ben Skeggs
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
drm/nouveau/imem: switch to device pri macros
Signed-off-by:
N
Ben Skeggs
<
bskeggs@redhat.com
>
上级
fef5cc0f
变更
4
隐藏空白更改
内联
并排
Showing
4 changed file
with
17 addition
and
11 deletion
+17
-11
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c
+6
-4
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c
+4
-2
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c
+1
-1
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c
+6
-4
未找到文件。
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c
浏览文件 @
d5c5bcf6
...
...
@@ -107,6 +107,7 @@ gk20a_instobj_rd32(struct nvkm_object *object, u64 offset)
{
struct
gk20a_instmem
*
imem
=
(
void
*
)
nvkm_instmem
(
object
);
struct
gk20a_instobj
*
node
=
(
void
*
)
object
;
struct
nvkm_device
*
device
=
imem
->
base
.
subdev
.
device
;
unsigned
long
flags
;
u64
base
=
(
node
->
mem
->
offset
+
offset
)
&
0xffffff00000ULL
;
u64
addr
=
(
node
->
mem
->
offset
+
offset
)
&
0x000000fffffULL
;
...
...
@@ -114,10 +115,10 @@ gk20a_instobj_rd32(struct nvkm_object *object, u64 offset)
spin_lock_irqsave
(
&
imem
->
lock
,
flags
);
if
(
unlikely
(
imem
->
addr
!=
base
))
{
nv
_wr32
(
imem
,
0x001700
,
base
>>
16
);
nv
km_wr32
(
device
,
0x001700
,
base
>>
16
);
imem
->
addr
=
base
;
}
data
=
nv
_rd32
(
imem
,
0x700000
+
addr
);
data
=
nv
km_rd32
(
device
,
0x700000
+
addr
);
spin_unlock_irqrestore
(
&
imem
->
lock
,
flags
);
return
data
;
}
...
...
@@ -127,16 +128,17 @@ gk20a_instobj_wr32(struct nvkm_object *object, u64 offset, u32 data)
{
struct
gk20a_instmem
*
imem
=
(
void
*
)
nvkm_instmem
(
object
);
struct
gk20a_instobj
*
node
=
(
void
*
)
object
;
struct
nvkm_device
*
device
=
imem
->
base
.
subdev
.
device
;
unsigned
long
flags
;
u64
base
=
(
node
->
mem
->
offset
+
offset
)
&
0xffffff00000ULL
;
u64
addr
=
(
node
->
mem
->
offset
+
offset
)
&
0x000000fffffULL
;
spin_lock_irqsave
(
&
imem
->
lock
,
flags
);
if
(
unlikely
(
imem
->
addr
!=
base
))
{
nv
_wr32
(
imem
,
0x001700
,
base
>>
16
);
nv
km_wr32
(
device
,
0x001700
,
base
>>
16
);
imem
->
addr
=
base
;
}
nv
_wr32
(
imem
,
0x700000
+
addr
,
data
);
nv
km_wr32
(
device
,
0x700000
+
addr
,
data
);
spin_unlock_irqrestore
(
&
imem
->
lock
,
flags
);
}
...
...
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c
浏览文件 @
d5c5bcf6
...
...
@@ -105,13 +105,15 @@ nv04_instobj_oclass = {
static
u32
nv04_instmem_rd32
(
struct
nvkm_object
*
object
,
u64
addr
)
{
return
nv_rd32
(
object
,
0x700000
+
addr
);
struct
nvkm_instmem
*
imem
=
(
void
*
)
object
;
return
nvkm_rd32
(
imem
->
subdev
.
device
,
0x700000
+
addr
);
}
static
void
nv04_instmem_wr32
(
struct
nvkm_object
*
object
,
u64
addr
,
u32
data
)
{
return
nv_wr32
(
object
,
0x700000
+
addr
,
data
);
struct
nvkm_instmem
*
imem
=
(
void
*
)
object
;
nvkm_wr32
(
imem
->
subdev
.
device
,
0x700000
+
addr
,
data
);
}
void
...
...
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c
浏览文件 @
d5c5bcf6
...
...
@@ -75,7 +75,7 @@ nv40_instmem_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
* to fit graphics contexts for every channel, the magics come
* from engine/gr/nv40.c
*/
vs
=
hweight8
((
nv
_rd32
(
imem
,
0x001540
)
&
0x0000ff00
)
>>
8
);
vs
=
hweight8
((
nv
km_rd32
(
device
,
0x001540
)
&
0x0000ff00
)
>>
8
);
if
(
device
->
chipset
==
0x40
)
imem
->
base
.
reserved
=
0x6aa0
*
vs
;
else
if
(
device
->
chipset
<
0x43
)
imem
->
base
.
reserved
=
0x4f00
*
vs
;
else
if
(
nv44_gr_class
(
imem
))
imem
->
base
.
reserved
=
0x4980
*
vs
;
...
...
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c
浏览文件 @
d5c5bcf6
...
...
@@ -45,6 +45,7 @@ nv50_instobj_rd32(struct nvkm_object *object, u64 offset)
{
struct
nv50_instmem
*
imem
=
(
void
*
)
nvkm_instmem
(
object
);
struct
nv50_instobj
*
node
=
(
void
*
)
object
;
struct
nvkm_device
*
device
=
imem
->
base
.
subdev
.
device
;
unsigned
long
flags
;
u64
base
=
(
node
->
mem
->
offset
+
offset
)
&
0xffffff00000ULL
;
u64
addr
=
(
node
->
mem
->
offset
+
offset
)
&
0x000000fffffULL
;
...
...
@@ -52,10 +53,10 @@ nv50_instobj_rd32(struct nvkm_object *object, u64 offset)
spin_lock_irqsave
(
&
imem
->
lock
,
flags
);
if
(
unlikely
(
imem
->
addr
!=
base
))
{
nv
_wr32
(
imem
,
0x001700
,
base
>>
16
);
nv
km_wr32
(
device
,
0x001700
,
base
>>
16
);
imem
->
addr
=
base
;
}
data
=
nv
_rd32
(
imem
,
0x700000
+
addr
);
data
=
nv
km_rd32
(
device
,
0x700000
+
addr
);
spin_unlock_irqrestore
(
&
imem
->
lock
,
flags
);
return
data
;
}
...
...
@@ -65,16 +66,17 @@ nv50_instobj_wr32(struct nvkm_object *object, u64 offset, u32 data)
{
struct
nv50_instmem
*
imem
=
(
void
*
)
nvkm_instmem
(
object
);
struct
nv50_instobj
*
node
=
(
void
*
)
object
;
struct
nvkm_device
*
device
=
imem
->
base
.
subdev
.
device
;
unsigned
long
flags
;
u64
base
=
(
node
->
mem
->
offset
+
offset
)
&
0xffffff00000ULL
;
u64
addr
=
(
node
->
mem
->
offset
+
offset
)
&
0x000000fffffULL
;
spin_lock_irqsave
(
&
imem
->
lock
,
flags
);
if
(
unlikely
(
imem
->
addr
!=
base
))
{
nv
_wr32
(
imem
,
0x001700
,
base
>>
16
);
nv
km_wr32
(
device
,
0x001700
,
base
>>
16
);
imem
->
addr
=
base
;
}
nv
_wr32
(
imem
,
0x700000
+
addr
,
data
);
nv
km_wr32
(
device
,
0x700000
+
addr
,
data
);
spin_unlock_irqrestore
(
&
imem
->
lock
,
flags
);
}
...
...
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