提交 d364a77d 编写于 作者: M Mikko Perttunen 提交者: Peter De Schrijver

ARM: tegra: Add PLL_M_UD and PLL_C_UD to tegra124-car binding header

Add these clocks to the binding header so that EMC timings that have
them as parent can refer to the clocks.
Signed-off-by: NMikko Perttunen <mperttunen@nvidia.com>
上级 9e82bf01
......@@ -337,6 +337,10 @@
#define TEGRA124_CLK_DSIB_MUX 310
#define TEGRA124_CLK_SOR0_LVDS 311
#define TEGRA124_CLK_XUSB_SS_DIV2 312
#define TEGRA124_CLK_CLK_MAX 313
#define TEGRA124_CLK_PLL_M_UD 313
#define TEGRA124_CLK_PLL_C_UD 314
#define TEGRA124_CLK_CLK_MAX 315
#endif /* _DT_BINDINGS_CLOCK_TEGRA124_CAR_H */
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