提交 d2ebfb33 编写于 作者: R Russell King - ARM Linux 提交者: Vinod Koul

dmaengine: add private header file

Add a local private header file to contain definitions and declarations
which should only be used by DMA engine drivers.

We also fix linux/dmaengine.h to use LINUX_DMAENGINE_H to guard against
multiple inclusion.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Tested-by: NLinus Walleij <linus.walleij@linaro.org>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NJassi Brar <jassisinghbrar@gmail.com>
[imx-sdma.c & mxs-dma.c]
Tested-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
上级 4d4e58de
......@@ -85,6 +85,8 @@
#include <linux/slab.h>
#include <asm/hardware/pl080.h>
#include "dmaengine.h"
#define DRIVER_NAME "pl08xdmac"
static struct amba_driver pl08x_amba_driver;
......
......@@ -27,6 +27,7 @@
#include <linux/of_device.h>
#include "at_hdmac_regs.h"
#include "dmaengine.h"
/*
* Glossary
......
......@@ -24,6 +24,7 @@
#include <mach/coh901318.h>
#include "coh901318_lli.h"
#include "dmaengine.h"
#define COHC_2_DEV(cohc) (&cohc->chan.dev->device)
......
/*
* The contents of this file are private to DMA engine drivers, and is not
* part of the API to be used by DMA engine users.
*/
#ifndef DMAENGINE_H
#define DMAENGINE_H
#include <linux/dmaengine.h>
#endif
......@@ -23,6 +23,7 @@
#include <linux/slab.h>
#include "dw_dmac_regs.h"
#include "dmaengine.h"
/*
* This supports the Synopsys "DesignWare AHB Central DMA Controller",
......
......@@ -28,6 +28,8 @@
#include <mach/dma.h>
#include "dmaengine.h"
/* M2P registers */
#define M2P_CONTROL 0x0000
#define M2P_CONTROL_STALLINT BIT(0)
......
......@@ -35,6 +35,7 @@
#include <linux/dmapool.h>
#include <linux/of_platform.h>
#include "dmaengine.h"
#include "fsldma.h"
#define chan_dbg(chan, fmt, arg...) \
......
......@@ -30,6 +30,8 @@
#include <mach/dma-v1.h>
#include <mach/hardware.h>
#include "dmaengine.h"
struct imxdma_channel {
struct imxdma_engine *imxdma;
unsigned int channel;
......
......@@ -43,6 +43,8 @@
#include <mach/dma.h>
#include <mach/hardware.h>
#include "dmaengine.h"
/* SDMA registers */
#define SDMA_H_C0PTR 0x000
#define SDMA_H_INTR 0x004
......
......@@ -29,6 +29,8 @@
#include <linux/intel_mid_dma.h>
#include <linux/module.h>
#include "dmaengine.h"
#define MAX_CHAN 4 /*max ch across controllers*/
#include "intel_mid_dma_regs.h"
......
......@@ -40,6 +40,8 @@
#include "registers.h"
#include "hw.h"
#include "../dmaengine.h"
int ioat_pending_level = 4;
module_param(ioat_pending_level, int, 0644);
MODULE_PARM_DESC(ioat_pending_level,
......
......@@ -41,6 +41,8 @@
#include "registers.h"
#include "hw.h"
#include "../dmaengine.h"
int ioat_ring_alloc_order = 8;
module_param(ioat_ring_alloc_order, int, 0644);
MODULE_PARM_DESC(ioat_ring_alloc_order,
......
......@@ -36,6 +36,8 @@
#include <mach/adma.h>
#include "dmaengine.h"
#define to_iop_adma_chan(chan) container_of(chan, struct iop_adma_chan, common)
#define to_iop_adma_device(dev) \
container_of(dev, struct iop_adma_device, common)
......
......@@ -25,6 +25,7 @@
#include <mach/ipu.h>
#include "../dmaengine.h"
#include "ipu_intern.h"
#define FS_VF_IN_VALID 0x00000002
......
......@@ -44,6 +44,8 @@
#include <linux/random.h>
#include "dmaengine.h"
/* Number of DMA Transfer descriptors allocated per channel */
#define MPC_DMA_DESCRIPTORS 64
......
......@@ -26,6 +26,8 @@
#include <linux/platform_device.h>
#include <linux/memory.h>
#include <plat/mv_xor.h>
#include "dmaengine.h"
#include "mv_xor.h"
static void mv_xor_issue_pending(struct dma_chan *chan);
......
......@@ -28,6 +28,8 @@
#include <mach/dma.h>
#include <mach/common.h>
#include "dmaengine.h"
/*
* NOTE: The term "PIO" throughout the mxs-dma implementation means
* PIO mode of mxs apbh-dma and apbx-dma. With this working mode,
......
......@@ -25,6 +25,8 @@
#include <linux/module.h>
#include <linux/pch_dma.h>
#include "dmaengine.h"
#define DRV_NAME "pch-dma"
#define DMA_CTL0_DISABLE 0x0
......
......@@ -21,6 +21,8 @@
#include <linux/scatterlist.h>
#include <linux/of.h>
#include "dmaengine.h"
#define NR_DEFAULT_DESC 16
enum desc_status {
......
......@@ -46,6 +46,7 @@
#include <asm/dcr.h>
#include <asm/dcr-regs.h>
#include "adma.h"
#include "../dmaengine.h"
enum ppc_adma_init_code {
PPC_ADMA_INIT_OK = 0,
......
......@@ -30,6 +30,8 @@
#include <linux/kdebug.h>
#include <linux/spinlock.h>
#include <linux/rculist.h>
#include "dmaengine.h"
#include "shdma.h"
/* DMA descriptor control */
......
......@@ -21,6 +21,7 @@
#include <plat/ste_dma40.h>
#include "dmaengine.h"
#include "ste_dma40_ll.h"
#define D40_NAME "dma40"
......
......@@ -31,6 +31,8 @@
#include <linux/timb_dma.h>
#include "dmaengine.h"
#define DRIVER_NAME "timb-dma"
/* Global DMA registers */
......
......@@ -15,6 +15,8 @@
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/scatterlist.h>
#include "dmaengine.h"
#include "txx9dmac.h"
static struct txx9dmac_chan *to_txx9dmac_chan(struct dma_chan *chan)
......
......@@ -18,8 +18,8 @@
* The full GNU General Public License is included in this distribution in the
* file called COPYING.
*/
#ifndef DMAENGINE_H
#define DMAENGINE_H
#ifndef LINUX_DMAENGINE_H
#define LINUX_DMAENGINE_H
#include <linux/device.h>
#include <linux/uio.h>
......
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