提交 d17c7868 编写于 作者: R Raanan Avargil 提交者: Jeff Kirsher

e1000e: Increase timeout of polling bit RSPCIPHY

Due to timing changes to the ME firmware in Skylake, this timer
needs to be increased to 300ms.
Signed-off-by: NRaanan Avargil <raanan.avargil@intel.com>
Tested-by: NAaron Brown <aaron.f.brown@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
上级 b77ac46b
......@@ -1984,7 +1984,7 @@ static s32 e1000_check_reset_block_ich8lan(struct e1000_hw *hw)
int i = 0;
while ((blocked = !(er32(FWSM) & E1000_ICH_FWSM_RSPCIPHY)) &&
(i++ < 10))
(i++ < 30))
usleep_range(10000, 20000);
return blocked ? E1000_BLK_PHY_RESET : 0;
}
......
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