提交 ce88168f 编写于 作者: M Mark Brown

ASoC: Fix offset of freqmode in WM8580 PLL configuration

Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@kernel.org
上级 516ef69f
......@@ -522,7 +522,7 @@ static int wm8580_set_dai_pll(struct snd_soc_dai *codec_dai,
reg = wm8580_read(codec, WM8580_PLLA4 + offset);
reg &= ~0x3f;
reg |= pll_div.prescale | pll_div.postscale << 1 |
pll_div.freqmode << 4;
pll_div.freqmode << 3;
wm8580_write(codec, WM8580_PLLA4 + offset, reg);
......
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