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提交 caa59428 编写于 作者: L Linus Torvalds
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Merge tag 'staging-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging 

Pull staging/iio driver updates from Greg KH:
 "Here is the big staging and iio driver patchsets for 4.11-rc1.

  We almost broke even this time around, with only a few thousand lines
  added overall, as we removed the old and obsolete i4l code, but added
  some new drivers for the RPi platform, as well as adding some new IIO
  drivers.

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'staging-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (669 commits)
  Staging: vc04_services: Fix the "space prohibited" code style errors
  Staging: vc04_services: Fix the "wrong indent" code style errors
  staging: octeon: Use net_device_stats from struct net_device
  Staging: rtl8192u: ieee80211: ieee80211.h - style fix
  Staging: rtl8192u: ieee80211: ieee80211_tx.c - style fix
  Staging: rtl8192u: ieee80211: rtl819x_BAProc.c - style fix
  Staging: rtl8192u: ieee80211: ieee80211_module.c - style fix
  Staging: rtl8192u: ieee80211: rtl819x_TSProc.c - style fix
  Staging: rtl8192u: r8192U.h - style fix
  Staging: rtl8192u: r8192U_core.c - style fix
  Staging: rtl8192u: r819xU_cmdpkt.c - style fix
  staging: rtl8192u: blank lines aren't necessary before a close brace '}'
  staging: rtl8192u: Adding space after enum and struct definition
  staging: rtl8192u: Adding space after struct definition
  Staging: ks7010: Add required and preferred spaces around operators
  Staging: ks7010: ks*: Remove redundant blank lines
  Staging: ks7010: ks*: Add missing blank lines after declarations
  staging: visorbus, replace init_timer with setup_timer
  staging: vt6656: rxtx.c Removed multiple dereferencing
  staging: vt6656: Alignment match open parenthesis
  ...
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Documentation/ABI/testing/sysfs-bus-iio
浏览文件 @ caa59428
......@@ -170,6 +170,16 @@ Description:
Has all of the equivalent parameters as per voltageY. Units
after application of scale and offset are m/s^2.
What: /sys/bus/iio/devices/iio:deviceX/in_gravity_x_raw
What: /sys/bus/iio/devices/iio:deviceX/in_gravity_y_raw
What: /sys/bus/iio/devices/iio:deviceX/in_gravity_z_raw
KernelVersion: 4.11
Contact: linux-iio@vger.kernel.org
Description:
Gravity in direction x, y or z (may be arbitrarily assigned
but should match other such assignments on device).
Units after application of scale and offset are m/s^2.
What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_x_raw
What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_y_raw
What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_z_raw
......@@ -805,7 +815,7 @@ Description:
attribute. E.g. if in_voltage0_raw_thresh_rising_value is set to 1200
and in_voltage0_raw_thresh_rising_hysteresis is set to 50. The event
will get activated once in_voltage0_raw goes above 1200 and will become
deactived again once the value falls below 1150.
deactivated again once the value falls below 1150.
What: /sys/.../events/in_accel_x_raw_roc_rising_value
What: /sys/.../events/in_accel_x_raw_roc_falling_value
......@@ -1245,7 +1255,8 @@ Description:
reflectivity of infrared or ultrasound emitted.
Often these sensors are unit less and as such conversion
to SI units is not possible. Higher proximity measurements
indicate closer objects, and vice versa.
indicate closer objects, and vice versa. Units after
application of scale and offset are meters.
What: /sys/.../iio:deviceX/in_illuminance_input
What: /sys/.../iio:deviceX/in_illuminance_raw
......
Documentation/ABI/testing/sysfs-bus-iio-adc-stm32 0 → 100644
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What: /sys/bus/iio/devices/triggerX/trigger_polarity
KernelVersion: 4.11
Contact: fabrice.gasnier@st.com
Description:
The STM32 ADC can be configured to use external trigger sources
(e.g. timers, pwm or exti gpio). Then, it can be tuned to start
conversions on external trigger by either:
- "rising-edge"
- "falling-edge"
- "both-edges".
Reading returns current trigger polarity.
Writing value before enabling conversions sets trigger polarity.
What: /sys/bus/iio/devices/triggerX/trigger_polarity_available
KernelVersion: 4.11
Contact: fabrice.gasnier@st.com
Description:
List all available trigger_polarity settings.
Documentation/ABI/testing/sysfs-bus-iio-distance-srf08 0 → 100644
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What /sys/bus/iio/devices/iio:deviceX/sensor_sensitivity
Date: January 2017
KernelVersion: 4.11
Contact: linux-iio@vger.kernel.org
Description:
Show or set the gain boost of the amp, from 0-31 range.
default 31
What /sys/bus/iio/devices/iio:deviceX/sensor_max_range
Date: January 2017
KernelVersion: 4.11
Contact: linux-iio@vger.kernel.org
Description:
Show or set the maximum range between the sensor and the
first object echoed in meters. Default value is 6.020.
This setting limits the time the driver is waiting for a
echo.
Showing the range of available values is represented as the
minimum value, the step and the maximum value, all enclosed
in square brackets.
Example:
[0.043 0.043 11.008]
Documentation/ABI/testing/sysfs-bus-iio-timer-stm32 0 → 100644
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What: /sys/bus/iio/devices/triggerX/master_mode_available
KernelVersion: 4.11
Contact: benjamin.gaignard@st.com
Description:
Reading returns the list possible master modes which are:
- "reset" : The UG bit from the TIMx_EGR register is used as trigger output (TRGO).
- "enable" : The Counter Enable signal CNT_EN is used as trigger output.
- "update" : The update event is selected as trigger output.
For instance a master timer can then be used as a prescaler for a slave timer.
- "compare_pulse" : The trigger output send a positive pulse when the CC1IF flag is to be set.
- "OC1REF" : OC1REF signal is used as trigger output.
- "OC2REF" : OC2REF signal is used as trigger output.
- "OC3REF" : OC3REF signal is used as trigger output.
- "OC4REF" : OC4REF signal is used as trigger output.
What: /sys/bus/iio/devices/triggerX/master_mode
KernelVersion: 4.11
Contact: benjamin.gaignard@st.com
Description:
Reading returns the current master modes.
Writing set the master mode
What: /sys/bus/iio/devices/triggerX/sampling_frequency
KernelVersion: 4.11
Contact: benjamin.gaignard@st.com
Description:
Reading returns the current sampling frequency.
Writing an value different of 0 set and start sampling.
Writing 0 stop sampling.
Documentation/devicetree/bindings/i2c/trivial-devices.txt
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......@@ -36,6 +36,7 @@ dallas,ds1775 Tiny Digital Thermometer and Thermostat
dallas,ds3232 Extremely Accurate I²C RTC with Integrated Crystal and SRAM
dallas,ds4510 CPU Supervisor with Nonvolatile Memory and Programmable I/O
dallas,ds75 Digital Thermometer and Thermostat
devantech,srf08 Devantech SRF08 ultrasonic ranger
dlg,da9053 DA9053: flexible system level PMIC with multicore support
dlg,da9063 DA9063: system PMIC for quad-core application processors
domintech,dmard09 DMARD09: 3-axis Accelerometer
......
Documentation/devicetree/bindings/iio/accel/lis302.txt
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......@@ -5,7 +5,7 @@ that apply in on the generic device (independent from the bus).
Required properties for the SPI bindings:
- compatible: should be set to "st,lis3lv02d_spi"
- compatible: should be set to "st,lis3lv02d-spi"
- reg: the chipselect index
- spi-max-frequency: maximal bus speed, should be set to 1000000 unless
constrained by external circuitry
......
Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt 0 → 100644
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* Amlogic Meson SAR (Successive Approximation Register) A/D converter
Required properties:
- compatible: depending on the SoC this should be one of:
- "amlogic,meson-gxbb-saradc" for GXBB
- "amlogic,meson-gxl-saradc" for GXL
- "amlogic,meson-gxm-saradc" for GXM
along with the generic "amlogic,meson-saradc"
- reg: the physical base address and length of the registers
- clocks: phandle and clock identifier (see clock-names)
- clock-names: mandatory clocks:
- "clkin" for the reference clock (typically XTAL)
- "core" for the SAR ADC core clock
optional clocks:
- "sana" for the analog clock
- "adc_clk" for the ADC (sampling) clock
- "adc_sel" for the ADC (sampling) clock mux
- vref-supply: the regulator supply for the ADC reference voltage
- #io-channel-cells: must be 1, see ../iio-bindings.txt
Example:
saradc: adc@8680 {
compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
#io-channel-cells = <1>;
reg = <0x0 0x8680 0x0 0x34>;
clocks = <&xtal>,
<&clkc CLKID_SAR_ADC>,
<&clkc CLKID_SANA>,
<&clkc CLKID_SAR_ADC_CLK>,
<&clkc CLKID_SAR_ADC_SEL>;
clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel";
};
Documentation/devicetree/bindings/iio/adc/avia-hx711.txt 0 → 100644
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* AVIA HX711 ADC chip for weight cells
Bit-banging driver
Required properties:
- compatible: Should be "avia,hx711"
- sck-gpios: Definition of the GPIO for the clock
- dout-gpios: Definition of the GPIO for data-out
See Documentation/devicetree/bindings/gpio/gpio.txt
- avdd-supply: Definition of the regulator used as analog supply
Example:
weight@0 {
compatible = "avia,hx711";
sck-gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
dout-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
avdd-suppy = <&avdd>;
};
Documentation/devicetree/bindings/iio/adc/max11100.txt 0 → 100644
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* Maxim max11100 Analog to Digital Converter (ADC)
Required properties:
- compatible: Should be "maxim,max11100"
- reg: the adc unit address
- vref-supply: phandle to the regulator that provides reference voltage
Optional properties:
- spi-max-frequency: SPI maximum frequency
Example:
max11100: adc@0 {
compatible = "maxim,max11100";
reg = <0>;
vref-supply = <&adc0_vref>;
spi-max-frequency = <240000>;
};
Documentation/devicetree/bindings/iio/adc/qcom,pm8xxx-xoadc.txt 0 → 100644
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Qualcomm's PM8xxx voltage XOADC
The Qualcomm PM8xxx PMICs contain a HK/XO ADC (Housekeeping/Crystal
oscillator ADC) encompassing PM8018, PM8038, PM8058 and PM8921.
Required properties:
- compatible: should be one of:
"qcom,pm8018-adc"
"qcom,pm8038-adc"
"qcom,pm8058-adc"
"qcom,pm8921-adc"
- reg: should contain the ADC base address in the PMIC, typically
0x197.
- xoadc-ref-supply: should reference a regulator that can supply
a reference voltage on demand. The reference voltage may vary
with PMIC variant but is typically something like 2.2 or 1.8V.
The following required properties are standard for IO channels, see
iio-bindings.txt for more details:
- #address-cells: should be set to <1>
- #size-cells: should be set to <0>
- #io-channel-cells: should be set to <1>
- interrupts: should refer to the parent PMIC interrupt controller
and reference the proper ADC interrupt.
Required subnodes:
The ADC channels are configured as subnodes of the ADC. Since some of
them are used for calibrating the ADC, these nodes are compulsory:
adc-channel@c {
reg = <0x0c>;
};
adc-channel@d {
reg = <0x0d>;
};
adc-channel@f {
reg = <0x0f>;
};
These three nodes are used for absolute and ratiometric calibration
and only need to have these reg values: they are by hardware definition
1:1 ratio converters that sample 625, 1250 and 0 milliV and create
an interpolation calibration for all other ADCs.
Optional subnodes: any channels other than channel 0x0c, 0x0d and
0x0f are optional.
Required channel node properties:
- reg: should contain the hardware channel number in the range
0 .. 0x0f (4 bits). The hardware only supports 16 channels.
Optional channel node properties:
- qcom,decimation:
Value type: <u32>
Definition: This parameter is used to decrease the ADC sampling rate.
Quicker measurements can be made by reducing the decimation ratio.
Valid values are 512, 1024, 2048, 4096.
If the property is not found, a default value of 512 will be used.
- qcom,ratiometric:
Value type: <u32>
Definition: Channel calibration type. If this property is specified
VADC will use a special voltage references for channel
calibration. The available references are specified in the
as a u32 value setting (see below) and it is compulsory
to also specify this reference if ratiometric calibration
is selected.
If the property is not found, the channel will be
calibrated with the 0.625V and 1.25V reference channels, also
known as an absolute calibration.
The reference voltage pairs when using ratiometric calibration:
0 = XO_IN/XOADC_GND
1 = PMIC_IN/XOADC_GND
2 = PMIC_IN/BMS_CSP
3 (invalid)
4 = XOADC_GND/XOADC_GND
5 = XOADC_VREF/XOADC_GND
Example:
xoadc: xoadc@197 {
compatible = "qcom,pm8058-adc";
reg = <0x197>;
interrupt-parent = <&pm8058>;
interrupts = <76 1>;
#address-cells = <1>;
#size-cells = <0>;
#io-channel-cells = <1>;
vcoin: adc-channel@0 {
reg = <0x00>;
};
vbat: adc-channel@1 {
reg = <0x01>;
};
dcin: adc-channel@2 {
reg = <0x02>;
};
ichg: adc-channel@3 {
reg = <0x03>;
};
vph_pwr: adc-channel@4 {
reg = <0x04>;
};
usb_vbus: adc-channel@a {
reg = <0x0a>;
};
die_temp: adc-channel@b {
reg = <0x0b>;
};
ref_625mv: adc-channel@c {
reg = <0x0c>;
};
ref_1250mv: adc-channel@d {
reg = <0x0d>;
};
ref_325mv: adc-channel@e {
reg = <0x0e>;
};
ref_muxoff: adc-channel@f {
reg = <0x0f>;
};
};
/* IIO client node */
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&xoadc 0x01>, /* Battery */
<&xoadc 0x02>, /* DC in (charger) */
<&xoadc 0x04>, /* VPH the main system voltage */
<&xoadc 0x0b>, /* Die temperature */
<&xoadc 0x0c>, /* Reference voltage 1.25V */
<&xoadc 0x0d>, /* Reference voltage 0.625V */
<&xoadc 0x0e>; /* Reference voltage 0.325V */
};
Documentation/devicetree/bindings/iio/adc/renesas,gyroadc.txt 0 → 100644
浏览文件 @ caa59428
* Renesas RCar GyroADC device driver
The GyroADC block is a reduced SPI block with up to 8 chipselect lines,
which supports the SPI protocol of a selected few SPI ADCs. The SPI ADCs
are sampled by the GyroADC block in a round-robin fashion and the result
presented in the GyroADC registers.
Required properties:
- compatible: Should be "<soc-specific>", "renesas,rcar-gyroadc".
The <soc-specific> should be one of:
renesas,r8a7791-gyroadc - for the GyroADC block present
in r8a7791 SoC
renesas,r8a7792-gyroadc - for the GyroADC with interrupt
block present in r8a7792 SoC
- reg: Address and length of the register set for the device
- clocks: References to all the clocks specified in the clock-names
property as specified in
Documentation/devicetree/bindings/clock/clock-bindings.txt.
- clock-names: Shall contain "fck" and "if". The "fck" is the GyroADC block
clock, the "if" is the interface clock.
- power-domains: Must contain a reference to the PM domain, if available.
- #address-cells: Should be <1> (setting for the subnodes) for all ADCs
except for "fujitsu,mb88101a". Should be <0> (setting for
only subnode) for "fujitsu,mb88101a".
- #size-cells: Should be <0> (setting for the subnodes)
Sub-nodes:
You must define subnode(s) which select the connected ADC type and reference
voltage for the GyroADC channels.
Required properties for subnodes:
- compatible: Should be either of:
"fujitsu,mb88101a"
- Fujitsu MB88101A compatible mode,
12bit sampling, up to 4 channels can be sampled in
round-robin fashion. One Fujitsu chip supplies four
GyroADC channels with data as it contains four ADCs
on the chip and thus for 4-channel operation, single
MB88101A is required. The Cx chipselect lines of the
MB88101A connect directly to two CHS lines of the
GyroADC, no demuxer is required. The data out line
of each MB88101A connects to a shared input pin of
the GyroADC.
"ti,adcs7476" or "ti,adc121" or "adi,ad7476"
- TI ADCS7476 / TI ADC121 / ADI AD7476 compatible mode,
15bit sampling, up to 8 channels can be sampled in
round-robin fashion. One TI/ADI chip supplies single
ADC channel with data, thus for 8-channel operation,
8 chips are required. A 3:8 chipselect demuxer is
required to connect the nCS line of the TI/ADI chips
to the GyroADC, while MISO line of each TI/ADI ADC
connects to a shared input pin of the GyroADC.
"maxim,max1162" or "maxim,max11100"
- Maxim MAX1162 / Maxim MAX11100 compatible mode,
16bit sampling, up to 8 channels can be sampled in
round-robin fashion. One Maxim chip supplies single
ADC channel with data, thus for 8-channel operation,
8 chips are required. A 3:8 chipselect demuxer is
required to connect the nCS line of the MAX chips
to the GyroADC, while MISO line of each Maxim ADC
connects to a shared input pin of the GyroADC.
- reg: Should be the number of the analog input. Should be present
for all ADCs except "fujitsu,mb88101a".
- vref-supply: Reference to the channel reference voltage regulator.
Example:
vref_max1162: regulator-vref-max1162 {
compatible = "regulator-fixed";
regulator-name = "MAX1162 Vref";
regulator-min-microvolt = <4096000>;
regulator-max-microvolt = <4096000>;
};
adc@e6e54000 {
compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc";
reg = <0 0xe6e54000 0 64>;
clocks = <&mstp9_clks R8A7791_CLK_GYROADC>, <&clk_65m>;
clock-names = "fck", "if";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
pinctrl-0 = <&adc_pins>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
reg = <0>;
compatible = "maxim,max1162";
vref-supply = <&vref_max1162>;
};
adc@1 {
reg = <1>;
compatible = "maxim,max1162";
vref-supply = <&vref_max1162>;
};
};
Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt
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......@@ -53,6 +53,11 @@ Required properties:
- #io-channel-cells = <1>: See the IIO bindings section "IIO consumers" in
Documentation/devicetree/bindings/iio/iio-bindings.txt
Optional properties:
- dmas: Phandle to dma channel for this ADC instance.
See ../../dma/dma.txt for details.
- dma-names: Must be "rx" when dmas property is being used.
Example:
adc: adc@40012000 {
compatible = "st,stm32f4-adc-core";
......@@ -77,6 +82,8 @@ Example:
interrupt-parent = <&adc>;
interrupts = <0>;
st,adc-channels = <8>;
dmas = <&dma2 0 0 0x400 0x0>;
dma-names = "rx";
};
...
other adc child nodes follow...
......
Documentation/devicetree/bindings/iio/adc/ti-ads7950.txt 0 → 100644
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* Texas Instruments ADS7950 family of A/DC chips
Required properties:
- compatible: Must be one of "ti,ads7950", "ti,ads7951", "ti,ads7952",
"ti,ads7953", "ti,ads7954", "ti,ads7955", "ti,ads7956", "ti,ads7957",
"ti,ads7958", "ti,ads7959", "ti,ads7960", or "ti,ads7961"
- reg: SPI chip select number for the device
- #io-channel-cells: Must be 1 as per ../iio-bindings.txt
- vref-supply: phandle to a regulator node that supplies the 2.5V or 5V
reference voltage
Recommended properties:
- spi-max-frequency: Definition as per
Documentation/devicetree/bindings/spi/spi-bus.txt
Example:
adc@0 {
compatible = "ti,ads7957";
reg = <0>;
#io-channel-cells = <1>;
vref-supply = <&refin_supply>;
spi-max-frequency = <10000000>;
};
Documentation/devicetree/bindings/iio/imu/bmi160.txt 0 → 100644
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Bosch BMI160 - Inertial Measurement Unit with Accelerometer, Gyroscope
and externally connectable Magnetometer
https://www.bosch-sensortec.com/bst/products/all_products/bmi160
Required properties:
- compatible : should be "bosch,bmi160"
- reg : the I2C address or SPI chip select number of the sensor
- spi-max-frequency : set maximum clock frequency (only for SPI)
Optional properties:
- interrupt-parent : should be the phandle of the interrupt controller
- interrupts : interrupt mapping for IRQ, must be IRQ_TYPE_LEVEL_LOW
- interrupt-names : set to "INT1" if INT1 pin should be used as interrupt
input, set to "INT2" if INT2 pin should be used instead
Examples:
bmi160@68 {
compatible = "bosch,bmi160";
reg = <0x68>;
interrupt-parent = <&gpio4>;
interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "INT1";
};
bmi160@0 {
compatible = "bosch,bmi160";
reg = <0>;
spi-max-frequency = <10000000>;
interrupt-parent = <&gpio2>;
interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "INT2";
};
Documentation/devicetree/bindings/iio/imu/st_lsm6dsx.txt 0 → 100644
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* ST_LSM6DSx driver for STM 6-axis (acc + gyro) imu Mems sensors
Required properties:
- compatible: must be one of:
"st,lsm6ds3"
"st,lsm6dsm"
- reg: i2c address of the sensor / spi cs line
Optional properties:
- st,drdy-int-pin: the pin on the package that will be used to signal
"data ready" (valid values: 1 or 2).
- interrupt-parent: should be the phandle for the interrupt controller
- interrupts: interrupt mapping for IRQ. It should be configured with
flags IRQ_TYPE_LEVEL_HIGH or IRQ_TYPE_EDGE_RISING.
Refer to interrupt-controller/interrupts.txt for generic interrupt
client node bindings.
Example:
lsm6dsm@6b {
compatible = "st,lsm6dsm";
reg = <0x6b>;
interrupt-parent = <&gpio0>;
interrupts = <0 IRQ_TYPE_EDGE_RISING>;
};
Documentation/devicetree/bindings/iio/light/cm3605.txt 0 → 100644
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Capella Microsystems CM3605
Ambient Light and Short Distance Proximity Sensor
The CM3605 is an entirely analog part which however require quite a bit of
software logic to interface a host operating system.
This ALS and proximity sensor was one of the very first deployed in mobile
handsets, notably it is used in the very first Nexus One Android phone from
2010.
Required properties:
- compatible: must be: "capella,cm3605"
- aset-gpios: GPIO line controlling the ASET line (drive low
to activate the ALS, should be flagged GPIO_ACTIVE_LOW)
- interrupts: the IRQ line (such as a GPIO) that is connected to
the POUT (proximity sensor out) line. The edge detection must
be set to IRQ_TYPE_EDGE_BOTH so as to detect movements toward
and away from the proximity sensor.
- io-channels: the ADC channel used for converting the voltage from
AOUT to a digital representation.
- io-channel-names: must be "aout"
Optional properties:
- vdd-supply: regulator supplying VDD power to the component.
- capella,aset-resistance-ohms: the sensitivity calibration resistance,
in Ohms. Valid values are: 50000, 100000, 300000 and 600000,
as these are the resistance values that we are supplied with
calibration curves for. If not supplied, 100 kOhm will be assumed
but it is strongly recommended to supply this.
Example:
cm3605 {
compatible = "capella,cm3605";
vdd-supply = <&foo_reg>;
aset-gpios = <&foo_gpio 1 GPIO_ACTIVE_LOW>;
capella,aset-resistance-ohms = <100000>;
interrupts = <1 IRQ_TYPE_EDGE_BOTH>;
io-channels = <&adc 0x01>;
io-channel-names = "aout";
};
Documentation/devicetree/bindings/iio/potentiometer/max5481.txt 0 → 100644
浏览文件 @ caa59428
* Maxim Linear-Taper Digital Potentiometer MAX5481-MAX5484
The node for this driver must be a child node of a SPI controller, hence
all mandatory properties described in
Documentation/devicetree/bindings/spi/spi-bus.txt
must be specified.
Required properties:
- compatible: Must be one of the following, depending on the
model:
"maxim,max5481"
"maxim,max5482"
"maxim,max5483"
"maxim,max5484"
Example:
max548x: max548x@0 {
compatible = "maxim,max5482";
spi-max-frequency = <7000000>;
reg = <0>; /* chip-select */
};
Documentation/devicetree/bindings/iio/st-sensors.txt
浏览文件 @ caa59428
......@@ -27,6 +27,8 @@ standard bindings from pinctrl/pinctrl-bindings.txt.
Valid compatible strings:
Accelerometers:
- st,lis3lv02d (deprecated, use st,lis3lv02dl-accel)
- st,lis302dl-spi (deprecated, use st,lis3lv02dl-accel)
- st,lis3lv02dl-accel
- st,lsm303dlh-accel
- st,lsm303dlhc-accel
......
Documentation/devicetree/bindings/iio/temperature/tmp007.txt 0 → 100644
浏览文件 @ caa59428
* TI TMP007 - IR thermopile sensor with integrated math engine
Link to datasheet: http://www.ti.com/lit/ds/symlink/tmp007.pdf
Required properties:
- compatible: should be "ti,tmp007"
- reg: the I2C address of the sensor (changeable via ADR pins)
------------------------------
|ADR1 | ADR0 | Device Address|
------------------------------
0 0 0x40
0 1 0x41
0 SDA 0x42
0 SCL 0x43
1 0 0x44
1 1 0x45
1 SDA 0x46
1 SCL 0x47
Optional properties:
- interrupt-parent: should be the phandle for the interrupt controller
- interrupts: interrupt mapping for GPIO IRQ (level active low)
Example:
tmp007@40 {
compatible = "ti,tmp007";
reg = <0x40>;
interrupt-parent = <&gpio0>;
interrupts = <5 0x08>;
};
Documentation/devicetree/bindings/iio/timer/stm32-timer-trigger.txt 0 → 100644
浏览文件 @ caa59428
STMicroelectronics STM32 Timers IIO timer bindings
Must be a sub-node of an STM32 Timers device tree node.
See ../mfd/stm32-timers.txt for details about the parent node.
Required parameters:
- compatible: Must be "st,stm32-timer-trigger".
- reg: Identify trigger hardware block.
Example:
timers@40010000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40010000 0x400>;
clocks = <&rcc 0 160>;
clock-names = "clk_int";
timer@0 {
compatible = "st,stm32-timer-trigger";
reg = <0>;
};
};
Documentation/devicetree/bindings/mfd/stm32-timers.txt 0 → 100644
浏览文件 @ caa59428
STM32 Timers driver bindings
This IP provides 3 types of timer along with PWM functionality:
- advanced-control timers consist of a 16-bit auto-reload counter driven by a programmable
prescaler, break input feature, PWM outputs and complementary PWM ouputs channels.
- general-purpose timers consist of a 16-bit or 32-bit auto-reload counter driven by a
programmable prescaler and PWM outputs.
- basic timers consist of a 16-bit auto-reload counter driven by a programmable prescaler.
Required parameters:
- compatible: must be "st,stm32-timers"
- reg: Physical base address and length of the controller's
registers.
- clock-names: Set to "int".
- clocks: Phandle to the clock used by the timer module.
For Clk properties, please refer to ../clock/clock-bindings.txt
Optional parameters:
- resets: Phandle to the parent reset controller.
See ../reset/st,stm32-rcc.txt
Optional subnodes:
- pwm: See ../pwm/pwm-stm32.txt
- timer: See ../iio/timer/stm32-timer-trigger.txt
Example:
timers@40010000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40010000 0x400>;
clocks = <&rcc 0 160>;
clock-names = "clk_int";
pwm {
compatible = "st,stm32-pwm";
pinctrl-0 = <&pwm1_pins>;
pinctrl-names = "default";
};
timer@0 {
compatible = "st,stm32-timer-trigger";
reg = <0>;
};
};
Documentation/devicetree/bindings/pwm/pwm-stm32.txt 0 → 100644
浏览文件 @ caa59428
STMicroelectronics STM32 Timers PWM bindings
Must be a sub-node of an STM32 Timers device tree node.
See ../mfd/stm32-timers.txt for details about the parent node.
Required parameters:
- compatible: Must be "st,stm32-pwm".
- pinctrl-names: Set to "default".
- pinctrl-0: List of phandles pointing to pin configuration nodes for PWM module.
For Pinctrl properties see ../pinctrl/pinctrl-bindings.txt
Optional parameters:
- st,breakinput: One or two <index level filter> to describe break input configurations.
"index" indicates on which break input (0 or 1) the configuration
should be applied.
"level" gives the active level (0=low or 1=high) of the input signal
for this configuration.
"filter" gives the filtering value to be applied.
Example:
timers@40010000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40010000 0x400>;
clocks = <&rcc 0 160>;
clock-names = "clk_int";
pwm {
compatible = "st,stm32-pwm";
pinctrl-0 = <&pwm1_pins>;
pinctrl-names = "default";
st,breakinput = <0 1 5>;
};
};
Documentation/devicetree/bindings/vendor-prefixes.txt
浏览文件 @ caa59428
......@@ -40,6 +40,7 @@ atmel Atmel Corporation
auo AU Optronics Corporation
auvidea Auvidea GmbH
avago Avago Technologies
avia avia semiconductor
avic Shanghai AVIC Optoelectronics Co., Ltd.
axentia Axentia Technologies AB
axis Axis Communications AB
......@@ -75,6 +76,7 @@ dallas Maxim Integrated Products (formerly Dallas Semiconductor)
davicom DAVICOM Semiconductor, Inc.
delta Delta Electronics, Inc.
denx Denx Software Engineering
devantech Devantech, Ltd.
digi Digi International Inc.
digilent Diglent, Inc.
dlg Dialog Semiconductor
......@@ -118,6 +120,7 @@ gmt Global Mixed-mode Technology, Inc.
goodix Shenzhen Huiding Technology Co., Ltd.
google Google, Inc.
grinn Grinn
grmn Garmin Limited
gumstix Gumstix, Inc.
gw Gateworks Corporation
hannstar HannStar Display Corporation
......
MAINTAINERS
浏览文件 @ caa59428
......@@ -10251,7 +10251,8 @@ F: include/uapi/linux/qnx4_fs.h
F: include/uapi/linux/qnxtypes.h
QORIQ DPAA2 FSL-MC BUS DRIVER
M: Stuart Yoder <stuart.yoder@nxp.com>
M: Stuart Yoder <stuyoder@gmail.com>
M: Laurentiu Tudor <laurentiu.tudor@nxp.com>
L: linux-kernel@vger.kernel.org
S: Maintained
F: drivers/staging/fsl-mc/
......@@ -10528,6 +10529,12 @@ L: linux-renesas-soc@vger.kernel.org
F: drivers/net/ethernet/renesas/
F: include/linux/sh_eth.h
RENESAS R-CAR GYROADC DRIVER
M: Marek Vasut <marek.vasut@gmail.com>
L: linux-iio@vger.kernel.org
S: Supported
F: drivers/iio/adc/rcar_gyro_adc.c
RENESAS USB2 PHY DRIVER
M: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
L: linux-renesas-soc@vger.kernel.org
......
drivers/iio/accel/Kconfig
浏览文件 @ caa59428
......@@ -120,6 +120,8 @@ config HID_SENSOR_ACCEL_3D
config IIO_ST_ACCEL_3AXIS
tristate "STMicroelectronics accelerometers 3-Axis Driver"
depends on (I2C || SPI_MASTER) && SYSFS
depends on !SENSORS_LIS3_I2C
depends on !SENSORS_LIS3_SPI
select IIO_ST_SENSORS_CORE
select IIO_ST_ACCEL_I2C_3AXIS if (I2C)
select IIO_ST_ACCEL_SPI_3AXIS if (SPI_MASTER)
......
drivers/iio/accel/bmc150-accel-core.c
浏览文件 @ caa59428
......@@ -1638,7 +1638,8 @@ int bmc150_accel_core_probe(struct device *dev, struct regmap *regmap, int irq,
if (block_supported) {
indio_dev->modes |= INDIO_BUFFER_SOFTWARE;
indio_dev->info = &bmc150_accel_info_fifo;
indio_dev->buffer->attrs = bmc150_accel_fifo_attributes;
iio_buffer_set_attrs(indio_dev->buffer,
bmc150_accel_fifo_attributes);
}
}
......
drivers/iio/accel/hid-sensor-accel-3d.c
浏览文件 @ caa59428
......@@ -42,11 +42,13 @@ struct accel_3d_state {
struct hid_sensor_hub_callbacks callbacks;
struct hid_sensor_common common_attributes;
struct hid_sensor_hub_attribute_info accel[ACCEL_3D_CHANNEL_MAX];
u32 accel_val[ACCEL_3D_CHANNEL_MAX];
/* Reserve for 3 channels + padding + timestamp */
u32 accel_val[ACCEL_3D_CHANNEL_MAX + 3];
int scale_pre_decml;
int scale_post_decml;
int scale_precision;
int value_offset;
int64_t timestamp;
};
static const u32 accel_3d_addresses[ACCEL_3D_CHANNEL_MAX] = {
......@@ -87,6 +89,42 @@ static const struct iio_chan_spec accel_3d_channels[] = {
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_Z,
},
IIO_CHAN_SOFT_TIMESTAMP(3)
};
/* Channel definitions */
static const struct iio_chan_spec gravity_channels[] = {
{
.type = IIO_GRAVITY,
.modified = 1,
.channel2 = IIO_MOD_X,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_X,
}, {
.type = IIO_GRAVITY,
.modified = 1,
.channel2 = IIO_MOD_Y,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_Y,
}, {
.type = IIO_GRAVITY,
.modified = 1,
.channel2 = IIO_MOD_Z,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_HYSTERESIS),
.scan_index = CHANNEL_SCAN_INDEX_Z,
}
};
......@@ -111,6 +149,8 @@ static int accel_3d_read_raw(struct iio_dev *indio_dev,
int report_id = -1;
u32 address;
int ret_type;
struct hid_sensor_hub_device *hsdev =
accel_state->common_attributes.hsdev;
*val = 0;
*val2 = 0;
......@@ -122,8 +162,7 @@ static int accel_3d_read_raw(struct iio_dev *indio_dev,
if (report_id >= 0)
*val = sensor_hub_input_attr_get_raw_value(
accel_state->common_attributes.hsdev,
HID_USAGE_SENSOR_ACCEL_3D, address,
report_id,
hsdev->usage, address, report_id,
SENSOR_HUB_SYNC);
else {
*val = 0;
......@@ -192,11 +231,11 @@ static const struct iio_info accel_3d_info = {
};
/* Function to push data to buffer */
static void hid_sensor_push_data(struct iio_dev *indio_dev, const void *data,
int len)
static void hid_sensor_push_data(struct iio_dev *indio_dev, void *data,
int len, int64_t timestamp)
{
dev_dbg(&indio_dev->dev, "hid_sensor_push_data\n");
iio_push_to_buffers(indio_dev, data);
iio_push_to_buffers_with_timestamp(indio_dev, data, timestamp);
}
/* Callback handler to send event after all samples are received and captured */
......@@ -208,10 +247,17 @@ static int accel_3d_proc_event(struct hid_sensor_hub_device *hsdev,
struct accel_3d_state *accel_state = iio_priv(indio_dev);
dev_dbg(&indio_dev->dev, "accel_3d_proc_event\n");
if (atomic_read(&accel_state->common_attributes.data_ready))
if (atomic_read(&accel_state->common_attributes.data_ready)) {
if (!accel_state->timestamp)
accel_state->timestamp = iio_get_time_ns(indio_dev);
hid_sensor_push_data(indio_dev,
accel_state->accel_val,
sizeof(accel_state->accel_val));
accel_state->accel_val,
sizeof(accel_state->accel_val),
accel_state->timestamp);
accel_state->timestamp = 0;
}
return 0;
}
......@@ -236,6 +282,12 @@ static int accel_3d_capture_sample(struct hid_sensor_hub_device *hsdev,
*(u32 *)raw_data;
ret = 0;
break;
case HID_USAGE_SENSOR_TIME_TIMESTAMP:
accel_state->timestamp =
hid_sensor_convert_timestamp(
&accel_state->common_attributes,
*(int64_t *)raw_data);
break;
default:
break;
}
......@@ -272,7 +324,7 @@ static int accel_3d_parse_report(struct platform_device *pdev,
st->accel[2].index, st->accel[2].report_id);
st->scale_precision = hid_sensor_format_scale(
HID_USAGE_SENSOR_ACCEL_3D,
hsdev->usage,
&st->accel[CHANNEL_SCAN_INDEX_X],
&st->scale_pre_decml, &st->scale_post_decml);
......@@ -295,9 +347,12 @@ static int accel_3d_parse_report(struct platform_device *pdev,
static int hid_accel_3d_probe(struct platform_device *pdev)
{
int ret = 0;
static const char *name = "accel_3d";
static const char *name;
struct iio_dev *indio_dev;
struct accel_3d_state *accel_state;
const struct iio_chan_spec *channel_spec;
int channel_size;
struct hid_sensor_hub_device *hsdev = pdev->dev.platform_data;
indio_dev = devm_iio_device_alloc(&pdev->dev,
......@@ -311,24 +366,30 @@ static int hid_accel_3d_probe(struct platform_device *pdev)
accel_state->common_attributes.hsdev = hsdev;
accel_state->common_attributes.pdev = pdev;
ret = hid_sensor_parse_common_attributes(hsdev,
HID_USAGE_SENSOR_ACCEL_3D,
if (hsdev->usage == HID_USAGE_SENSOR_ACCEL_3D) {
name = "accel_3d";
channel_spec = accel_3d_channels;
channel_size = sizeof(accel_3d_channels);
} else {
name = "gravity";
channel_spec = gravity_channels;
channel_size = sizeof(gravity_channels);
}
ret = hid_sensor_parse_common_attributes(hsdev, hsdev->usage,
&accel_state->common_attributes);
if (ret) {
dev_err(&pdev->dev, "failed to setup common attributes\n");
return ret;
}
indio_dev->channels = kmemdup(channel_spec, channel_size, GFP_KERNEL);
indio_dev->channels = kmemdup(accel_3d_channels,
sizeof(accel_3d_channels), GFP_KERNEL);
if (!indio_dev->channels) {
dev_err(&pdev->dev, "failed to duplicate channels\n");
return -ENOMEM;
}
ret = accel_3d_parse_report(pdev, hsdev,
(struct iio_chan_spec *)indio_dev->channels,
HID_USAGE_SENSOR_ACCEL_3D, accel_state);
(struct iio_chan_spec *)indio_dev->channels,
hsdev->usage, accel_state);
if (ret) {
dev_err(&pdev->dev, "failed to setup attributes\n");
goto error_free_dev_mem;
......@@ -363,7 +424,7 @@ static int hid_accel_3d_probe(struct platform_device *pdev)
accel_state->callbacks.send_event = accel_3d_proc_event;
accel_state->callbacks.capture_sample = accel_3d_capture_sample;
accel_state->callbacks.pdev = pdev;
ret = sensor_hub_register_callback(hsdev, HID_USAGE_SENSOR_ACCEL_3D,
ret = sensor_hub_register_callback(hsdev, hsdev->usage,
&accel_state->callbacks);
if (ret < 0) {
dev_err(&pdev->dev, "callback reg failed\n");
......@@ -390,7 +451,7 @@ static int hid_accel_3d_remove(struct platform_device *pdev)
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
struct accel_3d_state *accel_state = iio_priv(indio_dev);
sensor_hub_remove_callback(hsdev, HID_USAGE_SENSOR_ACCEL_3D);
sensor_hub_remove_callback(hsdev, hsdev->usage);
iio_device_unregister(indio_dev);
hid_sensor_remove_trigger(&accel_state->common_attributes);
iio_triggered_buffer_cleanup(indio_dev);
......@@ -404,6 +465,9 @@ static const struct platform_device_id hid_accel_3d_ids[] = {
/* Format: HID-SENSOR-usage_id_in_hex_lowercase */
.name = "HID-SENSOR-200073",
},
{ /* gravity sensor */
.name = "HID-SENSOR-20007b",
},
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(platform, hid_accel_3d_ids);
......
drivers/iio/accel/mma8452.c
浏览文件 @ caa59428
......@@ -248,7 +248,7 @@ static int mma8452_get_int_plus_micros_index(const int (*vals)[2], int n,
return -EINVAL;
}
static int mma8452_get_odr_index(struct mma8452_data *data)
static unsigned int mma8452_get_odr_index(struct mma8452_data *data)
{
return (data->ctrl_reg1 & MMA8452_CTRL_DR_MASK) >>
MMA8452_CTRL_DR_SHIFT;
......@@ -260,7 +260,7 @@ static const int mma8452_samp_freq[8][2] = {
};
/* Datasheet table: step time "Relationship with the ODR" (sample frequency) */
static const int mma8452_transient_time_step_us[4][8] = {
static const unsigned int mma8452_transient_time_step_us[4][8] = {
{ 1250, 2500, 5000, 10000, 20000, 20000, 20000, 20000 }, /* normal */
{ 1250, 2500, 5000, 10000, 20000, 80000, 80000, 80000 }, /* l p l n */
{ 1250, 2500, 2500, 2500, 2500, 2500, 2500, 2500 }, /* high res*/
......
drivers/iio/accel/ssp_accel_sensor.c
浏览文件 @ caa59428
......@@ -15,6 +15,7 @@
#include <linux/iio/common/ssp_sensors.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/kfifo_buf.h>
#include <linux/module.h>
#include <linux/platform_device.h>
......@@ -135,7 +136,7 @@ static int ssp_accel_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, indio_dev);
ret = iio_device_register(indio_dev);
ret = devm_iio_device_register(&pdev->dev, indio_dev);
if (ret < 0)
return ret;
......@@ -145,21 +146,11 @@ static int ssp_accel_probe(struct platform_device *pdev)
return 0;
}
static int ssp_accel_remove(struct platform_device *pdev)
{
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
iio_device_unregister(indio_dev);
return 0;
}
static struct platform_driver ssp_accel_driver = {
.driver = {
.name = SSP_ACCEL_NAME,
},
.probe = ssp_accel_probe,
.remove = ssp_accel_remove,
};
module_platform_driver(ssp_accel_driver);
......
drivers/iio/accel/st_accel.h
浏览文件 @ caa59428
......@@ -14,6 +14,24 @@
#include <linux/types.h>
#include <linux/iio/common/st_sensors.h>
enum st_accel_type {
LSM303DLH,
LSM303DLHC,
LIS3DH,
LSM330D,
LSM330DL,
LSM330DLC,
LIS331DLH,
LSM303DL,
LSM303DLM,
LSM330,
LSM303AGR,
LIS2DH12,
LIS3L02DQ,
LNG2DM,
ST_ACCEL_MAX,
};
#define H3LIS331DL_DRIVER_NAME "h3lis331dl_accel"
#define LIS3LV02DL_ACCEL_DEV_NAME "lis3lv02dl_accel"
#define LSM303DLHC_ACCEL_DEV_NAME "lsm303dlhc_accel"
......
drivers/iio/accel/st_accel_i2c.c
浏览文件 @ caa59428
......@@ -11,6 +11,7 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/acpi.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
......@@ -20,6 +21,11 @@
#ifdef CONFIG_OF
static const struct of_device_id st_accel_of_match[] = {
{
/* An older compatible */
.compatible = "st,lis3lv02d",
.data = LIS3LV02DL_ACCEL_DEV_NAME,
},
{
.compatible = "st,lis3lv02dl-accel",
.data = LIS3LV02DL_ACCEL_DEV_NAME,
......@@ -95,25 +101,67 @@ MODULE_DEVICE_TABLE(of, st_accel_of_match);
#define st_accel_of_match NULL
#endif
#ifdef CONFIG_ACPI
static const struct acpi_device_id st_accel_acpi_match[] = {
{"SMO8A90", LNG2DM},
{ },
};
MODULE_DEVICE_TABLE(acpi, st_accel_acpi_match);
#else
#define st_accel_acpi_match NULL
#endif
static const struct i2c_device_id st_accel_id_table[] = {
{ LSM303DLH_ACCEL_DEV_NAME, LSM303DLH },
{ LSM303DLHC_ACCEL_DEV_NAME, LSM303DLHC },
{ LIS3DH_ACCEL_DEV_NAME, LIS3DH },
{ LSM330D_ACCEL_DEV_NAME, LSM330D },
{ LSM330DL_ACCEL_DEV_NAME, LSM330DL },
{ LSM330DLC_ACCEL_DEV_NAME, LSM330DLC },
{ LIS331DLH_ACCEL_DEV_NAME, LIS331DLH },
{ LSM303DL_ACCEL_DEV_NAME, LSM303DL },
{ LSM303DLM_ACCEL_DEV_NAME, LSM303DLM },
{ LSM330_ACCEL_DEV_NAME, LSM330 },
{ LSM303AGR_ACCEL_DEV_NAME, LSM303AGR },
{ LIS2DH12_ACCEL_DEV_NAME, LIS2DH12 },
{ LIS3L02DQ_ACCEL_DEV_NAME, LIS3L02DQ },
{ LNG2DM_ACCEL_DEV_NAME, LNG2DM },
{},
};
MODULE_DEVICE_TABLE(i2c, st_accel_id_table);
static int st_accel_i2c_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct iio_dev *indio_dev;
struct st_sensor_data *adata;
int err;
int ret;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*adata));
if (!indio_dev)
return -ENOMEM;
adata = iio_priv(indio_dev);
st_sensors_of_i2c_probe(client, st_accel_of_match);
if (client->dev.of_node) {
st_sensors_of_i2c_probe(client, st_accel_of_match);
} else if (ACPI_HANDLE(&client->dev)) {
ret = st_sensors_match_acpi_device(&client->dev);
if ((ret < 0) || (ret >= ST_ACCEL_MAX))
return -ENODEV;
strncpy(client->name, st_accel_id_table[ret].name,
sizeof(client->name));
client->name[sizeof(client->name) - 1] = '\0';
} else if (!id)
return -ENODEV;
st_sensors_i2c_configure(indio_dev, client, adata);
err = st_accel_common_probe(indio_dev);
if (err < 0)
return err;
ret = st_accel_common_probe(indio_dev);
if (ret < 0)
return ret;
return 0;
}
......@@ -125,29 +173,11 @@ static int st_accel_i2c_remove(struct i2c_client *client)
return 0;
}
static const struct i2c_device_id st_accel_id_table[] = {
{ LSM303DLH_ACCEL_DEV_NAME },
{ LSM303DLHC_ACCEL_DEV_NAME },
{ LIS3DH_ACCEL_DEV_NAME },
{ LSM330D_ACCEL_DEV_NAME },
{ LSM330DL_ACCEL_DEV_NAME },
{ LSM330DLC_ACCEL_DEV_NAME },
{ LIS331DLH_ACCEL_DEV_NAME },
{ LSM303DL_ACCEL_DEV_NAME },
{ LSM303DLM_ACCEL_DEV_NAME },
{ LSM330_ACCEL_DEV_NAME },
{ LSM303AGR_ACCEL_DEV_NAME },
{ LIS2DH12_ACCEL_DEV_NAME },
{ LIS3L02DQ_ACCEL_DEV_NAME },
{ LNG2DM_ACCEL_DEV_NAME },
{},
};
MODULE_DEVICE_TABLE(i2c, st_accel_id_table);
static struct i2c_driver st_accel_driver = {
.driver = {
.name = "st-accel-i2c",
.of_match_table = of_match_ptr(st_accel_of_match),
.acpi_match_table = ACPI_PTR(st_accel_acpi_match),
},
.probe = st_accel_i2c_probe,
.remove = st_accel_i2c_remove,
......
drivers/iio/accel/st_accel_spi.c
浏览文件 @ caa59428
......@@ -65,9 +65,18 @@ static const struct spi_device_id st_accel_id_table[] = {
};
MODULE_DEVICE_TABLE(spi, st_accel_id_table);
#ifdef CONFIG_OF
static const struct of_device_id lis302dl_spi_dt_ids[] = {
{ .compatible = "st,lis302dl-spi" },
{}
};
MODULE_DEVICE_TABLE(of, lis302dl_spi_dt_ids);
#endif
static struct spi_driver st_accel_driver = {
.driver = {
.name = "st-accel-spi",
.of_match_table = of_match_ptr(lis302dl_spi_dt_ids),
},
.probe = st_accel_spi_probe,
.remove = st_accel_spi_remove,
......
drivers/iio/adc/Kconfig
浏览文件 @ caa59428
......@@ -247,6 +247,25 @@ config HI8435
This driver can also be built as a module. If so, the module will be
called hi8435.
config HX711
tristate "AVIA HX711 ADC for weight cells"
depends on GPIOLIB
help
If you say yes here you get support for AVIA HX711 ADC which is used
for weigh cells
This driver uses two GPIOs, one acts as the clock and controls the
channel selection and gain, the other one is used for the measurement
data
Currently the raw value is read from the chip and delivered.
To get an actual weight one needs to subtract the
zero offset and multiply by a scale factor.
This should be done in userspace.
This driver can also be built as a module. If so, the module will be
called hx711.
config INA2XX_ADC
tristate "Texas Instruments INA2xx Power Monitors IIO driver"
depends on I2C && !SENSORS_INA2XX
......@@ -307,6 +326,15 @@ config MAX1027
To compile this driver as a module, choose M here: the module will be
called max1027.
config MAX11100
tristate "Maxim max11100 ADC driver"
depends on SPI_MASTER
help
Say yes here to build support for Maxim max11100 SPI ADC
To compile this driver as a module, choose M here: the module will be
called max11100.
config MAX1363
tristate "Maxim max1363 ADC driver"
depends on I2C
......@@ -371,6 +399,18 @@ config MEN_Z188_ADC
This driver can also be built as a module. If so, the module will be
called men_z188_adc.
config MESON_SARADC
tristate "Amlogic Meson SAR ADC driver"
default ARCH_MESON
depends on OF && COMMON_CLK && (ARCH_MESON || COMPILE_TEST)
select REGMAP_MMIO
help
Say yes here to build support for the SAR ADC found in Amlogic Meson
SoCs.
To compile this driver as a module, choose M here: the
module will be called meson_saradc.
config MXS_LRADC
tristate "Freescale i.MX23/i.MX28 LRADC"
depends on (ARCH_MXS || COMPILE_TEST) && HAS_IOMEM
......@@ -430,6 +470,19 @@ config QCOM_SPMI_VADC
To compile this driver as a module, choose M here: the module will
be called qcom-spmi-vadc.
config RCAR_GYRO_ADC
tristate "Renesas R-Car GyroADC driver"
depends on ARCH_RCAR_GEN2 || (ARM && COMPILE_TEST)
help
Say yes here to build support for the GyroADC found in Renesas
R-Car Gen2 SoCs. This block is a simple SPI offload engine for
reading data out of attached compatible ADCs in a round-robin
fashion. Up to 4 or 8 ADC channels are supported by this block,
depending on which ADCs are attached.
To compile this driver as a module, choose M here: the
module will be called rcar-gyroadc.
config ROCKCHIP_SARADC
tristate "Rockchip SARADC driver"
depends on ARCH_ROCKCHIP || (ARM && COMPILE_TEST)
......@@ -444,8 +497,13 @@ config ROCKCHIP_SARADC
config STM32_ADC_CORE
tristate "STMicroelectronics STM32 adc core"
depends on ARCH_STM32 || COMPILE_TEST
depends on HAS_DMA
depends on OF
depends on REGULATOR
select IIO_BUFFER
select MFD_STM32_TIMERS
select IIO_STM32_TIMER_TRIGGER
select IIO_TRIGGERED_BUFFER
help
Select this option to enable the core driver for STMicroelectronics
STM32 analog-to-digital converter (ADC).
......@@ -549,6 +607,19 @@ config TI_ADS1015
This driver can also be built as a module. If so, the module will be
called ti-ads1015.
config TI_ADS7950
tristate "Texas Instruments ADS7950 ADC driver"
depends on SPI
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
help
Say yes here to build support for Texas Instruments ADS7950, ADS7951,
ADS7952, ADS7953, ADS7954, ADS7955, ADS7956, ADS7957, ADS7958, ADS7959.
ADS7960, ADS7961.
To compile this driver as a module, choose M here: the
module will be called ti-ads7950.
config TI_ADS8688
tristate "Texas Instruments ADS8688"
depends on SPI && OF
......@@ -571,6 +642,18 @@ config TI_AM335X_ADC
To compile this driver as a module, choose M here: the module will be
called ti_am335x_adc.
config TI_TLC4541
tristate "Texas Instruments TLC4541 ADC driver"
depends on SPI
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
help
Say yes here to build support for Texas Instruments TLC4541 / TLC3541
ADC chips.
This driver can also be built as a module. If so, the module will be
called ti-tlc4541.
config TWL4030_MADC
tristate "TWL4030 MADC (Monitoring A/D Converter)"
depends on TWL4030_CORE
......
drivers/iio/adc/Makefile
浏览文件 @ caa59428
......@@ -25,22 +25,26 @@ obj-$(CONFIG_ENVELOPE_DETECTOR) += envelope-detector.o
obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o
obj-$(CONFIG_FSL_MX25_ADC) += fsl-imx25-gcq.o
obj-$(CONFIG_HI8435) += hi8435.o
obj-$(CONFIG_HX711) += hx711.o
obj-$(CONFIG_IMX7D_ADC) += imx7d_adc.o
obj-$(CONFIG_INA2XX_ADC) += ina2xx-adc.o
obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o
obj-$(CONFIG_LPC18XX_ADC) += lpc18xx_adc.o
obj-$(CONFIG_LTC2485) += ltc2485.o
obj-$(CONFIG_MAX1027) += max1027.o
obj-$(CONFIG_MAX11100) += max11100.o
obj-$(CONFIG_MAX1363) += max1363.o
obj-$(CONFIG_MCP320X) += mcp320x.o
obj-$(CONFIG_MCP3422) += mcp3422.o
obj-$(CONFIG_MEDIATEK_MT6577_AUXADC) += mt6577_auxadc.o
obj-$(CONFIG_MEN_Z188_ADC) += men_z188_adc.o
obj-$(CONFIG_MESON_SARADC) += meson_saradc.o
obj-$(CONFIG_MXS_LRADC) += mxs-lradc.o
obj-$(CONFIG_NAU7802) += nau7802.o
obj-$(CONFIG_PALMAS_GPADC) += palmas_gpadc.o
obj-$(CONFIG_QCOM_SPMI_IADC) += qcom-spmi-iadc.o
obj-$(CONFIG_QCOM_SPMI_VADC) += qcom-spmi-vadc.o
obj-$(CONFIG_RCAR_GYRO_ADC) += rcar-gyroadc.o
obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o
obj-$(CONFIG_STX104) += stx104.o
obj-$(CONFIG_STM32_ADC_CORE) += stm32-adc-core.o
......@@ -51,8 +55,10 @@ obj-$(CONFIG_TI_ADC12138) += ti-adc12138.o
obj-$(CONFIG_TI_ADC128S052) += ti-adc128s052.o
obj-$(CONFIG_TI_ADC161S626) += ti-adc161s626.o
obj-$(CONFIG_TI_ADS1015) += ti-ads1015.o
obj-$(CONFIG_TI_ADS7950) += ti-ads7950.o
obj-$(CONFIG_TI_ADS8688) += ti-ads8688.o
obj-$(CONFIG_TI_AM335X_ADC) += ti_am335x_adc.o
obj-$(CONFIG_TI_TLC4541) += ti-tlc4541.o
obj-$(CONFIG_TWL4030_MADC) += twl4030-madc.o
obj-$(CONFIG_TWL6030_GPADC) += twl6030-gpadc.o
obj-$(CONFIG_VF610_ADC) += vf610_adc.o
......
drivers/iio/adc/axp288_adc.c
浏览文件 @ caa59428
......@@ -28,8 +28,6 @@
#include <linux/iio/driver.h>
#define AXP288_ADC_EN_MASK 0xF1
#define AXP288_ADC_TS_PIN_GPADC 0xF2
#define AXP288_ADC_TS_PIN_ON 0xF3
enum axp288_adc_id {
AXP288_ADC_TS,
......@@ -123,16 +121,6 @@ static int axp288_adc_read_channel(int *val, unsigned long address,
return IIO_VAL_INT;
}
static int axp288_adc_set_ts(struct regmap *regmap, unsigned int mode,
unsigned long address)
{
/* channels other than GPADC do not need to switch TS pin */
if (address != AXP288_GP_ADC_H)
return 0;
return regmap_write(regmap, AXP288_ADC_TS_PIN_CTRL, mode);
}
static int axp288_adc_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
......@@ -143,16 +131,7 @@ static int axp288_adc_read_raw(struct iio_dev *indio_dev,
mutex_lock(&indio_dev->mlock);
switch (mask) {
case IIO_CHAN_INFO_RAW:
if (axp288_adc_set_ts(info->regmap, AXP288_ADC_TS_PIN_GPADC,
chan->address)) {
dev_err(&indio_dev->dev, "GPADC mode\n");
ret = -EINVAL;
break;
}
ret = axp288_adc_read_channel(val, chan->address, info->regmap);
if (axp288_adc_set_ts(info->regmap, AXP288_ADC_TS_PIN_ON,
chan->address))
dev_err(&indio_dev->dev, "TS pin restore\n");
break;
default:
ret = -EINVAL;
......@@ -162,15 +141,6 @@ static int axp288_adc_read_raw(struct iio_dev *indio_dev,
return ret;
}
static int axp288_adc_set_state(struct regmap *regmap)
{
/* ADC should be always enabled for internal FG to function */
if (regmap_write(regmap, AXP288_ADC_TS_PIN_CTRL, AXP288_ADC_TS_PIN_ON))
return -EIO;
return regmap_write(regmap, AXP20X_ADC_EN1, AXP288_ADC_EN_MASK);
}
static const struct iio_info axp288_adc_iio_info = {
.read_raw = &axp288_adc_read_raw,
.driver_module = THIS_MODULE,
......@@ -199,7 +169,7 @@ static int axp288_adc_probe(struct platform_device *pdev)
* Set ADC to enabled state at all time, including system suspend.
* otherwise internal fuel gauge functionality may be affected.
*/
ret = axp288_adc_set_state(axp20x->regmap);
ret = regmap_write(info->regmap, AXP20X_ADC_EN1, AXP288_ADC_EN_MASK);
if (ret) {
dev_err(&pdev->dev, "unable to enable ADC device\n");
return ret;
......
drivers/iio/adc/exynos_adc.c
浏览文件 @ caa59428
......@@ -632,7 +632,7 @@ static irqreturn_t exynos_ts_isr(int irq, void *dev_id)
input_report_key(info->input, BTN_TOUCH, 1);
input_sync(info->input);
msleep(1);
usleep_range(1000, 1100);
};
writel(0, ADC_V1_CLRINTPNDNUP(info->regs));
......
drivers/iio/adc/fsl-imx25-gcq.c
浏览文件 @ caa59428
......@@ -401,6 +401,7 @@ static const struct of_device_id mx25_gcq_ids[] = {
{ .compatible = "fsl,imx25-gcq", },
{ /* Sentinel */ }
};
MODULE_DEVICE_TABLE(of, mx25_gcq_ids);
static struct platform_driver mx25_gcq_driver = {
.driver = {
......
drivers/iio/adc/hx711.c 0 → 100644
浏览文件 @ caa59428
/*
* HX711: analog to digital converter for weight sensor module
*
* Copyright (c) 2016 Andreas Klinger <ak@it-klinger.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/err.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/property.h>
#include <linux/slab.h>
#include <linux/sched.h>
#include <linux/delay.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/gpio/consumer.h>
#include <linux/regulator/consumer.h>
/* gain to pulse and scale conversion */
#define HX711_GAIN_MAX 3
struct hx711_gain_to_scale {
int gain;
int gain_pulse;
int scale;
int channel;
};
/*
* .scale depends on AVDD which in turn is known as soon as the regulator
* is available
* therefore we set .scale in hx711_probe()
*
* channel A in documentation is channel 0 in source code
* channel B in documentation is channel 1 in source code
*/
static struct hx711_gain_to_scale hx711_gain_to_scale[HX711_GAIN_MAX] = {
{ 128, 1, 0, 0 },
{ 32, 2, 0, 1 },
{ 64, 3, 0, 0 }
};
static int hx711_get_gain_to_pulse(int gain)
{
int i;
for (i = 0; i < HX711_GAIN_MAX; i++)
if (hx711_gain_to_scale[i].gain == gain)
return hx711_gain_to_scale[i].gain_pulse;
return 1;
}
static int hx711_get_gain_to_scale(int gain)
{
int i;
for (i = 0; i < HX711_GAIN_MAX; i++)
if (hx711_gain_to_scale[i].gain == gain)
return hx711_gain_to_scale[i].scale;
return 0;
}
static int hx711_get_scale_to_gain(int scale)
{
int i;
for (i = 0; i < HX711_GAIN_MAX; i++)
if (hx711_gain_to_scale[i].scale == scale)
return hx711_gain_to_scale[i].gain;
return -EINVAL;
}
struct hx711_data {
struct device *dev;
struct gpio_desc *gpiod_pd_sck;
struct gpio_desc *gpiod_dout;
struct regulator *reg_avdd;
int gain_set; /* gain set on device */
int gain_chan_a; /* gain for channel A */
struct mutex lock;
};
static int hx711_cycle(struct hx711_data *hx711_data)
{
int val;
/*
* if preempted for more then 60us while PD_SCK is high:
* hx711 is going in reset
* ==> measuring is false
*/
preempt_disable();
gpiod_set_value(hx711_data->gpiod_pd_sck, 1);
val = gpiod_get_value(hx711_data->gpiod_dout);
/*
* here we are not waiting for 0.2 us as suggested by the datasheet,
* because the oscilloscope showed in a test scenario
* at least 1.15 us for PD_SCK high (T3 in datasheet)
* and 0.56 us for PD_SCK low on TI Sitara with 800 MHz
*/
gpiod_set_value(hx711_data->gpiod_pd_sck, 0);
preempt_enable();
return val;
}
static int hx711_read(struct hx711_data *hx711_data)
{
int i, ret;
int value = 0;
int val = gpiod_get_value(hx711_data->gpiod_dout);
/* we double check if it's really down */
if (val)
return -EIO;
for (i = 0; i < 24; i++) {
value <<= 1;
ret = hx711_cycle(hx711_data);
if (ret)
value++;
}
value ^= 0x800000;
for (i = 0; i < hx711_get_gain_to_pulse(hx711_data->gain_set); i++)
hx711_cycle(hx711_data);
return value;
}
static int hx711_wait_for_ready(struct hx711_data *hx711_data)
{
int i, val;
/*
* a maximum reset cycle time of 56 ms was measured.
* we round it up to 100 ms
*/
for (i = 0; i < 100; i++) {
val = gpiod_get_value(hx711_data->gpiod_dout);
if (!val)
break;
/* sleep at least 1 ms */
msleep(1);
}
if (val)
return -EIO;
return 0;
}
static int hx711_reset(struct hx711_data *hx711_data)
{
int ret;
int val = gpiod_get_value(hx711_data->gpiod_dout);
if (val) {
/*
* an examination with the oszilloscope indicated
* that the first value read after the reset is not stable
* if we reset too short;
* the shorter the reset cycle
* the less reliable the first value after reset is;
* there were no problems encountered with a value
* of 10 ms or higher
*/
gpiod_set_value(hx711_data->gpiod_pd_sck, 1);
msleep(10);
gpiod_set_value(hx711_data->gpiod_pd_sck, 0);
ret = hx711_wait_for_ready(hx711_data);
if (ret)
return ret;
/*
* after a reset the gain is 128 so we do a dummy read
* to set the gain for the next read
*/
ret = hx711_read(hx711_data);
if (ret < 0)
return ret;
/*
* after a dummy read we need to wait vor readiness
* for not mixing gain pulses with the clock
*/
ret = hx711_wait_for_ready(hx711_data);
if (ret)
return ret;
}
return val;
}
static int hx711_set_gain_for_channel(struct hx711_data *hx711_data, int chan)
{
int ret;
if (chan == 0) {
if (hx711_data->gain_set == 32) {
hx711_data->gain_set = hx711_data->gain_chan_a;
ret = hx711_read(hx711_data);
if (ret < 0)
return ret;
ret = hx711_wait_for_ready(hx711_data);
if (ret)
return ret;
}
} else {
if (hx711_data->gain_set != 32) {
hx711_data->gain_set = 32;
ret = hx711_read(hx711_data);
if (ret < 0)
return ret;
ret = hx711_wait_for_ready(hx711_data);
if (ret)
return ret;
}
}
return 0;
}
static int hx711_read_raw(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
int *val, int *val2, long mask)
{
struct hx711_data *hx711_data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
mutex_lock(&hx711_data->lock);
/*
* hx711_reset() must be called from here
* because it could be calling hx711_read() by itself
*/
if (hx711_reset(hx711_data)) {
mutex_unlock(&hx711_data->lock);
dev_err(hx711_data->dev, "reset failed!");
return -EIO;
}
ret = hx711_set_gain_for_channel(hx711_data, chan->channel);
if (ret < 0) {
mutex_unlock(&hx711_data->lock);
return ret;
}
*val = hx711_read(hx711_data);
mutex_unlock(&hx711_data->lock);
if (*val < 0)
return *val;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
mutex_lock(&hx711_data->lock);
*val2 = hx711_get_gain_to_scale(hx711_data->gain_set);
mutex_unlock(&hx711_data->lock);
return IIO_VAL_INT_PLUS_NANO;
default:
return -EINVAL;
}
}
static int hx711_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val,
int val2,
long mask)
{
struct hx711_data *hx711_data = iio_priv(indio_dev);
int ret;
int gain;
switch (mask) {
case IIO_CHAN_INFO_SCALE:
/*
* a scale greater than 1 mV per LSB is not possible
* with the HX711, therefore val must be 0
*/
if (val != 0)
return -EINVAL;
mutex_lock(&hx711_data->lock);
gain = hx711_get_scale_to_gain(val2);
if (gain < 0) {
mutex_unlock(&hx711_data->lock);
return gain;
}
if (gain != hx711_data->gain_set) {
hx711_data->gain_set = gain;
if (gain != 32)
hx711_data->gain_chan_a = gain;
ret = hx711_read(hx711_data);
if (ret < 0) {
mutex_unlock(&hx711_data->lock);
return ret;
}
}
mutex_unlock(&hx711_data->lock);
return 0;
default:
return -EINVAL;
}
return 0;
}
static int hx711_write_raw_get_fmt(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
long mask)
{
return IIO_VAL_INT_PLUS_NANO;
}
static ssize_t hx711_scale_available_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev_attr *iio_attr = to_iio_dev_attr(attr);
int channel = iio_attr->address;
int i, len = 0;
for (i = 0; i < HX711_GAIN_MAX; i++)
if (hx711_gain_to_scale[i].channel == channel)
len += sprintf(buf + len, "0.%09d ",
hx711_gain_to_scale[i].scale);
len += sprintf(buf + len, "\n");
return len;
}
static IIO_DEVICE_ATTR(in_voltage0_scale_available, S_IRUGO,
hx711_scale_available_show, NULL, 0);
static IIO_DEVICE_ATTR(in_voltage1_scale_available, S_IRUGO,
hx711_scale_available_show, NULL, 1);
static struct attribute *hx711_attributes[] = {
&iio_dev_attr_in_voltage0_scale_available.dev_attr.attr,
&iio_dev_attr_in_voltage1_scale_available.dev_attr.attr,
NULL,
};
static struct attribute_group hx711_attribute_group = {
.attrs = hx711_attributes,
};
static const struct iio_info hx711_iio_info = {
.driver_module = THIS_MODULE,
.read_raw = hx711_read_raw,
.write_raw = hx711_write_raw,
.write_raw_get_fmt = hx711_write_raw_get_fmt,
.attrs = &hx711_attribute_group,
};
static const struct iio_chan_spec hx711_chan_spec[] = {
{
.type = IIO_VOLTAGE,
.channel = 0,
.indexed = 1,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
},
{
.type = IIO_VOLTAGE,
.channel = 1,
.indexed = 1,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
},
};
static int hx711_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct hx711_data *hx711_data;
struct iio_dev *indio_dev;
int ret;
int i;
indio_dev = devm_iio_device_alloc(dev, sizeof(struct hx711_data));
if (!indio_dev) {
dev_err(dev, "failed to allocate IIO device\n");
return -ENOMEM;
}
hx711_data = iio_priv(indio_dev);
hx711_data->dev = dev;
mutex_init(&hx711_data->lock);
/*
* PD_SCK stands for power down and serial clock input of HX711
* in the driver it is an output
*/
hx711_data->gpiod_pd_sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
if (IS_ERR(hx711_data->gpiod_pd_sck)) {
dev_err(dev, "failed to get sck-gpiod: err=%ld\n",
PTR_ERR(hx711_data->gpiod_pd_sck));
return PTR_ERR(hx711_data->gpiod_pd_sck);
}
/*
* DOUT stands for serial data output of HX711
* for the driver it is an input
*/
hx711_data->gpiod_dout = devm_gpiod_get(dev, "dout", GPIOD_IN);
if (IS_ERR(hx711_data->gpiod_dout)) {
dev_err(dev, "failed to get dout-gpiod: err=%ld\n",
PTR_ERR(hx711_data->gpiod_dout));
return PTR_ERR(hx711_data->gpiod_dout);
}
hx711_data->reg_avdd = devm_regulator_get(dev, "avdd");
if (IS_ERR(hx711_data->reg_avdd))
return PTR_ERR(hx711_data->reg_avdd);
ret = regulator_enable(hx711_data->reg_avdd);
if (ret < 0)
return ret;
/*
* with
* full scale differential input range: AVDD / GAIN
* full scale output data: 2^24
* we can say:
* AVDD / GAIN = 2^24
* therefore:
* 1 LSB = AVDD / GAIN / 2^24
* AVDD is in uV, but we need 10^-9 mV
* approximately to fit into a 32 bit number:
* 1 LSB = (AVDD * 100) / GAIN / 1678 [10^-9 mV]
*/
ret = regulator_get_voltage(hx711_data->reg_avdd);
if (ret < 0) {
regulator_disable(hx711_data->reg_avdd);
return ret;
}
/* we need 10^-9 mV */
ret *= 100;
for (i = 0; i < HX711_GAIN_MAX; i++)
hx711_gain_to_scale[i].scale =
ret / hx711_gain_to_scale[i].gain / 1678;
hx711_data->gain_set = 128;
hx711_data->gain_chan_a = 128;
platform_set_drvdata(pdev, indio_dev);
indio_dev->name = "hx711";
indio_dev->dev.parent = &pdev->dev;
indio_dev->info = &hx711_iio_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = hx711_chan_spec;
indio_dev->num_channels = ARRAY_SIZE(hx711_chan_spec);
ret = iio_device_register(indio_dev);
if (ret < 0) {
dev_err(dev, "Couldn't register the device\n");
regulator_disable(hx711_data->reg_avdd);
}
return ret;
}
static int hx711_remove(struct platform_device *pdev)
{
struct hx711_data *hx711_data;
struct iio_dev *indio_dev;
indio_dev = platform_get_drvdata(pdev);
hx711_data = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
regulator_disable(hx711_data->reg_avdd);
return 0;
}
static const struct of_device_id of_hx711_match[] = {
{ .compatible = "avia,hx711", },
{},
};
MODULE_DEVICE_TABLE(of, of_hx711_match);
static struct platform_driver hx711_driver = {
.probe = hx711_probe,
.remove = hx711_remove,
.driver = {
.name = "hx711-gpio",
.of_match_table = of_hx711_match,
},
};
module_platform_driver(hx711_driver);
MODULE_AUTHOR("Andreas Klinger <ak@it-klinger.de>");
MODULE_DESCRIPTION("HX711 bitbanging driver - ADC for weight cells");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:hx711-gpio");
drivers/iio/adc/ina2xx-adc.c
浏览文件 @ caa59428
......@@ -22,6 +22,8 @@
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/kfifo_buf.h>
#include <linux/iio/sysfs.h>
#include <linux/kthread.h>
......
drivers/iio/adc/max11100.c 0 → 100644
浏览文件 @ caa59428
/*
* iio/adc/max11100.c
* Maxim max11100 ADC Driver with IIO interface
*
* Copyright (C) 2016-17 Renesas Electronics Corporation
* Copyright (C) 2016-17 Jacopo Mondi
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/regulator/consumer.h>
#include <linux/spi/spi.h>
#include <linux/iio/iio.h>
#include <linux/iio/driver.h>
/*
* LSB is the ADC single digital step
* 1 LSB = (vref_mv / 2 ^ 16)
*
* LSB is used to calculate analog voltage value
* from the number of ADC steps count
*
* Ain = (count * LSB)
*/
#define MAX11100_LSB_DIV (1 << 16)
struct max11100_state {
struct regulator *vref_reg;
struct spi_device *spi;
/*
* DMA (thus cache coherency maintenance) requires the
* transfer buffers to live in their own cache lines.
*/
u8 buffer[3] ____cacheline_aligned;
};
static struct iio_chan_spec max11100_channels[] = {
{ /* [0] */
.type = IIO_VOLTAGE,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
},
};
static int max11100_read_single(struct iio_dev *indio_dev, int *val)
{
int ret;
struct max11100_state *state = iio_priv(indio_dev);
ret = spi_read(state->spi, state->buffer, sizeof(state->buffer));
if (ret) {
dev_err(&indio_dev->dev, "SPI transfer failed\n");
return ret;
}
/* the first 8 bits sent out from ADC must be 0s */
if (state->buffer[0]) {
dev_err(&indio_dev->dev, "Invalid value: buffer[0] != 0\n");
return -EINVAL;
}
*val = (state->buffer[1] << 8) | state->buffer[2];
return 0;
}
static int max11100_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long info)
{
int ret, vref_uv;
struct max11100_state *state = iio_priv(indio_dev);
switch (info) {
case IIO_CHAN_INFO_RAW:
ret = max11100_read_single(indio_dev, val);
if (ret)
return ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
vref_uv = regulator_get_voltage(state->vref_reg);
if (vref_uv < 0)
/* dummy regulator "get_voltage" returns -EINVAL */
return -EINVAL;
*val = vref_uv / 1000;
*val2 = MAX11100_LSB_DIV;
return IIO_VAL_FRACTIONAL;
}
return -EINVAL;
}
static const struct iio_info max11100_info = {
.driver_module = THIS_MODULE,
.read_raw = max11100_read_raw,
};
static int max11100_probe(struct spi_device *spi)
{
int ret;
struct iio_dev *indio_dev;
struct max11100_state *state;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*state));
if (!indio_dev)
return -ENOMEM;
spi_set_drvdata(spi, indio_dev);
state = iio_priv(indio_dev);
state->spi = spi;
indio_dev->dev.parent = &spi->dev;
indio_dev->dev.of_node = spi->dev.of_node;
indio_dev->name = "max11100";
indio_dev->info = &max11100_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = max11100_channels,
indio_dev->num_channels = ARRAY_SIZE(max11100_channels),
state->vref_reg = devm_regulator_get(&spi->dev, "vref");
if (IS_ERR(state->vref_reg))
return PTR_ERR(state->vref_reg);
ret = regulator_enable(state->vref_reg);
if (ret)
return ret;
ret = iio_device_register(indio_dev);
if (ret)
goto disable_regulator;
return 0;
disable_regulator:
regulator_disable(state->vref_reg);
return ret;
}
static int max11100_remove(struct spi_device *spi)
{
struct iio_dev *indio_dev = spi_get_drvdata(spi);
struct max11100_state *state = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
regulator_disable(state->vref_reg);
return 0;
}
static const struct of_device_id max11100_ids[] = {
{.compatible = "maxim,max11100"},
{ },
};
MODULE_DEVICE_TABLE(of, max11100_ids);
static struct spi_driver max11100_driver = {
.driver = {
.name = "max11100",
.owner = THIS_MODULE,
.of_match_table = of_match_ptr(max11100_ids),
},
.probe = max11100_probe,
.remove = max11100_remove,
};
module_spi_driver(max11100_driver);
MODULE_AUTHOR("Jacopo Mondi <jacopo@jmondi.org>");
MODULE_DESCRIPTION("Maxim max11100 ADC Driver");
MODULE_LICENSE("GPL v2");
drivers/iio/adc/max1363.c
浏览文件 @ caa59428
......@@ -1567,6 +1567,7 @@ static const struct of_device_id max1363_of_match[] = {
MAX1363_COMPATIBLE("maxim,max11647", max11647),
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, max1363_of_match);
#endif
static int max1363_probe(struct i2c_client *client,
......
drivers/iio/adc/meson_saradc.c 0 → 100644
浏览文件 @ caa59428
此差异已折叠。
drivers/iio/adc/qcom-spmi-vadc.c
浏览文件 @ caa59428
/*
* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
......@@ -84,7 +84,7 @@
#define VADC_MAX_ADC_CODE 0xa800
#define VADC_ABSOLUTE_RANGE_UV 625000
#define VADC_RATIOMETRIC_RANGE_UV 1800000
#define VADC_RATIOMETRIC_RANGE 1800
#define VADC_DEF_PRESCALING 0 /* 1:1 */
#define VADC_DEF_DECIMATION 0 /* 512 */
......@@ -100,9 +100,23 @@
#define KELVINMIL_CELSIUSMIL 273150
#define PMI_CHG_SCALE_1 -138890
#define PMI_CHG_SCALE_2 391750000000LL
#define VADC_CHAN_MIN VADC_USBIN
#define VADC_CHAN_MAX VADC_LR_MUX3_BUF_PU1_PU2_XO_THERM
/**
* struct vadc_map_pt - Map the graph representation for ADC channel
* @x: Represent the ADC digitized code.
* @y: Represent the physical data which can be temperature, voltage,
* resistance.
*/
struct vadc_map_pt {
s32 x;
s32 y;
};
/*
* VADC_CALIB_ABSOLUTE: uses the 625mV and 1.25V as reference channels.
* VADC_CALIB_RATIOMETRIC: uses the reference voltage (1.8V) and GND for
......@@ -148,6 +162,9 @@ struct vadc_prescale_ratio {
* start of conversion.
* @avg_samples: ability to provide single result from the ADC
* that is an average of multiple measurements.
* @scale_fn: Represents the scaling function to convert voltage
* physical units desired by the client for the channel.
* Referenced from enum vadc_scale_fn_type.
*/
struct vadc_channel_prop {
unsigned int channel;
......@@ -156,6 +173,7 @@ struct vadc_channel_prop {
unsigned int prescale;
unsigned int hw_settle_time;
unsigned int avg_samples;
unsigned int scale_fn;
};
/**
......@@ -186,6 +204,35 @@ struct vadc_priv {
struct mutex lock;
};
/**
* struct vadc_scale_fn - Scaling function prototype
* @scale: Function pointer to one of the scaling functions
* which takes the adc properties, channel properties,
* and returns the physical result.
*/
struct vadc_scale_fn {
int (*scale)(struct vadc_priv *, const struct vadc_channel_prop *,
u16, int *);
};
/**
* enum vadc_scale_fn_type - Scaling function to convert ADC code to
* physical scaled units for the channel.
* SCALE_DEFAULT: Default scaling to convert raw adc code to voltage (uV).
* SCALE_THERM_100K_PULLUP: Returns temperature in millidegC.
* Uses a mapping table with 100K pullup.
* SCALE_PMIC_THERM: Returns result in milli degree's Centigrade.
* SCALE_XOTHERM: Returns XO thermistor voltage in millidegC.
* SCALE_PMI_CHG_TEMP: Conversion for PMI CHG temp
*/
enum vadc_scale_fn_type {
SCALE_DEFAULT = 0,
SCALE_THERM_100K_PULLUP,
SCALE_PMIC_THERM,
SCALE_XOTHERM,
SCALE_PMI_CHG_TEMP,
};
static const struct vadc_prescale_ratio vadc_prescale_ratios[] = {
{.num = 1, .den = 1},
{.num = 1, .den = 3},
......@@ -197,6 +244,44 @@ static const struct vadc_prescale_ratio vadc_prescale_ratios[] = {
{.num = 1, .den = 10}
};
/* Voltage to temperature */
static const struct vadc_map_pt adcmap_100k_104ef_104fb[] = {
{1758, -40},
{1742, -35},
{1719, -30},
{1691, -25},
{1654, -20},
{1608, -15},
{1551, -10},
{1483, -5},
{1404, 0},
{1315, 5},
{1218, 10},
{1114, 15},
{1007, 20},
{900, 25},
{795, 30},
{696, 35},
{605, 40},
{522, 45},
{448, 50},
{383, 55},
{327, 60},
{278, 65},
{237, 70},
{202, 75},
{172, 80},
{146, 85},
{125, 90},
{107, 95},
{92, 100},
{79, 105},
{68, 110},
{59, 115},
{51, 120},
{44, 125}
};
static int vadc_read(struct vadc_priv *vadc, u16 offset, u8 *data)
{
return regmap_bulk_read(vadc->regmap, vadc->base + offset, data, 1);
......@@ -418,7 +503,7 @@ static int vadc_measure_ref_points(struct vadc_priv *vadc)
u16 read_1, read_2;
int ret;
vadc->graph[VADC_CALIB_RATIOMETRIC].dx = VADC_RATIOMETRIC_RANGE_UV;
vadc->graph[VADC_CALIB_RATIOMETRIC].dx = VADC_RATIOMETRIC_RANGE;
vadc->graph[VADC_CALIB_ABSOLUTE].dx = VADC_ABSOLUTE_RANGE_UV;
prop = vadc_get_channel(vadc, VADC_REF_1250MV);
......@@ -468,27 +553,148 @@ static int vadc_measure_ref_points(struct vadc_priv *vadc)
return ret;
}
static s32 vadc_calibrate(struct vadc_priv *vadc,
const struct vadc_channel_prop *prop, u16 adc_code)
static int vadc_map_voltage_temp(const struct vadc_map_pt *pts,
u32 tablesize, s32 input, s64 *output)
{
bool descending = 1;
u32 i = 0;
if (!pts)
return -EINVAL;
/* Check if table is descending or ascending */
if (tablesize > 1) {
if (pts[0].x < pts[1].x)
descending = 0;
}
while (i < tablesize) {
if ((descending) && (pts[i].x < input)) {
/* table entry is less than measured*/
/* value and table is descending, stop */
break;
} else if ((!descending) &&
(pts[i].x > input)) {
/* table entry is greater than measured*/
/*value and table is ascending, stop */
break;
}
i++;
}
if (i == 0) {
*output = pts[0].y;
} else if (i == tablesize) {
*output = pts[tablesize - 1].y;
} else {
/* result is between search_index and search_index-1 */
/* interpolate linearly */
*output = (((s32)((pts[i].y - pts[i - 1].y) *
(input - pts[i - 1].x)) /
(pts[i].x - pts[i - 1].x)) +
pts[i - 1].y);
}
return 0;
}
static void vadc_scale_calib(struct vadc_priv *vadc, u16 adc_code,
const struct vadc_channel_prop *prop,
s64 *scale_voltage)
{
*scale_voltage = (adc_code -
vadc->graph[prop->calibration].gnd);
*scale_voltage *= vadc->graph[prop->calibration].dx;
*scale_voltage = div64_s64(*scale_voltage,
vadc->graph[prop->calibration].dy);
if (prop->calibration == VADC_CALIB_ABSOLUTE)
*scale_voltage +=
vadc->graph[prop->calibration].dx;
if (*scale_voltage < 0)
*scale_voltage = 0;
}
static int vadc_scale_volt(struct vadc_priv *vadc,
const struct vadc_channel_prop *prop, u16 adc_code,
int *result_uv)
{
const struct vadc_prescale_ratio *prescale;
s64 voltage;
s64 voltage = 0, result = 0;
voltage = adc_code - vadc->graph[prop->calibration].gnd;
voltage *= vadc->graph[prop->calibration].dx;
voltage = div64_s64(voltage, vadc->graph[prop->calibration].dy);
vadc_scale_calib(vadc, adc_code, prop, &voltage);
prescale = &vadc_prescale_ratios[prop->prescale];
voltage = voltage * prescale->den;
result = div64_s64(voltage, prescale->num);
*result_uv = result;
return 0;
}
static int vadc_scale_therm(struct vadc_priv *vadc,
const struct vadc_channel_prop *prop, u16 adc_code,
int *result_mdec)
{
s64 voltage = 0, result = 0;
vadc_scale_calib(vadc, adc_code, prop, &voltage);
if (prop->calibration == VADC_CALIB_ABSOLUTE)
voltage += vadc->graph[prop->calibration].dx;
voltage = div64_s64(voltage, 1000);
vadc_map_voltage_temp(adcmap_100k_104ef_104fb,
ARRAY_SIZE(adcmap_100k_104ef_104fb),
voltage, &result);
result *= 1000;
*result_mdec = result;
if (voltage < 0)
return 0;
}
static int vadc_scale_die_temp(struct vadc_priv *vadc,
const struct vadc_channel_prop *prop,
u16 adc_code, int *result_mdec)
{
const struct vadc_prescale_ratio *prescale;
s64 voltage = 0;
u64 temp; /* Temporary variable for do_div */
vadc_scale_calib(vadc, adc_code, prop, &voltage);
if (voltage > 0) {
prescale = &vadc_prescale_ratios[prop->prescale];
temp = voltage * prescale->den;
do_div(temp, prescale->num * 2);
voltage = temp;
} else {
voltage = 0;
}
prescale = &vadc_prescale_ratios[prop->prescale];
voltage -= KELVINMIL_CELSIUSMIL;
*result_mdec = voltage;
return 0;
}
static int vadc_scale_chg_temp(struct vadc_priv *vadc,
const struct vadc_channel_prop *prop,
u16 adc_code, int *result_mdec)
{
const struct vadc_prescale_ratio *prescale;
s64 voltage = 0, result = 0;
vadc_scale_calib(vadc, adc_code, prop, &voltage);
prescale = &vadc_prescale_ratios[prop->prescale];
voltage = voltage * prescale->den;
voltage = div64_s64(voltage, prescale->num);
voltage = ((PMI_CHG_SCALE_1) * (voltage * 2));
voltage = (voltage + PMI_CHG_SCALE_2);
result = div64_s64(voltage, 1000000);
*result_mdec = result;
return div64_s64(voltage, prescale->num);
return 0;
}
static int vadc_decimation_from_dt(u32 value)
......@@ -536,6 +742,14 @@ static int vadc_avg_samples_from_dt(u32 value)
return __ffs64(value);
}
static struct vadc_scale_fn scale_fn[] = {
[SCALE_DEFAULT] = {vadc_scale_volt},
[SCALE_THERM_100K_PULLUP] = {vadc_scale_therm},
[SCALE_PMIC_THERM] = {vadc_scale_die_temp},
[SCALE_XOTHERM] = {vadc_scale_therm},
[SCALE_PMI_CHG_TEMP] = {vadc_scale_chg_temp},
};
static int vadc_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val, int *val2,
long mask)
......@@ -552,11 +766,8 @@ static int vadc_read_raw(struct iio_dev *indio_dev,
if (ret)
break;
*val = vadc_calibrate(vadc, prop, adc_code);
scale_fn[prop->scale_fn].scale(vadc, prop, adc_code, val);
/* 2mV/K, return milli Celsius */
*val /= 2;
*val -= KELVINMIL_CELSIUSMIL;
return IIO_VAL_INT;
case IIO_CHAN_INFO_RAW:
prop = &vadc->chan_props[chan->address];
......@@ -564,12 +775,8 @@ static int vadc_read_raw(struct iio_dev *indio_dev,
if (ret)
break;
*val = vadc_calibrate(vadc, prop, adc_code);
*val = (int)adc_code;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = 1000;
return IIO_VAL_INT_PLUS_MICRO;
default:
ret = -EINVAL;
break;
......@@ -602,22 +809,39 @@ struct vadc_channels {
unsigned int prescale_index;
enum iio_chan_type type;
long info_mask;
unsigned int scale_fn;
};
#define VADC_CHAN(_dname, _type, _mask, _pre) \
#define VADC_CHAN(_dname, _type, _mask, _pre, _scale) \
[VADC_##_dname] = { \
.datasheet_name = __stringify(_dname), \
.prescale_index = _pre, \
.type = _type, \
.info_mask = _mask \
.info_mask = _mask, \
.scale_fn = _scale \
}, \
#define VADC_CHAN_TEMP(_dname, _pre) \
VADC_CHAN(_dname, IIO_TEMP, BIT(IIO_CHAN_INFO_PROCESSED), _pre) \
#define VADC_NO_CHAN(_dname, _type, _mask, _pre) \
[VADC_##_dname] = { \
.datasheet_name = __stringify(_dname), \
.prescale_index = _pre, \
.type = _type, \
.info_mask = _mask \
},
#define VADC_CHAN_VOLT(_dname, _pre) \
#define VADC_CHAN_TEMP(_dname, _pre, _scale) \
VADC_CHAN(_dname, IIO_TEMP, \
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_PROCESSED), \
_pre, _scale) \
#define VADC_CHAN_VOLT(_dname, _pre, _scale) \
VADC_CHAN(_dname, IIO_VOLTAGE, \
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), \
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_PROCESSED),\
_pre, _scale) \
#define VADC_CHAN_NO_SCALE(_dname, _pre) \
VADC_NO_CHAN(_dname, IIO_VOLTAGE, \
BIT(IIO_CHAN_INFO_RAW), \
_pre) \
/*
......@@ -626,106 +850,106 @@ struct vadc_channels {
* gaps in the array should be treated as reserved channels.
*/
static const struct vadc_channels vadc_chans[] = {
VADC_CHAN_VOLT(USBIN, 4)
VADC_CHAN_VOLT(DCIN, 4)
VADC_CHAN_VOLT(VCHG_SNS, 3)
VADC_CHAN_VOLT(SPARE1_03, 1)
VADC_CHAN_VOLT(USB_ID_MV, 1)
VADC_CHAN_VOLT(VCOIN, 1)
VADC_CHAN_VOLT(VBAT_SNS, 1)
VADC_CHAN_VOLT(VSYS, 1)
VADC_CHAN_TEMP(DIE_TEMP, 0)
VADC_CHAN_VOLT(REF_625MV, 0)
VADC_CHAN_VOLT(REF_1250MV, 0)
VADC_CHAN_VOLT(CHG_TEMP, 0)
VADC_CHAN_VOLT(SPARE1, 0)
VADC_CHAN_VOLT(SPARE2, 0)
VADC_CHAN_VOLT(GND_REF, 0)
VADC_CHAN_VOLT(VDD_VADC, 0)
VADC_CHAN_VOLT(P_MUX1_1_1, 0)
VADC_CHAN_VOLT(P_MUX2_1_1, 0)
VADC_CHAN_VOLT(P_MUX3_1_1, 0)
VADC_CHAN_VOLT(P_MUX4_1_1, 0)
VADC_CHAN_VOLT(P_MUX5_1_1, 0)
VADC_CHAN_VOLT(P_MUX6_1_1, 0)
VADC_CHAN_VOLT(P_MUX7_1_1, 0)
VADC_CHAN_VOLT(P_MUX8_1_1, 0)
VADC_CHAN_VOLT(P_MUX9_1_1, 0)
VADC_CHAN_VOLT(P_MUX10_1_1, 0)
VADC_CHAN_VOLT(P_MUX11_1_1, 0)
VADC_CHAN_VOLT(P_MUX12_1_1, 0)
VADC_CHAN_VOLT(P_MUX13_1_1, 0)
VADC_CHAN_VOLT(P_MUX14_1_1, 0)
VADC_CHAN_VOLT(P_MUX15_1_1, 0)
VADC_CHAN_VOLT(P_MUX16_1_1, 0)
VADC_CHAN_VOLT(P_MUX1_1_3, 1)
VADC_CHAN_VOLT(P_MUX2_1_3, 1)
VADC_CHAN_VOLT(P_MUX3_1_3, 1)
VADC_CHAN_VOLT(P_MUX4_1_3, 1)
VADC_CHAN_VOLT(P_MUX5_1_3, 1)
VADC_CHAN_VOLT(P_MUX6_1_3, 1)
VADC_CHAN_VOLT(P_MUX7_1_3, 1)
VADC_CHAN_VOLT(P_MUX8_1_3, 1)
VADC_CHAN_VOLT(P_MUX9_1_3, 1)
VADC_CHAN_VOLT(P_MUX10_1_3, 1)
VADC_CHAN_VOLT(P_MUX11_1_3, 1)
VADC_CHAN_VOLT(P_MUX12_1_3, 1)
VADC_CHAN_VOLT(P_MUX13_1_3, 1)
VADC_CHAN_VOLT(P_MUX14_1_3, 1)
VADC_CHAN_VOLT(P_MUX15_1_3, 1)
VADC_CHAN_VOLT(P_MUX16_1_3, 1)
VADC_CHAN_VOLT(LR_MUX1_BAT_THERM, 0)
VADC_CHAN_VOLT(LR_MUX2_BAT_ID, 0)
VADC_CHAN_VOLT(LR_MUX3_XO_THERM, 0)
VADC_CHAN_VOLT(LR_MUX4_AMUX_THM1, 0)
VADC_CHAN_VOLT(LR_MUX5_AMUX_THM2, 0)
VADC_CHAN_VOLT(LR_MUX6_AMUX_THM3, 0)
VADC_CHAN_VOLT(LR_MUX7_HW_ID, 0)
VADC_CHAN_VOLT(LR_MUX8_AMUX_THM4, 0)
VADC_CHAN_VOLT(LR_MUX9_AMUX_THM5, 0)
VADC_CHAN_VOLT(LR_MUX10_USB_ID, 0)
VADC_CHAN_VOLT(AMUX_PU1, 0)
VADC_CHAN_VOLT(AMUX_PU2, 0)
VADC_CHAN_VOLT(LR_MUX3_BUF_XO_THERM, 0)
VADC_CHAN_VOLT(LR_MUX1_PU1_BAT_THERM, 0)
VADC_CHAN_VOLT(LR_MUX2_PU1_BAT_ID, 0)
VADC_CHAN_VOLT(LR_MUX3_PU1_XO_THERM, 0)
VADC_CHAN_VOLT(LR_MUX4_PU1_AMUX_THM1, 0)
VADC_CHAN_VOLT(LR_MUX5_PU1_AMUX_THM2, 0)
VADC_CHAN_VOLT(LR_MUX6_PU1_AMUX_THM3, 0)
VADC_CHAN_VOLT(LR_MUX7_PU1_AMUX_HW_ID, 0)
VADC_CHAN_VOLT(LR_MUX8_PU1_AMUX_THM4, 0)
VADC_CHAN_VOLT(LR_MUX9_PU1_AMUX_THM5, 0)
VADC_CHAN_VOLT(LR_MUX10_PU1_AMUX_USB_ID, 0)
VADC_CHAN_VOLT(LR_MUX3_BUF_PU1_XO_THERM, 0)
VADC_CHAN_VOLT(LR_MUX1_PU2_BAT_THERM, 0)
VADC_CHAN_VOLT(LR_MUX2_PU2_BAT_ID, 0)
VADC_CHAN_VOLT(LR_MUX3_PU2_XO_THERM, 0)
VADC_CHAN_VOLT(LR_MUX4_PU2_AMUX_THM1, 0)
VADC_CHAN_VOLT(LR_MUX5_PU2_AMUX_THM2, 0)
VADC_CHAN_VOLT(LR_MUX6_PU2_AMUX_THM3, 0)
VADC_CHAN_VOLT(LR_MUX7_PU2_AMUX_HW_ID, 0)
VADC_CHAN_VOLT(LR_MUX8_PU2_AMUX_THM4, 0)
VADC_CHAN_VOLT(LR_MUX9_PU2_AMUX_THM5, 0)
VADC_CHAN_VOLT(LR_MUX10_PU2_AMUX_USB_ID, 0)
VADC_CHAN_VOLT(LR_MUX3_BUF_PU2_XO_THERM, 0)
VADC_CHAN_VOLT(LR_MUX1_PU1_PU2_BAT_THERM, 0)
VADC_CHAN_VOLT(LR_MUX2_PU1_PU2_BAT_ID, 0)
VADC_CHAN_VOLT(LR_MUX3_PU1_PU2_XO_THERM, 0)
VADC_CHAN_VOLT(LR_MUX4_PU1_PU2_AMUX_THM1, 0)
VADC_CHAN_VOLT(LR_MUX5_PU1_PU2_AMUX_THM2, 0)
VADC_CHAN_VOLT(LR_MUX6_PU1_PU2_AMUX_THM3, 0)
VADC_CHAN_VOLT(LR_MUX7_PU1_PU2_AMUX_HW_ID, 0)
VADC_CHAN_VOLT(LR_MUX8_PU1_PU2_AMUX_THM4, 0)
VADC_CHAN_VOLT(LR_MUX9_PU1_PU2_AMUX_THM5, 0)
VADC_CHAN_VOLT(LR_MUX10_PU1_PU2_AMUX_USB_ID, 0)
VADC_CHAN_VOLT(LR_MUX3_BUF_PU1_PU2_XO_THERM, 0)
VADC_CHAN_VOLT(USBIN, 4, SCALE_DEFAULT)
VADC_CHAN_VOLT(DCIN, 4, SCALE_DEFAULT)
VADC_CHAN_NO_SCALE(VCHG_SNS, 3)
VADC_CHAN_NO_SCALE(SPARE1_03, 1)
VADC_CHAN_NO_SCALE(USB_ID_MV, 1)
VADC_CHAN_VOLT(VCOIN, 1, SCALE_DEFAULT)
VADC_CHAN_NO_SCALE(VBAT_SNS, 1)
VADC_CHAN_VOLT(VSYS, 1, SCALE_DEFAULT)
VADC_CHAN_TEMP(DIE_TEMP, 0, SCALE_PMIC_THERM)
VADC_CHAN_VOLT(REF_625MV, 0, SCALE_DEFAULT)
VADC_CHAN_VOLT(REF_1250MV, 0, SCALE_DEFAULT)
VADC_CHAN_NO_SCALE(CHG_TEMP, 0)
VADC_CHAN_NO_SCALE(SPARE1, 0)
VADC_CHAN_TEMP(SPARE2, 0, SCALE_PMI_CHG_TEMP)
VADC_CHAN_VOLT(GND_REF, 0, SCALE_DEFAULT)
VADC_CHAN_VOLT(VDD_VADC, 0, SCALE_DEFAULT)
VADC_CHAN_NO_SCALE(P_MUX1_1_1, 0)
VADC_CHAN_NO_SCALE(P_MUX2_1_1, 0)
VADC_CHAN_NO_SCALE(P_MUX3_1_1, 0)
VADC_CHAN_NO_SCALE(P_MUX4_1_1, 0)
VADC_CHAN_NO_SCALE(P_MUX5_1_1, 0)
VADC_CHAN_NO_SCALE(P_MUX6_1_1, 0)
VADC_CHAN_NO_SCALE(P_MUX7_1_1, 0)
VADC_CHAN_NO_SCALE(P_MUX8_1_1, 0)
VADC_CHAN_NO_SCALE(P_MUX9_1_1, 0)
VADC_CHAN_NO_SCALE(P_MUX10_1_1, 0)
VADC_CHAN_NO_SCALE(P_MUX11_1_1, 0)
VADC_CHAN_NO_SCALE(P_MUX12_1_1, 0)
VADC_CHAN_NO_SCALE(P_MUX13_1_1, 0)
VADC_CHAN_NO_SCALE(P_MUX14_1_1, 0)
VADC_CHAN_NO_SCALE(P_MUX15_1_1, 0)
VADC_CHAN_NO_SCALE(P_MUX16_1_1, 0)
VADC_CHAN_NO_SCALE(P_MUX1_1_3, 1)
VADC_CHAN_NO_SCALE(P_MUX2_1_3, 1)
VADC_CHAN_NO_SCALE(P_MUX3_1_3, 1)
VADC_CHAN_NO_SCALE(P_MUX4_1_3, 1)
VADC_CHAN_NO_SCALE(P_MUX5_1_3, 1)
VADC_CHAN_NO_SCALE(P_MUX6_1_3, 1)
VADC_CHAN_NO_SCALE(P_MUX7_1_3, 1)
VADC_CHAN_NO_SCALE(P_MUX8_1_3, 1)
VADC_CHAN_NO_SCALE(P_MUX9_1_3, 1)
VADC_CHAN_NO_SCALE(P_MUX10_1_3, 1)
VADC_CHAN_NO_SCALE(P_MUX11_1_3, 1)
VADC_CHAN_NO_SCALE(P_MUX12_1_3, 1)
VADC_CHAN_NO_SCALE(P_MUX13_1_3, 1)
VADC_CHAN_NO_SCALE(P_MUX14_1_3, 1)
VADC_CHAN_NO_SCALE(P_MUX15_1_3, 1)
VADC_CHAN_NO_SCALE(P_MUX16_1_3, 1)
VADC_CHAN_NO_SCALE(LR_MUX1_BAT_THERM, 0)
VADC_CHAN_NO_SCALE(LR_MUX2_BAT_ID, 0)
VADC_CHAN_NO_SCALE(LR_MUX3_XO_THERM, 0)
VADC_CHAN_NO_SCALE(LR_MUX4_AMUX_THM1, 0)
VADC_CHAN_NO_SCALE(LR_MUX5_AMUX_THM2, 0)
VADC_CHAN_NO_SCALE(LR_MUX6_AMUX_THM3, 0)
VADC_CHAN_NO_SCALE(LR_MUX7_HW_ID, 0)
VADC_CHAN_NO_SCALE(LR_MUX8_AMUX_THM4, 0)
VADC_CHAN_NO_SCALE(LR_MUX9_AMUX_THM5, 0)
VADC_CHAN_NO_SCALE(LR_MUX10_USB_ID, 0)
VADC_CHAN_NO_SCALE(AMUX_PU1, 0)
VADC_CHAN_NO_SCALE(AMUX_PU2, 0)
VADC_CHAN_NO_SCALE(LR_MUX3_BUF_XO_THERM, 0)
VADC_CHAN_NO_SCALE(LR_MUX1_PU1_BAT_THERM, 0)
VADC_CHAN_NO_SCALE(LR_MUX2_PU1_BAT_ID, 0)
VADC_CHAN_NO_SCALE(LR_MUX3_PU1_XO_THERM, 0)
VADC_CHAN_TEMP(LR_MUX4_PU1_AMUX_THM1, 0, SCALE_THERM_100K_PULLUP)
VADC_CHAN_TEMP(LR_MUX5_PU1_AMUX_THM2, 0, SCALE_THERM_100K_PULLUP)
VADC_CHAN_TEMP(LR_MUX6_PU1_AMUX_THM3, 0, SCALE_THERM_100K_PULLUP)
VADC_CHAN_NO_SCALE(LR_MUX7_PU1_AMUX_HW_ID, 0)
VADC_CHAN_TEMP(LR_MUX8_PU1_AMUX_THM4, 0, SCALE_THERM_100K_PULLUP)
VADC_CHAN_TEMP(LR_MUX9_PU1_AMUX_THM5, 0, SCALE_THERM_100K_PULLUP)
VADC_CHAN_NO_SCALE(LR_MUX10_PU1_AMUX_USB_ID, 0)
VADC_CHAN_TEMP(LR_MUX3_BUF_PU1_XO_THERM, 0, SCALE_XOTHERM)
VADC_CHAN_NO_SCALE(LR_MUX1_PU2_BAT_THERM, 0)
VADC_CHAN_NO_SCALE(LR_MUX2_PU2_BAT_ID, 0)
VADC_CHAN_NO_SCALE(LR_MUX3_PU2_XO_THERM, 0)
VADC_CHAN_NO_SCALE(LR_MUX4_PU2_AMUX_THM1, 0)
VADC_CHAN_NO_SCALE(LR_MUX5_PU2_AMUX_THM2, 0)
VADC_CHAN_NO_SCALE(LR_MUX6_PU2_AMUX_THM3, 0)
VADC_CHAN_NO_SCALE(LR_MUX7_PU2_AMUX_HW_ID, 0)
VADC_CHAN_NO_SCALE(LR_MUX8_PU2_AMUX_THM4, 0)
VADC_CHAN_NO_SCALE(LR_MUX9_PU2_AMUX_THM5, 0)
VADC_CHAN_NO_SCALE(LR_MUX10_PU2_AMUX_USB_ID, 0)
VADC_CHAN_NO_SCALE(LR_MUX3_BUF_PU2_XO_THERM, 0)
VADC_CHAN_NO_SCALE(LR_MUX1_PU1_PU2_BAT_THERM, 0)
VADC_CHAN_NO_SCALE(LR_MUX2_PU1_PU2_BAT_ID, 0)
VADC_CHAN_NO_SCALE(LR_MUX3_PU1_PU2_XO_THERM, 0)
VADC_CHAN_NO_SCALE(LR_MUX4_PU1_PU2_AMUX_THM1, 0)
VADC_CHAN_NO_SCALE(LR_MUX5_PU1_PU2_AMUX_THM2, 0)
VADC_CHAN_NO_SCALE(LR_MUX6_PU1_PU2_AMUX_THM3, 0)
VADC_CHAN_NO_SCALE(LR_MUX7_PU1_PU2_AMUX_HW_ID, 0)
VADC_CHAN_NO_SCALE(LR_MUX8_PU1_PU2_AMUX_THM4, 0)
VADC_CHAN_NO_SCALE(LR_MUX9_PU1_PU2_AMUX_THM5, 0)
VADC_CHAN_NO_SCALE(LR_MUX10_PU1_PU2_AMUX_USB_ID, 0)
VADC_CHAN_NO_SCALE(LR_MUX3_BUF_PU1_PU2_XO_THERM, 0)
};
static int vadc_get_dt_channel_data(struct device *dev,
......@@ -844,6 +1068,7 @@ static int vadc_get_dt_data(struct vadc_priv *vadc, struct device_node *node)
return ret;
}
prop.scale_fn = vadc_chans[prop.channel].scale_fn;
vadc->chan_props[index] = prop;
vadc_chan = &vadc_chans[prop.channel];
......
drivers/iio/adc/rcar-gyroadc.c 0 → 100644
浏览文件 @ caa59428
/*
* Renesas R-Car GyroADC driver
*
* Copyright 2016 Marek Vasut <marek.vasut@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/of.h>
#include <linux/of_irq.h>
#include <linux/regulator/consumer.h>
#include <linux/of_platform.h>
#include <linux/err.h>
#include <linux/pm_runtime.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#define DRIVER_NAME "rcar-gyroadc"
/* GyroADC registers. */
#define RCAR_GYROADC_MODE_SELECT 0x00
#define RCAR_GYROADC_MODE_SELECT_1_MB88101A 0x0
#define RCAR_GYROADC_MODE_SELECT_2_ADCS7476 0x1
#define RCAR_GYROADC_MODE_SELECT_3_MAX1162 0x3
#define RCAR_GYROADC_START_STOP 0x04
#define RCAR_GYROADC_START_STOP_START BIT(0)
#define RCAR_GYROADC_CLOCK_LENGTH 0x08
#define RCAR_GYROADC_1_25MS_LENGTH 0x0c
#define RCAR_GYROADC_REALTIME_DATA(ch) (0x10 + ((ch) * 4))
#define RCAR_GYROADC_100MS_ADDED_DATA(ch) (0x30 + ((ch) * 4))
#define RCAR_GYROADC_10MS_AVG_DATA(ch) (0x50 + ((ch) * 4))
#define RCAR_GYROADC_FIFO_STATUS 0x70
#define RCAR_GYROADC_FIFO_STATUS_EMPTY(ch) BIT(0 + (4 * (ch)))
#define RCAR_GYROADC_FIFO_STATUS_FULL(ch) BIT(1 + (4 * (ch)))
#define RCAR_GYROADC_FIFO_STATUS_ERROR(ch) BIT(2 + (4 * (ch)))
#define RCAR_GYROADC_INTR 0x74
#define RCAR_GYROADC_INTR_INT BIT(0)
#define RCAR_GYROADC_INTENR 0x78
#define RCAR_GYROADC_INTENR_INTEN BIT(0)
#define RCAR_GYROADC_SAMPLE_RATE 800 /* Hz */
#define RCAR_GYROADC_RUNTIME_PM_DELAY_MS 2000
enum rcar_gyroadc_model {
RCAR_GYROADC_MODEL_DEFAULT,
RCAR_GYROADC_MODEL_R8A7792,
};
struct rcar_gyroadc {
struct device *dev;
void __iomem *regs;
struct clk *iclk;
struct regulator *vref[8];
unsigned int num_channels;
enum rcar_gyroadc_model model;
unsigned int mode;
unsigned int sample_width;
};
static void rcar_gyroadc_hw_init(struct rcar_gyroadc *priv)
{
const unsigned long clk_mhz = clk_get_rate(priv->iclk) / 1000000;
const unsigned long clk_mul =
(priv->mode == RCAR_GYROADC_MODE_SELECT_1_MB88101A) ? 10 : 5;
unsigned long clk_len = clk_mhz * clk_mul;
/*
* According to the R-Car Gen2 datasheet Rev. 1.01, Sept 08 2014,
* page 77-7, clock length must be even number. If it's odd number,
* add one.
*/
if (clk_len & 1)
clk_len++;
/* Stop the GyroADC. */
writel(0, priv->regs + RCAR_GYROADC_START_STOP);
/* Disable IRQ on V2H. */
if (priv->model == RCAR_GYROADC_MODEL_R8A7792)
writel(0, priv->regs + RCAR_GYROADC_INTENR);
/* Set mode and timing. */
writel(priv->mode, priv->regs + RCAR_GYROADC_MODE_SELECT);
writel(clk_len, priv->regs + RCAR_GYROADC_CLOCK_LENGTH);
writel(clk_mhz * 1250, priv->regs + RCAR_GYROADC_1_25MS_LENGTH);
}
static void rcar_gyroadc_hw_start(struct rcar_gyroadc *priv)
{
/* Start sampling. */
writel(RCAR_GYROADC_START_STOP_START,
priv->regs + RCAR_GYROADC_START_STOP);
/*
* Wait for the first conversion to complete. This is longer than
* the 1.25 mS in the datasheet because 1.25 mS is not enough for
* the hardware to deliver the first sample and the hardware does
* then return zeroes instead of valid data.
*/
mdelay(3);
}
static void rcar_gyroadc_hw_stop(struct rcar_gyroadc *priv)
{
/* Stop the GyroADC. */
writel(0, priv->regs + RCAR_GYROADC_START_STOP);
}
#define RCAR_GYROADC_CHAN(_idx) { \
.type = IIO_VOLTAGE, \
.indexed = 1, \
.channel = (_idx), \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_SCALE), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
}
static const struct iio_chan_spec rcar_gyroadc_iio_channels_1[] = {
RCAR_GYROADC_CHAN(0),
RCAR_GYROADC_CHAN(1),
RCAR_GYROADC_CHAN(2),
RCAR_GYROADC_CHAN(3),
};
static const struct iio_chan_spec rcar_gyroadc_iio_channels_2[] = {
RCAR_GYROADC_CHAN(0),
RCAR_GYROADC_CHAN(1),
RCAR_GYROADC_CHAN(2),
RCAR_GYROADC_CHAN(3),
RCAR_GYROADC_CHAN(4),
RCAR_GYROADC_CHAN(5),
RCAR_GYROADC_CHAN(6),
RCAR_GYROADC_CHAN(7),
};
static const struct iio_chan_spec rcar_gyroadc_iio_channels_3[] = {
RCAR_GYROADC_CHAN(0),
RCAR_GYROADC_CHAN(1),
RCAR_GYROADC_CHAN(2),
RCAR_GYROADC_CHAN(3),
RCAR_GYROADC_CHAN(4),
RCAR_GYROADC_CHAN(5),
RCAR_GYROADC_CHAN(6),
RCAR_GYROADC_CHAN(7),
};
static int rcar_gyroadc_set_power(struct rcar_gyroadc *priv, bool on)
{
struct device *dev = priv->dev;
int ret;
if (on) {
ret = pm_runtime_get_sync(dev);
if (ret < 0)
pm_runtime_put_noidle(dev);
} else {
pm_runtime_mark_last_busy(dev);
ret = pm_runtime_put_autosuspend(dev);
}
return ret;
}
static int rcar_gyroadc_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct rcar_gyroadc *priv = iio_priv(indio_dev);
struct regulator *consumer;
unsigned int datareg = RCAR_GYROADC_REALTIME_DATA(chan->channel);
unsigned int vref;
int ret;
/*
* MB88101 is special in that it has only single regulator for
* all four channels.
*/
if (priv->mode == RCAR_GYROADC_MODE_SELECT_1_MB88101A)
consumer = priv->vref[0];
else
consumer = priv->vref[chan->channel];
switch (mask) {
case IIO_CHAN_INFO_RAW:
if (chan->type != IIO_VOLTAGE)
return -EINVAL;
/* Channel not connected. */
if (!consumer)
return -EINVAL;
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
ret = rcar_gyroadc_set_power(priv, true);
if (ret < 0) {
iio_device_release_direct_mode(indio_dev);
return ret;
}
*val = readl(priv->regs + datareg);
*val &= BIT(priv->sample_width) - 1;
ret = rcar_gyroadc_set_power(priv, false);
iio_device_release_direct_mode(indio_dev);
if (ret < 0)
return ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
/* Channel not connected. */
if (!consumer)
return -EINVAL;
vref = regulator_get_voltage(consumer);
*val = vref / 1000;
*val2 = 1 << priv->sample_width;
return IIO_VAL_FRACTIONAL;
case IIO_CHAN_INFO_SAMP_FREQ:
*val = RCAR_GYROADC_SAMPLE_RATE;
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static int rcar_gyroadc_reg_access(struct iio_dev *indio_dev,
unsigned int reg, unsigned int writeval,
unsigned int *readval)
{
struct rcar_gyroadc *priv = iio_priv(indio_dev);
unsigned int maxreg = RCAR_GYROADC_FIFO_STATUS;
if (readval == NULL)
return -EINVAL;
if (reg % 4)
return -EINVAL;
/* Handle the V2H case with extra interrupt block. */
if (priv->model == RCAR_GYROADC_MODEL_R8A7792)
maxreg = RCAR_GYROADC_INTENR;
if (reg > maxreg)
return -EINVAL;
*readval = readl(priv->regs + reg);
return 0;
}
static const struct iio_info rcar_gyroadc_iio_info = {
.driver_module = THIS_MODULE,
.read_raw = rcar_gyroadc_read_raw,
.debugfs_reg_access = rcar_gyroadc_reg_access,
};
static const struct of_device_id rcar_gyroadc_match[] = {
{
/* R-Car compatible GyroADC */
.compatible = "renesas,rcar-gyroadc",
.data = (void *)RCAR_GYROADC_MODEL_DEFAULT,
}, {
/* R-Car V2H specialty with interrupt registers. */
.compatible = "renesas,r8a7792-gyroadc",
.data = (void *)RCAR_GYROADC_MODEL_R8A7792,
}, {
/* sentinel */
}
};
MODULE_DEVICE_TABLE(of, rcar_gyroadc_match);
static const struct of_device_id rcar_gyroadc_child_match[] = {
/* Mode 1 ADCs */
{
.compatible = "fujitsu,mb88101a",
.data = (void *)RCAR_GYROADC_MODE_SELECT_1_MB88101A,
},
/* Mode 2 ADCs */
{
.compatible = "ti,adcs7476",
.data = (void *)RCAR_GYROADC_MODE_SELECT_2_ADCS7476,
}, {
.compatible = "ti,adc121",
.data = (void *)RCAR_GYROADC_MODE_SELECT_2_ADCS7476,
}, {
.compatible = "adi,ad7476",
.data = (void *)RCAR_GYROADC_MODE_SELECT_2_ADCS7476,
},
/* Mode 3 ADCs */
{
.compatible = "maxim,max1162",
.data = (void *)RCAR_GYROADC_MODE_SELECT_3_MAX1162,
}, {
.compatible = "maxim,max11100",
.data = (void *)RCAR_GYROADC_MODE_SELECT_3_MAX1162,
},
{ /* sentinel */ }
};
static int rcar_gyroadc_parse_subdevs(struct iio_dev *indio_dev)
{
const struct of_device_id *of_id;
const struct iio_chan_spec *channels;
struct rcar_gyroadc *priv = iio_priv(indio_dev);
struct device *dev = priv->dev;
struct device_node *np = dev->of_node;
struct device_node *child;
struct regulator *vref;
unsigned int reg;
unsigned int adcmode, childmode;
unsigned int sample_width;
unsigned int num_channels;
int ret, first = 1;
for_each_child_of_node(np, child) {
of_id = of_match_node(rcar_gyroadc_child_match, child);
if (!of_id) {
dev_err(dev, "Ignoring unsupported ADC \"%s\".",
child->name);
continue;
}
childmode = (unsigned int)of_id->data;
switch (childmode) {
case RCAR_GYROADC_MODE_SELECT_1_MB88101A:
sample_width = 12;
channels = rcar_gyroadc_iio_channels_1;
num_channels = ARRAY_SIZE(rcar_gyroadc_iio_channels_1);
break;
case RCAR_GYROADC_MODE_SELECT_2_ADCS7476:
sample_width = 15;
channels = rcar_gyroadc_iio_channels_2;
num_channels = ARRAY_SIZE(rcar_gyroadc_iio_channels_2);
break;
case RCAR_GYROADC_MODE_SELECT_3_MAX1162:
sample_width = 16;
channels = rcar_gyroadc_iio_channels_3;
num_channels = ARRAY_SIZE(rcar_gyroadc_iio_channels_3);
break;
}
/*
* MB88101 is special in that it's only a single chip taking
* up all the CHS lines. Thus, the DT binding is also special
* and has no reg property. If we run into such ADC, handle
* it here.
*/
if (childmode == RCAR_GYROADC_MODE_SELECT_1_MB88101A) {
reg = 0;
} else {
ret = of_property_read_u32(child, "reg", &reg);
if (ret) {
dev_err(dev,
"Failed to get child reg property of ADC \"%s\".\n",
child->name);
return ret;
}
/* Channel number is too high. */
if (reg >= num_channels) {
dev_err(dev,
"Only %i channels supported with %s, but reg = <%i>.\n",
num_channels, child->name, reg);
return ret;
}
}
/* Child node selected different mode than the rest. */
if (!first && (adcmode != childmode)) {
dev_err(dev,
"Channel %i uses different ADC mode than the rest.\n",
reg);
return ret;
}
/* Channel is valid, grab the regulator. */
dev->of_node = child;
vref = devm_regulator_get(dev, "vref");
dev->of_node = np;
if (IS_ERR(vref)) {
dev_dbg(dev, "Channel %i 'vref' supply not connected.\n",
reg);
return PTR_ERR(vref);
}
priv->vref[reg] = vref;
if (!first)
continue;
/* First child node which passed sanity tests. */
adcmode = childmode;
first = 0;
priv->num_channels = num_channels;
priv->mode = childmode;
priv->sample_width = sample_width;
indio_dev->channels = channels;
indio_dev->num_channels = num_channels;
/*
* MB88101 is special and we only have one such device
* attached to the GyroADC at a time, so if we found it,
* we can stop parsing here.
*/
if (childmode == RCAR_GYROADC_MODE_SELECT_1_MB88101A)
break;
}
if (first) {
dev_err(dev, "No valid ADC channels found, aborting.\n");
return -EINVAL;
}
return 0;
}
static void rcar_gyroadc_deinit_supplies(struct iio_dev *indio_dev)
{
struct rcar_gyroadc *priv = iio_priv(indio_dev);
unsigned int i;
for (i = 0; i < priv->num_channels; i++) {
if (!priv->vref[i])
continue;
regulator_disable(priv->vref[i]);
}
}
static int rcar_gyroadc_init_supplies(struct iio_dev *indio_dev)
{
struct rcar_gyroadc *priv = iio_priv(indio_dev);
struct device *dev = priv->dev;
unsigned int i;
int ret;
for (i = 0; i < priv->num_channels; i++) {
if (!priv->vref[i])
continue;
ret = regulator_enable(priv->vref[i]);
if (ret) {
dev_err(dev, "Failed to enable regulator %i (ret=%i)\n",
i, ret);
goto err;
}
}
return 0;
err:
rcar_gyroadc_deinit_supplies(indio_dev);
return ret;
}
static int rcar_gyroadc_probe(struct platform_device *pdev)
{
const struct of_device_id *of_id =
of_match_device(rcar_gyroadc_match, &pdev->dev);
struct device *dev = &pdev->dev;
struct rcar_gyroadc *priv;
struct iio_dev *indio_dev;
struct resource *mem;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*priv));
if (!indio_dev) {
dev_err(dev, "Failed to allocate IIO device.\n");
return -ENOMEM;
}
priv = iio_priv(indio_dev);
priv->dev = dev;
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
priv->regs = devm_ioremap_resource(dev, mem);
if (IS_ERR(priv->regs))
return PTR_ERR(priv->regs);
priv->iclk = devm_clk_get(dev, "if");
if (IS_ERR(priv->iclk)) {
ret = PTR_ERR(priv->iclk);
if (ret != -EPROBE_DEFER)
dev_err(dev, "Failed to get IF clock (ret=%i)\n", ret);
return ret;
}
ret = rcar_gyroadc_parse_subdevs(indio_dev);
if (ret)
return ret;
ret = rcar_gyroadc_init_supplies(indio_dev);
if (ret)
return ret;
priv->model = (enum rcar_gyroadc_model)of_id->data;
platform_set_drvdata(pdev, indio_dev);
indio_dev->name = DRIVER_NAME;
indio_dev->dev.parent = dev;
indio_dev->dev.of_node = pdev->dev.of_node;
indio_dev->info = &rcar_gyroadc_iio_info;
indio_dev->modes = INDIO_DIRECT_MODE;
ret = clk_prepare_enable(priv->iclk);
if (ret) {
dev_err(dev, "Could not prepare or enable the IF clock.\n");
goto err_clk_if_enable;
}
pm_runtime_set_autosuspend_delay(dev, RCAR_GYROADC_RUNTIME_PM_DELAY_MS);
pm_runtime_use_autosuspend(dev);
pm_runtime_enable(dev);
pm_runtime_get_sync(dev);
rcar_gyroadc_hw_init(priv);
rcar_gyroadc_hw_start(priv);
ret = iio_device_register(indio_dev);
if (ret) {
dev_err(dev, "Couldn't register IIO device.\n");
goto err_iio_device_register;
}
pm_runtime_put_sync(dev);
return 0;
err_iio_device_register:
rcar_gyroadc_hw_stop(priv);
pm_runtime_put_sync(dev);
pm_runtime_disable(dev);
pm_runtime_set_suspended(dev);
clk_disable_unprepare(priv->iclk);
err_clk_if_enable:
rcar_gyroadc_deinit_supplies(indio_dev);
return ret;
}
static int rcar_gyroadc_remove(struct platform_device *pdev)
{
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
struct rcar_gyroadc *priv = iio_priv(indio_dev);
struct device *dev = priv->dev;
iio_device_unregister(indio_dev);
pm_runtime_get_sync(dev);
rcar_gyroadc_hw_stop(priv);
pm_runtime_put_sync(dev);
pm_runtime_disable(dev);
pm_runtime_set_suspended(dev);
clk_disable_unprepare(priv->iclk);
rcar_gyroadc_deinit_supplies(indio_dev);
return 0;
}
#if defined(CONFIG_PM)
static int rcar_gyroadc_suspend(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct rcar_gyroadc *priv = iio_priv(indio_dev);
rcar_gyroadc_hw_stop(priv);
return 0;
}
static int rcar_gyroadc_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct rcar_gyroadc *priv = iio_priv(indio_dev);
rcar_gyroadc_hw_start(priv);
return 0;
}
#endif
static const struct dev_pm_ops rcar_gyroadc_pm_ops = {
SET_RUNTIME_PM_OPS(rcar_gyroadc_suspend, rcar_gyroadc_resume, NULL)
};
static struct platform_driver rcar_gyroadc_driver = {
.probe = rcar_gyroadc_probe,
.remove = rcar_gyroadc_remove,
.driver = {
.name = DRIVER_NAME,
.of_match_table = rcar_gyroadc_match,
.pm = &rcar_gyroadc_pm_ops,
},
};
module_platform_driver(rcar_gyroadc_driver);
MODULE_AUTHOR("Marek Vasut <marek.vasut@gmail.com>");
MODULE_DESCRIPTION("Renesas R-Car GyroADC driver");
MODULE_LICENSE("GPL");
drivers/iio/adc/stm32-adc-core.c
浏览文件 @ caa59428
......@@ -201,6 +201,7 @@ static int stm32_adc_probe(struct platform_device *pdev)
priv->common.base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(priv->common.base))
return PTR_ERR(priv->common.base);
priv->common.phys_base = res->start;
priv->vref = devm_regulator_get(&pdev->dev, "vref");
if (IS_ERR(priv->vref)) {
......
drivers/iio/adc/stm32-adc-core.h
浏览文件 @ caa59428
......@@ -42,10 +42,12 @@
/**
* struct stm32_adc_common - stm32 ADC driver common data (for all instances)
* @base: control registers base cpu addr
* @phys_base: control registers base physical addr
* @vref_mv: vref voltage (mv)
*/
struct stm32_adc_common {
void __iomem *base;
phys_addr_t phys_base;
int vref_mv;
};
......
drivers/iio/adc/stm32-adc.c
浏览文件 @ caa59428
此差异已折叠。
drivers/iio/adc/stx104.c
浏览文件 @ caa59428
......@@ -76,16 +76,6 @@ struct stx104_gpio {
unsigned int out_state;
};
/**
* struct stx104_dev - STX104 device private data structure
* @indio_dev: IIO device
* @chip: instance of the gpio_chip
*/
struct stx104_dev {
struct iio_dev *indio_dev;
struct gpio_chip *chip;
};
static int stx104_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val, int *val2, long mask)
{
......@@ -266,12 +256,38 @@ static void stx104_gpio_set(struct gpio_chip *chip, unsigned int offset,
spin_unlock_irqrestore(&stx104gpio->lock, flags);
}
#define STX104_NGPIO 8
static const char *stx104_names[STX104_NGPIO] = {
"DIN0", "DIN1", "DIN2", "DIN3", "DOUT0", "DOUT1", "DOUT2", "DOUT3"
};
static void stx104_gpio_set_multiple(struct gpio_chip *chip,
unsigned long *mask, unsigned long *bits)
{
struct stx104_gpio *const stx104gpio = gpiochip_get_data(chip);
unsigned long flags;
/* verify masked GPIO are output */
if (!(*mask & 0xF0))
return;
*mask >>= 4;
*bits >>= 4;
spin_lock_irqsave(&stx104gpio->lock, flags);
stx104gpio->out_state &= ~*mask;
stx104gpio->out_state |= *mask & *bits;
outb(stx104gpio->out_state, stx104gpio->base);
spin_unlock_irqrestore(&stx104gpio->lock, flags);
}
static int stx104_probe(struct device *dev, unsigned int id)
{
struct iio_dev *indio_dev;
struct stx104_iio *priv;
struct stx104_gpio *stx104gpio;
struct stx104_dev *stx104dev;
int err;
indio_dev = devm_iio_device_alloc(dev, sizeof(*priv));
......@@ -282,10 +298,6 @@ static int stx104_probe(struct device *dev, unsigned int id)
if (!stx104gpio)
return -ENOMEM;
stx104dev = devm_kzalloc(dev, sizeof(*stx104dev), GFP_KERNEL);
if (!stx104dev)
return -ENOMEM;
if (!devm_request_region(dev, base[id], STX104_EXTENT,
dev_name(dev))) {
dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
......@@ -324,45 +336,26 @@ static int stx104_probe(struct device *dev, unsigned int id)
stx104gpio->chip.parent = dev;
stx104gpio->chip.owner = THIS_MODULE;
stx104gpio->chip.base = -1;
stx104gpio->chip.ngpio = 8;
stx104gpio->chip.ngpio = STX104_NGPIO;
stx104gpio->chip.names = stx104_names;
stx104gpio->chip.get_direction = stx104_gpio_get_direction;
stx104gpio->chip.direction_input = stx104_gpio_direction_input;
stx104gpio->chip.direction_output = stx104_gpio_direction_output;
stx104gpio->chip.get = stx104_gpio_get;
stx104gpio->chip.set = stx104_gpio_set;
stx104gpio->chip.set_multiple = stx104_gpio_set_multiple;
stx104gpio->base = base[id] + 3;
stx104gpio->out_state = 0x0;
spin_lock_init(&stx104gpio->lock);
stx104dev->indio_dev = indio_dev;
stx104dev->chip = &stx104gpio->chip;
dev_set_drvdata(dev, stx104dev);
err = gpiochip_add_data(&stx104gpio->chip, stx104gpio);
err = devm_gpiochip_add_data(dev, &stx104gpio->chip, stx104gpio);
if (err) {
dev_err(dev, "GPIO registering failed (%d)\n", err);
return err;
}
err = iio_device_register(indio_dev);
if (err) {
dev_err(dev, "IIO device registering failed (%d)\n", err);
gpiochip_remove(&stx104gpio->chip);
return err;
}
return 0;
}
static int stx104_remove(struct device *dev, unsigned int id)
{
struct stx104_dev *const stx104dev = dev_get_drvdata(dev);
iio_device_unregister(stx104dev->indio_dev);
gpiochip_remove(stx104dev->chip);
return 0;
return devm_iio_device_register(dev, indio_dev);
}
static struct isa_driver stx104_driver = {
......@@ -370,7 +363,6 @@ static struct isa_driver stx104_driver = {
.driver = {
.name = "stx104"
},
.remove = stx104_remove
};
module_isa_driver(stx104_driver, num_stx104);
......
drivers/iio/adc/ti-ads1015.c
浏览文件 @ caa59428
......@@ -472,14 +472,14 @@ static const struct attribute_group ads1115_attribute_group = {
.attrs = ads1115_attributes,
};
static struct iio_info ads1015_info = {
static const struct iio_info ads1015_info = {
.driver_module = THIS_MODULE,
.read_raw = ads1015_read_raw,
.write_raw = ads1015_write_raw,
.attrs = &ads1015_attribute_group,
};
static struct iio_info ads1115_info = {
static const struct iio_info ads1115_info = {
.driver_module = THIS_MODULE,
.read_raw = ads1015_read_raw,
.write_raw = ads1015_write_raw,
......
drivers/iio/adc/ti-ads7950.c 0 → 100644
浏览文件 @ caa59428
/*
* Texas Instruments ADS7950 SPI ADC driver
*
* Copyright 2016 David Lechner <david@lechnology.com>
*
* Based on iio/ad7923.c:
* Copyright 2011 Analog Devices Inc
* Copyright 2012 CS Systemes d'Information
*
* And also on hwmon/ads79xx.c
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
* Nishanth Menon
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/bitops.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <linux/spi/spi.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#define TI_ADS7950_CR_MANUAL BIT(12)
#define TI_ADS7950_CR_WRITE BIT(11)
#define TI_ADS7950_CR_CHAN(ch) ((ch) << 7)
#define TI_ADS7950_CR_RANGE_5V BIT(6)
#define TI_ADS7950_MAX_CHAN 16
#define TI_ADS7950_TIMESTAMP_SIZE (sizeof(int64_t) / sizeof(__be16))
/* val = value, dec = left shift, bits = number of bits of the mask */
#define TI_ADS7950_EXTRACT(val, dec, bits) \
(((val) >> (dec)) & ((1 << (bits)) - 1))
struct ti_ads7950_state {
struct spi_device *spi;
struct spi_transfer ring_xfer[TI_ADS7950_MAX_CHAN + 2];
struct spi_transfer scan_single_xfer[3];
struct spi_message ring_msg;
struct spi_message scan_single_msg;
struct regulator *reg;
unsigned int settings;
/*
* DMA (thus cache coherency maintenance) requires the
* transfer buffers to live in their own cache lines.
*/
__be16 rx_buf[TI_ADS7950_MAX_CHAN + TI_ADS7950_TIMESTAMP_SIZE]
____cacheline_aligned;
__be16 tx_buf[TI_ADS7950_MAX_CHAN];
};
struct ti_ads7950_chip_info {
const struct iio_chan_spec *channels;
unsigned int num_channels;
};
enum ti_ads7950_id {
TI_ADS7950,
TI_ADS7951,
TI_ADS7952,
TI_ADS7953,
TI_ADS7954,
TI_ADS7955,
TI_ADS7956,
TI_ADS7957,
TI_ADS7958,
TI_ADS7959,
TI_ADS7960,
TI_ADS7961,
};
#define TI_ADS7950_V_CHAN(index, bits) \
{ \
.type = IIO_VOLTAGE, \
.indexed = 1, \
.channel = index, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.address = index, \
.datasheet_name = "CH##index", \
.scan_index = index, \
.scan_type = { \
.sign = 'u', \
.realbits = bits, \
.storagebits = 16, \
.shift = 12 - (bits), \
.endianness = IIO_BE, \
}, \
}
#define DECLARE_TI_ADS7950_4_CHANNELS(name, bits) \
const struct iio_chan_spec name ## _channels[] = { \
TI_ADS7950_V_CHAN(0, bits), \
TI_ADS7950_V_CHAN(1, bits), \
TI_ADS7950_V_CHAN(2, bits), \
TI_ADS7950_V_CHAN(3, bits), \
IIO_CHAN_SOFT_TIMESTAMP(4), \
}
#define DECLARE_TI_ADS7950_8_CHANNELS(name, bits) \
const struct iio_chan_spec name ## _channels[] = { \
TI_ADS7950_V_CHAN(0, bits), \
TI_ADS7950_V_CHAN(1, bits), \
TI_ADS7950_V_CHAN(2, bits), \
TI_ADS7950_V_CHAN(3, bits), \
TI_ADS7950_V_CHAN(4, bits), \
TI_ADS7950_V_CHAN(5, bits), \
TI_ADS7950_V_CHAN(6, bits), \
TI_ADS7950_V_CHAN(7, bits), \
IIO_CHAN_SOFT_TIMESTAMP(8), \
}
#define DECLARE_TI_ADS7950_12_CHANNELS(name, bits) \
const struct iio_chan_spec name ## _channels[] = { \
TI_ADS7950_V_CHAN(0, bits), \
TI_ADS7950_V_CHAN(1, bits), \
TI_ADS7950_V_CHAN(2, bits), \
TI_ADS7950_V_CHAN(3, bits), \
TI_ADS7950_V_CHAN(4, bits), \
TI_ADS7950_V_CHAN(5, bits), \
TI_ADS7950_V_CHAN(6, bits), \
TI_ADS7950_V_CHAN(7, bits), \
TI_ADS7950_V_CHAN(8, bits), \
TI_ADS7950_V_CHAN(9, bits), \
TI_ADS7950_V_CHAN(10, bits), \
TI_ADS7950_V_CHAN(11, bits), \
IIO_CHAN_SOFT_TIMESTAMP(12), \
}
#define DECLARE_TI_ADS7950_16_CHANNELS(name, bits) \
const struct iio_chan_spec name ## _channels[] = { \
TI_ADS7950_V_CHAN(0, bits), \
TI_ADS7950_V_CHAN(1, bits), \
TI_ADS7950_V_CHAN(2, bits), \
TI_ADS7950_V_CHAN(3, bits), \
TI_ADS7950_V_CHAN(4, bits), \
TI_ADS7950_V_CHAN(5, bits), \
TI_ADS7950_V_CHAN(6, bits), \
TI_ADS7950_V_CHAN(7, bits), \
TI_ADS7950_V_CHAN(8, bits), \
TI_ADS7950_V_CHAN(9, bits), \
TI_ADS7950_V_CHAN(10, bits), \
TI_ADS7950_V_CHAN(11, bits), \
TI_ADS7950_V_CHAN(12, bits), \
TI_ADS7950_V_CHAN(13, bits), \
TI_ADS7950_V_CHAN(14, bits), \
TI_ADS7950_V_CHAN(15, bits), \
IIO_CHAN_SOFT_TIMESTAMP(16), \
}
static DECLARE_TI_ADS7950_4_CHANNELS(ti_ads7950, 12);
static DECLARE_TI_ADS7950_8_CHANNELS(ti_ads7951, 12);
static DECLARE_TI_ADS7950_12_CHANNELS(ti_ads7952, 12);
static DECLARE_TI_ADS7950_16_CHANNELS(ti_ads7953, 12);
static DECLARE_TI_ADS7950_4_CHANNELS(ti_ads7954, 10);
static DECLARE_TI_ADS7950_8_CHANNELS(ti_ads7955, 10);
static DECLARE_TI_ADS7950_12_CHANNELS(ti_ads7956, 10);
static DECLARE_TI_ADS7950_16_CHANNELS(ti_ads7957, 10);
static DECLARE_TI_ADS7950_4_CHANNELS(ti_ads7958, 8);
static DECLARE_TI_ADS7950_8_CHANNELS(ti_ads7959, 8);
static DECLARE_TI_ADS7950_12_CHANNELS(ti_ads7960, 8);
static DECLARE_TI_ADS7950_16_CHANNELS(ti_ads7961, 8);
static const struct ti_ads7950_chip_info ti_ads7950_chip_info[] = {
[TI_ADS7950] = {
.channels = ti_ads7950_channels,
.num_channels = ARRAY_SIZE(ti_ads7950_channels),
},
[TI_ADS7951] = {
.channels = ti_ads7951_channels,
.num_channels = ARRAY_SIZE(ti_ads7951_channels),
},
[TI_ADS7952] = {
.channels = ti_ads7952_channels,
.num_channels = ARRAY_SIZE(ti_ads7952_channels),
},
[TI_ADS7953] = {
.channels = ti_ads7953_channels,
.num_channels = ARRAY_SIZE(ti_ads7953_channels),
},
[TI_ADS7954] = {
.channels = ti_ads7954_channels,
.num_channels = ARRAY_SIZE(ti_ads7954_channels),
},
[TI_ADS7955] = {
.channels = ti_ads7955_channels,
.num_channels = ARRAY_SIZE(ti_ads7955_channels),
},
[TI_ADS7956] = {
.channels = ti_ads7956_channels,
.num_channels = ARRAY_SIZE(ti_ads7956_channels),
},
[TI_ADS7957] = {
.channels = ti_ads7957_channels,
.num_channels = ARRAY_SIZE(ti_ads7957_channels),
},
[TI_ADS7958] = {
.channels = ti_ads7958_channels,
.num_channels = ARRAY_SIZE(ti_ads7958_channels),
},
[TI_ADS7959] = {
.channels = ti_ads7959_channels,
.num_channels = ARRAY_SIZE(ti_ads7959_channels),
},
[TI_ADS7960] = {
.channels = ti_ads7960_channels,
.num_channels = ARRAY_SIZE(ti_ads7960_channels),
},
[TI_ADS7961] = {
.channels = ti_ads7961_channels,
.num_channels = ARRAY_SIZE(ti_ads7961_channels),
},
};
/*
* ti_ads7950_update_scan_mode() setup the spi transfer buffer for the new
* scan mask
*/
static int ti_ads7950_update_scan_mode(struct iio_dev *indio_dev,
const unsigned long *active_scan_mask)
{
struct ti_ads7950_state *st = iio_priv(indio_dev);
int i, cmd, len;
len = 0;
for_each_set_bit(i, active_scan_mask, indio_dev->num_channels) {
cmd = TI_ADS7950_CR_WRITE | TI_ADS7950_CR_CHAN(i) | st->settings;
st->tx_buf[len++] = cpu_to_be16(cmd);
}
/* Data for the 1st channel is not returned until the 3rd transfer */
len += 2;
for (i = 0; i < len; i++) {
if ((i + 2) < len)
st->ring_xfer[i].tx_buf = &st->tx_buf[i];
if (i >= 2)
st->ring_xfer[i].rx_buf = &st->rx_buf[i - 2];
st->ring_xfer[i].len = 2;
st->ring_xfer[i].cs_change = 1;
}
/* make sure last transfer's cs_change is not set */
st->ring_xfer[len - 1].cs_change = 0;
spi_message_init_with_transfers(&st->ring_msg, st->ring_xfer, len);
return 0;
}
static irqreturn_t ti_ads7950_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct ti_ads7950_state *st = iio_priv(indio_dev);
int ret;
ret = spi_sync(st->spi, &st->ring_msg);
if (ret < 0)
goto out;
iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
iio_get_time_ns(indio_dev));
out:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static int ti_ads7950_scan_direct(struct ti_ads7950_state *st, unsigned int ch)
{
int ret, cmd;
cmd = TI_ADS7950_CR_WRITE | TI_ADS7950_CR_CHAN(ch) | st->settings;
st->tx_buf[0] = cpu_to_be16(cmd);
ret = spi_sync(st->spi, &st->scan_single_msg);
if (ret)
return ret;
return be16_to_cpu(st->rx_buf[0]);
}
static int ti_ads7950_get_range(struct ti_ads7950_state *st)
{
int vref;
vref = regulator_get_voltage(st->reg);
if (vref < 0)
return vref;
vref /= 1000;
if (st->settings & TI_ADS7950_CR_RANGE_5V)
vref *= 2;
return vref;
}
static int ti_ads7950_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long m)
{
struct ti_ads7950_state *st = iio_priv(indio_dev);
int ret;
switch (m) {
case IIO_CHAN_INFO_RAW:
ret = iio_device_claim_direct_mode(indio_dev);
if (ret < 0)
return ret;
ret = ti_ads7950_scan_direct(st, chan->address);
iio_device_release_direct_mode(indio_dev);
if (ret < 0)
return ret;
if (chan->address != TI_ADS7950_EXTRACT(ret, 12, 4))
return -EIO;
*val = TI_ADS7950_EXTRACT(ret, chan->scan_type.shift,
chan->scan_type.realbits);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
ret = ti_ads7950_get_range(st);
if (ret < 0)
return ret;
*val = ret;
*val2 = (1 << chan->scan_type.realbits) - 1;
return IIO_VAL_FRACTIONAL;
}
return -EINVAL;
}
static const struct iio_info ti_ads7950_info = {
.read_raw = &ti_ads7950_read_raw,
.update_scan_mode = ti_ads7950_update_scan_mode,
.driver_module = THIS_MODULE,
};
static int ti_ads7950_probe(struct spi_device *spi)
{
struct ti_ads7950_state *st;
struct iio_dev *indio_dev;
const struct ti_ads7950_chip_info *info;
int ret;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
spi_set_drvdata(spi, indio_dev);
st->spi = spi;
st->settings = TI_ADS7950_CR_MANUAL | TI_ADS7950_CR_RANGE_5V;
info = &ti_ads7950_chip_info[spi_get_device_id(spi)->driver_data];
indio_dev->name = spi_get_device_id(spi)->name;
indio_dev->dev.parent = &spi->dev;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = info->channels;
indio_dev->num_channels = info->num_channels;
indio_dev->info = &ti_ads7950_info;
/*
* Setup default message. The sample is read at the end of the first
* transfer, then it takes one full cycle to convert the sample and one
* more cycle to send the value. The conversion process is driven by
* the SPI clock, which is why we have 3 transfers. The middle one is
* just dummy data sent while the chip is converting the sample that
* was read at the end of the first transfer.
*/
st->scan_single_xfer[0].tx_buf = &st->tx_buf[0];
st->scan_single_xfer[0].len = 2;
st->scan_single_xfer[0].cs_change = 1;
st->scan_single_xfer[1].tx_buf = &st->tx_buf[0];
st->scan_single_xfer[1].len = 2;
st->scan_single_xfer[1].cs_change = 1;
st->scan_single_xfer[2].rx_buf = &st->rx_buf[0];
st->scan_single_xfer[2].len = 2;
spi_message_init_with_transfers(&st->scan_single_msg,
st->scan_single_xfer, 3);
st->reg = devm_regulator_get(&spi->dev, "vref");
if (IS_ERR(st->reg)) {
dev_err(&spi->dev, "Failed get get regulator \"vref\"\n");
return PTR_ERR(st->reg);
}
ret = regulator_enable(st->reg);
if (ret) {
dev_err(&spi->dev, "Failed to enable regulator \"vref\"\n");
return ret;
}
ret = iio_triggered_buffer_setup(indio_dev, NULL,
&ti_ads7950_trigger_handler, NULL);
if (ret) {
dev_err(&spi->dev, "Failed to setup triggered buffer\n");
goto error_disable_reg;
}
ret = iio_device_register(indio_dev);
if (ret) {
dev_err(&spi->dev, "Failed to register iio device\n");
goto error_cleanup_ring;
}
return 0;
error_cleanup_ring:
iio_triggered_buffer_cleanup(indio_dev);
error_disable_reg:
regulator_disable(st->reg);
return ret;
}
static int ti_ads7950_remove(struct spi_device *spi)
{
struct iio_dev *indio_dev = spi_get_drvdata(spi);
struct ti_ads7950_state *st = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
iio_triggered_buffer_cleanup(indio_dev);
regulator_disable(st->reg);
return 0;
}
static const struct spi_device_id ti_ads7950_id[] = {
{ "ads7950", TI_ADS7950 },
{ "ads7951", TI_ADS7951 },
{ "ads7952", TI_ADS7952 },
{ "ads7953", TI_ADS7953 },
{ "ads7954", TI_ADS7954 },
{ "ads7955", TI_ADS7955 },
{ "ads7956", TI_ADS7956 },
{ "ads7957", TI_ADS7957 },
{ "ads7958", TI_ADS7958 },
{ "ads7959", TI_ADS7959 },
{ "ads7960", TI_ADS7960 },
{ "ads7961", TI_ADS7961 },
{ }
};
MODULE_DEVICE_TABLE(spi, ti_ads7950_id);
static struct spi_driver ti_ads7950_driver = {
.driver = {
.name = "ads7950",
},
.probe = ti_ads7950_probe,
.remove = ti_ads7950_remove,
.id_table = ti_ads7950_id,
};
module_spi_driver(ti_ads7950_driver);
MODULE_AUTHOR("David Lechner <david@lechnology.com>");
MODULE_DESCRIPTION("TI TI_ADS7950 ADC");
MODULE_LICENSE("GPL v2");
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#include <linux/slab.h>
#include <linux/err.h>
#include <linux/export.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/buffer_impl.h>
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struct iio_cb_buffer {
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drivers/staging/iio/adc/ad7606.c
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drivers/staging/iio/addac/adt7316.c
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drivers/staging/ks7010/ks_hostif.c
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drivers/staging/ks7010/ks_wlan.h
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drivers/staging/nvec/nvec.h
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drivers/staging/nvec/nvec_ps2.c
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drivers/staging/octeon/ethernet.c
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drivers/staging/rtl8192e/dot11d.h
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drivers/staging/rtl8192u/r8192U.h
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drivers/staging/rtl8712/hal_init.c
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drivers/staging/rtl8712/usb_ops.c
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drivers/staging/rts5208/ms.c
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drivers/staging/sm750fb/sm750_hw.c
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drivers/staging/speakup/fakekey.c
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drivers/staging/speakup/i18n.c
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drivers/staging/speakup/main.c
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drivers/staging/vt6655/baseband.h
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drivers/staging/vt6656/card.h
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drivers/staging/vt6656/key.c
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drivers/staging/vt6656/mac.c
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drivers/staging/vt6656/mac.h
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drivers/staging/vt6656/main_usb.c
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drivers/staging/vt6656/power.h
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drivers/staging/vt6656/rxtx.c
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drivers/staging/vt6656/rxtx.h
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drivers/staging/vt6656/usbpipe.c
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drivers/staging/vt6656/usbpipe.h
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drivers/staging/vt6656/wcmd.c
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drivers/staging/vt6656/wcmd.h
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drivers/staging/wlan-ng/cfg80211.c
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drivers/staging/wlan-ng/hfa384x.h
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drivers/staging/wlan-ng/prism2mib.c
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drivers/staging/xgifb/XGI_main_26.c
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drivers/staging/xgifb/vb_init.c
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drivers/staging/xgifb/vb_setmode.h
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include/linux/hid-sensor-hub.h
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include/linux/hid-sensor-ids.h
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include/linux/iio/buffer.h
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include/linux/iio/kfifo_buf.h
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include/linux/iio/timer/stm32-timer-trigger.h 0 → 100644
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include/linux/mfd/stm32-timers.h 0 → 100644
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include/uapi/linux/iio/types.h
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tools/iio/iio_event_monitor.c
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