提交 c83cfc9c 编写于 作者: R Ralf Baechle

Get rid of early_init. There's more need to make this form of

initialization actually useful and as is certainly unmergable with
upstream.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
上级 8c936508
......@@ -57,7 +57,7 @@ extern void au1xxx_time_init(void);
extern void au1xxx_timer_setup(struct irqaction *irq);
extern void set_cpuspec(void);
static int __init au1x00_setup(void)
void __init plat_setup(void)
{
struct cpu_spec *sp;
char *argptr;
......@@ -153,12 +153,8 @@ static int __init au1x00_setup(void)
au_sync();
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S);
au_writel(0, SYS_TOYTRIM);
return 0;
}
early_initcall(au1x00_setup);
#if defined(CONFIG_64BIT_PHYS_ADDR)
/* This routine should be valid for all Au1x based boards */
phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
......
......@@ -89,7 +89,7 @@ static struct pci_controller cobalt_pci_controller = {
.io_offset = 0x00001000UL - GT64111_IO_BASE
};
static void __init cobalt_setup(void)
void __init plat_setup(void)
{
unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0);
int i;
......@@ -125,8 +125,6 @@ static void __init cobalt_setup(void)
#endif
}
early_initcall(cobalt_setup);
/*
* Prom init. We read our one and only communication with the firmware.
* Grab the amount of installed memory
......
......@@ -85,7 +85,7 @@ static void __init ddb_time_init(void)
static void __init ddb5074_setup(void)
void __init plat_setup(void)
{
set_io_port_base(NILE4_PCI_IO_BASE);
isa_slot_offset = NILE4_PCI_MEM_BASE;
......@@ -106,8 +106,6 @@ static void __init ddb5074_setup(void)
panic_timeout = 180;
}
early_initcall(ddb5074_setup);
#define USE_NILE4_SERIAL 0
#if USE_NILE4_SERIAL
......
......@@ -124,7 +124,7 @@ static struct {
static void ddb5476_board_init(void);
static void __init ddb5476_setup(void)
void __init plat_setup(void)
{
set_io_port_base(KSEG1ADDR(DDB_PCI_IO_BASE));
......@@ -158,8 +158,6 @@ static void __init ddb5476_setup(void)
ddb5476_board_init();
}
early_initcall(ddb5476_setup);
/*
* We don't trust bios. We essentially does hardware re-initialization
* as complete as possible, as far as we know we can safely do.
......
......@@ -170,7 +170,7 @@ static void ddb5477_board_init(void);
extern struct pci_controller ddb5477_ext_controller;
extern struct pci_controller ddb5477_io_controller;
static int ddb5477_setup(void)
void __init plat_setup(void)
{
/* initialize board - we don't trust the loader */
ddb5477_board_init();
......@@ -193,12 +193,8 @@ static int ddb5477_setup(void)
register_pci_controller (&ddb5477_ext_controller);
register_pci_controller (&ddb5477_io_controller);
return 0;
}
early_initcall(ddb5477_setup);
static void __init ddb5477_board_init(void)
{
/* ----------- setup PDARs ------------ */
......
......@@ -128,7 +128,7 @@ void __init dec_be_init(void)
extern void dec_time_init(void);
extern void dec_timer_setup(struct irqaction *);
static void __init decstation_setup(void)
void __init plat_setup(void)
{
board_be_init = dec_be_init;
board_time_init = dec_time_init;
......@@ -141,8 +141,6 @@ static void __init decstation_setup(void)
_machine_power_off = dec_machine_power_off;
}
early_initcall(decstation_setup);
/*
* Machine-specific initialisation for KN01, aka DS2100 (aka Pmin)
* or DS3100 (aka Pmax).
......
......@@ -55,7 +55,7 @@ extern void mips_reboot_setup(void);
unsigned char mac_0_1[12];
static void __init ev96100_setup(void)
void __init plat_setup(void)
{
unsigned int config = read_c0_config();
unsigned int status = read_c0_status();
......@@ -142,8 +142,6 @@ static void __init ev96100_setup(void)
tmp = GT_READ(GT_PCI0_CFGDATA_OFS);
}
early_initcall(ev96100_setup);
unsigned short get_gt_devid(void)
{
u32 gt_devid;
......
......@@ -69,7 +69,7 @@ unsigned long __init prom_free_prom_memory(void)
*/
extern void gt64120_time_init(void);
static void __init ev64120_setup(void)
void __init plat_setup(void)
{
_machine_restart = galileo_machine_restart;
_machine_halt = galileo_machine_halt;
......@@ -79,8 +79,6 @@ static void __init ev64120_setup(void)
set_io_port_base(KSEG1);
}
early_initcall(ev64120_setup);
const char *get_system_type(void)
{
return "Galileo EV64120A";
......
......@@ -150,7 +150,7 @@ void PMON_v2_setup()
gt64120_base = 0xe0000000;
}
static void __init momenco_ocelot_setup(void)
void __init plat_setup(void)
{
void (*l3func)(unsigned long)=KSEG1ADDR(&setup_l3cache);
unsigned int tmpword;
......@@ -307,8 +307,6 @@ static void __init momenco_ocelot_setup(void)
GT_WRITE(GT_DEV_B3_OFS, 0xfef73);
}
early_initcall(momenco_ocelot_setup);
extern int rm7k_tcache_enabled;
/*
* This runs in KSEG1. See the verbiage in rm7k.c::probe_scache()
......
......@@ -105,7 +105,7 @@ void __init it8172_init_ram_resource(unsigned long memsize)
it8172_resources.ram.end = memsize;
}
static void __init it8172_setup(void)
void __init plat_setup(void)
{
unsigned short dsr;
char *argptr;
......@@ -251,8 +251,6 @@ static void __init it8172_setup(void)
#endif /* CONFIG_IT8172_SCR1 */
}
early_initcall(it8172_setup);
#ifdef CONFIG_SERIO_I8042
/*
* According to the ITE Special BIOS Note for waking up the
......
......@@ -50,7 +50,7 @@ static struct resource jazz_io_resources[] = {
{ "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
};
static void __init jazz_setup(void)
void __init plat_setup(void)
{
int i;
......@@ -97,5 +97,3 @@ static void __init jazz_setup(void)
vdma_init();
}
early_initcall(jazz_setup);
......@@ -193,7 +193,7 @@ static void jmr3927_board_init(void);
extern struct resource pci_io_resource;
extern struct resource pci_mem_resource;
static void __init jmr3927_setup(void)
void __init plat_setup(void)
{
char *argptr;
......@@ -274,9 +274,6 @@ static void __init jmr3927_setup(void)
#endif
}
early_initcall(jmr3927_setup);
static void tx3927_setup(void);
#ifdef CONFIG_PCI
......@@ -335,7 +332,7 @@ static void __init jmr3927_board_init(void)
jmr3927_io_dipsw());
}
static void __init tx3927_setup(void)
void __init plat_setup(void)
{
int i;
......
......@@ -510,31 +510,7 @@ static inline void resource_init(void)
#undef MAXMEM
#undef MAXMEM_PFN
static int __initdata earlyinit_debug;
static int __init earlyinit_debug_setup(char *str)
{
earlyinit_debug = 1;
return 1;
}
__setup("earlyinit_debug", earlyinit_debug_setup);
extern initcall_t __earlyinitcall_start, __earlyinitcall_end;
static void __init do_earlyinitcalls(void)
{
initcall_t *call, *start, *end;
start = &__earlyinitcall_start;
end = &__earlyinitcall_end;
for (call = start; call < end; call++) {
if (earlyinit_debug)
printk("calling earlyinitcall 0x%p\n", *call);
(*call)();
}
}
extern void plat_setup(void);
void __init setup_arch(char **cmdline_p)
{
......@@ -551,7 +527,7 @@ void __init setup_arch(char **cmdline_p)
#endif
/* call board setup routine */
do_earlyinitcalls();
plat_setup();
strlcpy(command_line, arcs_cmdline, sizeof(command_line));
strlcpy(saved_command_line, command_line, COMMAND_LINE_SIZE);
......
......@@ -96,12 +96,6 @@ SECTIONS
.init.setup : { *(.init.setup) }
__setup_end = .;
.early_initcall.init : {
__earlyinitcall_start = .;
*(.initcall.early1.init)
}
__earlyinitcall_end = .;
__initcall_start = .;
.initcall.init : {
*(.initcall1.init)
......
......@@ -155,7 +155,7 @@ void __init serial_init(void)
}
#endif
static int __init lasat_setup(void)
void __init plat_setup(void)
{
int i;
lasat_misc = &lasat_misc_info[mips_machtype];
......@@ -185,8 +185,4 @@ static int __init lasat_setup(void)
change_c0_status(ST0_BEV,0);
prom_printf("Lasat specific initialization complete\n");
return 0;
}
early_initcall(lasat_setup);
......@@ -50,8 +50,10 @@ const char *get_system_type(void)
return "MIPS Atlas";
}
static int __init atlas_setup(void)
void __init plat_setup(void)
{
mips_pcibios_init();
ioport_resource.end = 0x7fffffff;
serial_init ();
......@@ -64,12 +66,8 @@ static int __init atlas_setup(void)
board_time_init = mips_time_init;
board_timer_setup = mips_timer_setup;
rtc_get_time = mips_rtc_get_time;
return 0;
}
early_initcall(atlas_setup);
static void __init serial_init(void)
{
#ifdef CONFIG_SERIAL_8250
......
......@@ -109,7 +109,7 @@ static struct pci_controller msc_controller = {
.io_offset = 0x00000000UL,
};
static int __init pcibios_init(void)
void __init mips_pcibios_init(void)
{
struct pci_controller *controller;
......@@ -150,14 +150,10 @@ static int __init pcibios_init(void)
controller = &msc_controller;
break;
default:
return 1;
return;
}
ioport_resource.end = controller->io_resource->end;
register_pci_controller (controller);
return 0;
}
early_initcall(pcibios_init);
......@@ -111,10 +111,12 @@ void __init fd_activate(void)
}
#endif
static int __init malta_setup(void)
void __init plat_setup(void)
{
unsigned int i;
mips_pcibios_init();
/* Request I/O space for devices used on the Malta board. */
for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++)
request_resource(&ioport_resource, standard_io_resources+i);
......@@ -224,8 +226,4 @@ static int __init malta_setup(void)
board_time_init = mips_time_init;
board_timer_setup = mips_timer_setup;
rtc_get_time = mips_rtc_get_time;
return 0;
}
early_initcall(malta_setup);
......@@ -57,8 +57,6 @@ static void __init sead_setup(void)
mips_reboot_setup();
}
early_initcall(sead_setup);
static void __init serial_init(void)
{
#ifdef CONFIG_SERIAL_8250
......
......@@ -351,7 +351,7 @@ static __init int __init ja_pci_init(void)
arch_initcall(ja_pci_init);
static int __init momenco_jaguar_atx_setup(void)
void __init plat_setup(void)
{
unsigned int tmpword;
......@@ -467,8 +467,4 @@ static int __init momenco_jaguar_atx_setup(void)
}
#endif
return 0;
}
early_initcall(momenco_jaguar_atx_setup);
......@@ -307,7 +307,7 @@ static __init int __init ja_pci_init(void)
arch_initcall(ja_pci_init);
static int __init momenco_ocelot_3_setup(void)
void __init plat_setup(void)
{
unsigned int tmpword;
......@@ -391,8 +391,4 @@ static int __init momenco_ocelot_3_setup(void)
/* Support for 128 MB memory */
add_memory_region(0x0, 0x08000000, BOOT_MEM_RAM);
return 0;
}
early_initcall(momenco_ocelot_3_setup);
......@@ -222,7 +222,7 @@ void momenco_time_init(void)
rtc_set_time = m48t37y_set_time;
}
static void __init momenco_ocelot_c_setup(void)
void __init plat_setup(void)
{
unsigned int tmpword;
......@@ -340,8 +340,6 @@ static void __init momenco_ocelot_c_setup(void)
}
}
early_initcall(momenco_ocelot_c_setup);
#ifndef CONFIG_64BIT
/* This needs to be one of the first initcalls, because no I/O port access
can work before this */
......
......@@ -160,7 +160,7 @@ static void __init setup_l3cache(unsigned long size)
printk("Done\n");
}
static int __init momenco_ocelot_g_setup(void)
void __init plat_setup(void)
{
void (*l3func)(unsigned long) = (void *) KSEG1ADDR(setup_l3cache);
unsigned int tmpword;
......@@ -240,12 +240,8 @@ static int __init momenco_ocelot_g_setup(void)
/* FIXME: Fix up the DiskOnChip mapping */
MV_WRITE(0x468, 0xfef73);
return 0;
}
early_initcall(momenco_ocelot_g_setup);
/* This needs to be one of the first initcalls, because no I/O port access
can work before this */
......
......@@ -52,9 +52,11 @@ static int __init lasat_pci_setup(void)
}
register_pci_controller(&lasat_pci_controller);
return 0;
return 0;
}
early_initcall(lasat_pci_setup);
arch_initcall(lasat_pci_setup);
#define LASATINT_ETH1 0
#define LASATINT_ETH0 1
......
......@@ -212,7 +212,7 @@ static void __init py_late_time_init(void)
py_rtc_setup();
}
static int __init pmc_yosemite_setup(void)
void __init plat_setup(void)
{
board_time_init = yosemite_time_init;
late_time_init = py_late_time_init;
......@@ -228,8 +228,4 @@ static int __init pmc_yosemite_setup(void)
OCD_WRITE(RM9000x2_OCD_HTBAR0, HYPERTRANSPORT_BAR0_ADDR);
OCD_WRITE(RM9000x2_OCD_HTMASK0, HYPERTRANSPORT_SIZE0);
#endif
return 0;
}
early_initcall(pmc_yosemite_setup);
......@@ -53,7 +53,7 @@ EXPORT_SYMBOL(ip22_do_break);
extern void ip22_be_init(void) __init;
extern void ip22_time_init(void) __init;
static int __init ip22_setup(void)
void __init plat_setup(void)
{
char *ctype;
......@@ -137,8 +137,4 @@ static int __init ip22_setup(void)
}
}
#endif
return 0;
}
early_initcall(ip22_setup);
......@@ -198,7 +198,7 @@ extern void ip27_setup_console(void);
extern void ip27_time_init(void);
extern void ip27_reboot_setup(void);
static int __init ip27_setup(void)
void __init plat_setup(void)
{
hubreg_t p, e, n_mode;
nasid_t nid;
......@@ -245,8 +245,4 @@ static int __init ip27_setup(void)
set_io_port_base(IO_BASE);
board_time_init = ip27_time_init;
return 0;
}
early_initcall(ip27_setup);
......@@ -92,7 +92,7 @@ void __init ip32_timer_setup(struct irqaction *irq)
setup_irq(IP32_R4K_TIMER_IRQ, irq);
}
static int __init ip32_setup(void)
void __init plat_setup(void)
{
board_be_init = ip32_be_init;
......@@ -152,8 +152,4 @@ static int __init ip32_setup(void)
}
}
#endif
return 0;
}
early_initcall(ip32_setup);
......@@ -84,7 +84,7 @@ int swarm_be_handler(struct pt_regs *regs, int is_fixup)
return (is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL);
}
static int __init swarm_setup(void)
void __init plat_setup(void)
{
sb1250_setup();
......@@ -133,12 +133,8 @@ static int __init swarm_setup(void)
};
/* XXXKW for CFE, get lines/cols from environment */
#endif
return 0;
}
early_initcall(swarm_setup);
#ifdef LEDS_PHYS
#ifdef CONFIG_SIBYTE_CARMEL
......
......@@ -167,7 +167,7 @@ static inline void sni_pcimt_time_init(void)
rtc_set_time = mc146818_set_rtc_mmss;
}
static int __init sni_rm200_pci_setup(void)
void __init plat_setup(void)
{
sni_pcimt_detect();
sni_pcimt_sc_init();
......@@ -196,8 +196,4 @@ static int __init sni_rm200_pci_setup(void)
#ifdef CONFIG_PCI
register_pci_controller(&sni_controller);
#endif
return 0;
}
early_initcall(sni_rm200_pci_setup);
......@@ -76,12 +76,8 @@ static void __init tx4927_setup(void)
toshiba_rbtx4927_setup();
}
#endif
return;
}
early_initcall(tx4927_setup);
void __init tx4927_time_init(void)
{
......
......@@ -58,6 +58,14 @@ static void __init timer_init(void)
board_timer_setup = setup_timer_irq;
}
void __init plat_setup(void)
{
vr41xx_calculate_clock_frequency();
timer_init();
iomem_resource_init();
}
void __init prom_init(void)
{
int argc, i;
......@@ -71,12 +79,6 @@ void __init prom_init(void)
if (i < (argc - 1))
strcat(arcs_cmdline, " ");
}
vr41xx_calculate_clock_frequency();
timer_init();
iomem_resource_init();
}
unsigned long __init prom_free_prom_memory (void)
......
......@@ -56,7 +56,7 @@ static struct mtd_partition cmbvr4133_mtd_parts[] = {
extern void i8259_init(void);
static int __init nec_cmbvr4133_setup(void)
static void __init nec_cmbvr4133_setup(void)
{
#ifdef CONFIG_ROCKHOPPER
extern void disable_pcnet(void);
......@@ -90,7 +90,4 @@ static int __init nec_cmbvr4133_setup(void)
#ifdef CONFIG_ROCKHOPPER
i8259_init();
#endif
return 0;
}
early_initcall(nec_cmbvr4133_setup);
......@@ -79,4 +79,10 @@
extern unsigned int mips_revision_corid;
#ifdef CONFIG_PCI
extern void mips_pcibios_init(void);
#else
#define mips_pcibios_init() do { } while (0)
#endif
#endif /* __ASM_MIPS_BOARDS_GENERIC_H */
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