提交 c73cc120 编写于 作者: M Masahiro Yamada 提交者: Catalin Marinas

arm64: relax assembly code alignment from 16 byte to 4 byte

Aarch64 instructions must be word aligned.  The current 16 byte
alignment is more than enough.  Relax it into 4 byte alignment.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
上级 e580b8bc
#ifndef __ASM_LINKAGE_H
#define __ASM_LINKAGE_H
#define __ALIGN .align 4
#define __ALIGN_STR ".align 4"
#define __ALIGN .align 2
#define __ALIGN_STR ".align 2"
#endif
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