arm64: lse: rename ARM64_CPU_FEAT_LSE_ATOMICS for consistency

Other CPU features follow an 'ARM64_HAS_*' naming scheme, so do the same
for the LSE atomics.
Signed-off-by: NWill Deacon <will.deacon@arm.com>

arch/arm64/include/asm/cpufeature.h

@@ -26,7 +26,7 @@
 #define ARM64_WORKAROUND_845719			2
 #define ARM64_HAS_SYSREG_GIC_CPUIF		3
 #define ARM64_HAS_PAN				4
-#define ARM64_CPU_FEAT_LSE_ATOMICS		5
+#define ARM64_HAS_LSE_ATOMICS			5
 
 #define ARM64_NCAPS				6
 

arch/arm64/include/asm/lse.h

@@ -12,7 +12,7 @@
 .arch_extension	lse
 
 .macro alt_lse, llsc, lse
-	alternative_insn "\llsc", "\lse", ARM64_CPU_FEAT_LSE_ATOMICS
+	alternative_insn "\llsc", "\lse", ARM64_HAS_LSE_ATOMICS
 .endm
 
 #else	/* __ASSEMBLER__ */
@@ -29,7 +29,7 @@ __asm__(".arch_extension	lse");
 
 /* In-line patching at runtime */
 #define ARM64_LSE_ATOMIC_INSN(llsc, lse)				\
-	ALTERNATIVE(llsc, lse, ARM64_CPU_FEAT_LSE_ATOMICS)
+	ALTERNATIVE(llsc, lse, ARM64_HAS_LSE_ATOMICS)
 
 #endif	/* __ASSEMBLER__ */
 #else	/* CONFIG_AS_LSE && CONFIG_ARM64_LSE_ATOMICS */

arch/arm64/kernel/setup.c

@@ -284,7 +284,7 @@ static void __init setup_processor(void)
 		default:
 		case 2:
 			elf_hwcap |= HWCAP_ATOMICS;
-			cpus_set_cap(ARM64_CPU_FEAT_LSE_ATOMICS);
+			cpus_set_cap(ARM64_HAS_LSE_ATOMICS);
 			if (IS_ENABLED(CONFIG_AS_LSE) &&
 			    IS_ENABLED(CONFIG_ARM64_LSE_ATOMICS))
 				pr_info("LSE atomics supported\n");