提交 c6c9f8cb 编写于 作者: A Alan Cox 提交者: Greg Kroah-Hartman

Staging: et131x: remove unused PCI identifiers

Signed-off-by: NAlan Cox <alan@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
上级 576b38e0
......@@ -63,9 +63,6 @@
#define TRUEPHY_SUCCESS 0
#define TRUEPHY_FAILURE 1
typedef void *TRUEPHY_HANDLE;
typedef void *TRUEPHY_PLATFORM_HANDLE;
typedef void *TRUEPHY_OSAL_HANDLE;
/* MI Register Addresses */
#define MI_CONTROL_REG 0
......@@ -742,28 +739,6 @@ typedef union _MI_LCR2_t {
/* MI Register 29 - 31: Reserved Reg(0x1D - 0x1E) */
/* TruePHY headers */
typedef struct _TRUEPHY_ACCESS_MI_REGS_ {
TRUEPHY_HANDLE hTruePhy;
int32_t nPhyId;
u8 bReadWrite;
u8 *pbyRegs;
u8 *pwData;
int32_t nRegCount;
} TRUEPHY_ACCESS_MI_REGS, *PTRUEPHY_ACCESS_MI_REGS;
/* TruePHY headers */
typedef struct _TAG_TPAL_ACCESS_MI_REGS_ {
u32 nPhyId;
u8 bReadWrite;
u32 nRegCount;
u16 Data[4096];
u8 Regs[4096];
} TPAL_ACCESS_MI_REGS, *PTPAL_ACCESS_MI_REGS;
typedef TRUEPHY_HANDLE TPAL_HANDLE;
/* Forward declaration of the private adapter structure */
struct et131x_adapter;
......
......@@ -61,54 +61,24 @@
#include "et1310_address_map.h"
#define MAX_WOL_PACKET_SIZE 0x80
#define MAX_WOL_MASK_SIZE (MAX_WOL_PACKET_SIZE / 8)
#define NUM_WOL_PATTERNS 0x5
#define CRC16_POLY 0x1021
typedef struct _MP_POWER_MGMT {
/* variable putting the phy into coma mode when boot up with no cable
* plugged in after 5 seconds
*/
u8 TransPhyComaModeOnBoot;
/* Array holding the five CRC values that the device is currently
* using for WOL. This will be queried when a pattern is to be
* removed.
*/
u32 localWolAndCrc0;
u16 WOLPatternList[NUM_WOL_PATTERNS];
u8 WOLMaskList[NUM_WOL_PATTERNS][MAX_WOL_MASK_SIZE];
u32 WOLMaskSize[NUM_WOL_PATTERNS];
/* IP address */
union {
u32 u32;
u8 u8[4];
} IPAddress;
/* Current Power state of the adapter. */
bool WOLState;
bool WOLEnabled;
bool Failed10Half;
bool bFailedStateTransition;
/* Next two used to save power information at power down. This
* information will be used during power up to set up parts of Power
* Management in JAGCore
*/
u32 tx_en;
u32 rx_en;
u16 PowerDownSpeed;
u8 PowerDownDuplex;
} MP_POWER_MGMT, *PMP_POWER_MGMT;
/* Forward declaration of the private adapter structure
* ( IS THERE A WAY TO DO THIS WITH A TYPEDEF??? )
*/
struct et131x_adapter;
u16 CalculateCCITCRC16(u8 *Pattern, u8 *Mask, u32 MaskSize);
void EnablePhyComa(struct et131x_adapter *adapter);
void DisablePhyComa(struct et131x_adapter *adapter);
......
......@@ -61,7 +61,6 @@
/* Packet and header sizes */
#define NIC_MIN_PACKET_SIZE 60
#define NIC_HEADER_SIZE ETH_HLEN /* 14 */
/* Multicast list size */
#define NIC_MAX_MCAST_LIST 128
......@@ -102,20 +101,13 @@
#define fMP_ADAPTER_NOT_READY_MASK 0x3ff00000
/* Some offsets in PCI config space that are actually used. */
#define ET1310_PCI_PM_CAPABILITY 0x40
#define ET1310_PCI_PM_CSR 0x44
#define ET1310_PCI_MAX_PYLD 0x4C
#define ET1310_PCI_DEV_CTRL 0x50
#define ET1310_PCI_DEV_STAT 0x52
#define ET1310_NMI_DISABLE 0x61
#define ET1310_PCI_MAC_ADDRESS 0xA4
#define ET1310_PCI_EEPROM_STATUS 0xB2
#define ET1310_PCI_PHY_INDEX_REG 0xB4
#define ET1310_PCI_ACK_NACK 0xC0
#define ET1310_PCI_REPLAY 0xC2
#define ET1310_PCI_L0L1LATENCY 0xCF
#define ET1310_PCI_SEL_PHY_CTRL 0xE4
#define ET1310_PCI_ADVANCED_ERR 0x100
/* PCI Vendor/Product IDs */
#define ET131X_PCI_VENDOR_ID 0x11C1 /* Agere Systems */
......
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