MIPS: Loongson: Add basic Loongson-3 CPU support
Basic Loongson-3 CPU support include CPU probing and TLB/cache initializing. Signed-off-by: NHuacai Chen <chenhc@lemote.com> Signed-off-by: NHongliang Tao <taohl@lemote.com> Signed-off-by: NHua Yan <yanh@lemote.com> Tested-by: NAlex Smith <alex.smith@imgtec.com> Reviewed-by: NAlex Smith <alex.smith@imgtec.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/6630Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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