提交 c4055a8c 编写于 作者: R Robert Jarzmik 提交者: David S. Miller

net: smsc91x: add u16 workaround for pxa platforms

Add a workaround for mainstone, idp and stargate2 boards, for u16 writes
which must be aligned on 32 bits addresses.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Cc: Jeremy Linton <jeremy.linton@arm.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
上级 9c365f31
...@@ -13,3 +13,5 @@ Optional properties: ...@@ -13,3 +13,5 @@ Optional properties:
16-bit access only. 16-bit access only.
- power-gpios: GPIO to control the PWRDWN pin - power-gpios: GPIO to control the PWRDWN pin
- reset-gpios: GPIO to control the RESET pin - reset-gpios: GPIO to control the RESET pin
- pxa-u16-align4 : Boolean, put in place the workaround the force all
u16 writes to be 32 bits aligned
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