mtd: blackfin NFC: fix hang when using NAND on BF527-EZKITs

The DMAs have different bit sizes on BF52x and BF54x.  From the PHRM:

"The 16-bit DMA Access Bus (DAB) connects the DMA controller to the
on-chip peripherals, PPI, SPI, Ethernet MAC, the SPORTs, NFC,
HOSTDP and the UARTs."

32-bit DMA won't work for BF52x.
Signed-off-by: NCliff Cai <cliff.cai@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NBryan Wu <cooloney@kernel.org>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

drivers/mtd/nand/bf5xx_nand.c

@@ -496,11 +496,20 @@ static void bf5xx_nand_dma_rw(struct mtd_info *mtd,
 	/* setup DMA register with Blackfin DMA API */
 	set_dma_config(CH_NFC, 0x0);
 	set_dma_start_addr(CH_NFC, (unsigned long) buf);
+
+/* The DMAs have different size on BF52x and BF54x */
+#ifdef CONFIG_BF52x
+	set_dma_x_count(CH_NFC, (page_size >> 1));
+	set_dma_x_modify(CH_NFC, 2);
+	val = DI_EN | WDSIZE_16;
+#endif
+
+#ifdef CONFIG_BF54x
 	set_dma_x_count(CH_NFC, (page_size >> 2));
 	set_dma_x_modify(CH_NFC, 4);
-
-	/* setup write or read operation */
 	val = DI_EN | WDSIZE_32;
+#endif
+	/* setup write or read operation */
 	if (is_read)
 		val |= WNR;
 	set_dma_config(CH_NFC, val);