drm/i915: Don't call gen8_fbc_sw_flush() on chv

CHV doesn't have FBC, so don't go calling gen8_fbc_sw_flush() on it.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
[danvet: Add a FIXME comment while at it that we should rework this a
lot more.]
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>

drivers/gpu/drm/i915/intel_display.c

@@ -9098,7 +9098,12 @@ void intel_frontbuffer_flush(struct drm_device *dev,
 
 	intel_edp_psr_flush(dev, frontbuffer_bits);
 
-	if (IS_GEN8(dev))
+	/*
+	 * FIXME: Unconditional fbc flushing here is a rather gross hack and
+	 * needs to be reworked into a proper frontbuffer tracking scheme like
+	 * psr employs.
+	 */
+	if (IS_BROADWELL(dev))
 		gen8_fbc_sw_flush(dev, FBC_REND_CACHE_CLEAN);
 }