pinctrl: nand: meson-gxl: fix missing data pins

The data pin 0-7 of the NAND controller are actually missing from
the nand pinctrl group, so we fix it here.

Fixes: 0f15f500 ("pinctrl: meson: Add GXL pinctrl definitions")
Reported-by: NLiang Yang <liang.yang@amlogic.com>
Signed-off-by: NYixun Lan <yixun.lan@amlogic.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

drivers/pinctrl/meson/pinctrl-meson-gxl.c

@@ -617,8 +617,8 @@ static const char * const sdio_groups[] = {
 };
 
 static const char * const nand_groups[] = {
-	"nand_ce0", "nand_ce1", "nand_rb0", "nand_ale", "nand_cle",
-	"nand_wen_clk", "nand_ren_wr", "nand_dqs",
+	"emmc_nand_d07", "nand_ce0", "nand_ce1", "nand_rb0", "nand_ale",
+	"nand_cle", "nand_wen_clk", "nand_ren_wr", "nand_dqs",
 };
 
 static const char * const uart_a_groups[] = {