i40e/i40evf: carefully fill tx ring
We need to make sure that we stay away from the cache line where the DD bit (done) may be getting written back for the transmit ring since the hardware may be writing the whole cache line for a partial update. Change-ID: Id0b6dfc01f654def6a2a021af185803be1915d7e Signed-off-by: NJesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: NCatherine Sullivan <catherine.sullivan@intel.com> Tested-by: NKavindya Deegala <kavindya.s.deegala@intel.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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