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cloud-kernel
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bcd77ffc
cloud-kernel
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bcd77ffc
编写于
10月 30, 2013
作者:
B
Benjamin Herrenschmidt
浏览文件
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浏览文件
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差异文件
Merge branch 'for-kvm' into next
Add Paul's fix for 32-bit register corruption in the new FP code
上级
3ad26e5c
955c1cab
变更
2
隐藏空白更改
内联
并排
Showing
2 changed file
with
17 addition
and
12 deletion
+17
-12
arch/powerpc/kernel/fpu.S
arch/powerpc/kernel/fpu.S
+8
-6
arch/powerpc/kernel/vector.S
arch/powerpc/kernel/vector.S
+9
-6
未找到文件。
arch/powerpc/kernel/fpu.S
浏览文件 @
bcd77ffc
...
...
@@ -106,6 +106,8 @@ _GLOBAL(store_fp_state)
*
and
save
its
floating
-
point
registers
in
its
thread_struct
.
*
Load
up
this
task
's FP registers from its thread_struct,
*
enable
the
FPU
for
the
current
task
and
return
to
the
task
.
*
Note
that
on
32
-
bit
this
can
only
use
registers
that
will
be
*
restored
by
fast_exception_return
,
i
.
e
.
r3
-
r6
,
r10
and
r11
.
*/
_GLOBAL
(
load_up_fpu
)
mfmsr
r5
...
...
@@ -131,10 +133,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
beq
1
f
toreal
(
r4
)
addi
r4
,
r4
,
THREAD
/*
want
last_task_used_math
->
thread
*/
addi
r
8
,
r4
,
THREAD_FPSTATE
SAVE_32FPVSRS
(0,
R5
,
R
8
)
addi
r
10
,
r4
,
THREAD_FPSTATE
SAVE_32FPVSRS
(0,
R5
,
R
10
)
mffs
fr0
stfd
fr0
,
FPSTATE_FPSCR
(
r
8
)
stfd
fr0
,
FPSTATE_FPSCR
(
r
10
)
PPC_LL
r5
,
PT_REGS
(
r4
)
toreal
(
r5
)
PPC_LL
r4
,
_MSR
-
STACK_FRAME_OVERHEAD
(
r5
)
...
...
@@ -157,10 +159,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
or
r12
,
r12
,
r4
std
r12
,
_MSR
(
r1
)
#endif
addi
r
7
,
r5
,
THREAD_FPSTATE
lfd
fr0
,
FPSTATE_FPSCR
(
r
7
)
addi
r
10
,
r5
,
THREAD_FPSTATE
lfd
fr0
,
FPSTATE_FPSCR
(
r
10
)
MTFSF_L
(
fr0
)
REST_32FPVSRS
(0,
R4
,
R
7
)
REST_32FPVSRS
(0,
R4
,
R
10
)
#ifndef CONFIG_SMP
subi
r4
,
r5
,
THREAD
fromreal
(
r4
)
...
...
arch/powerpc/kernel/vector.S
浏览文件 @
bcd77ffc
...
...
@@ -64,6 +64,9 @@ _GLOBAL(store_vr_state)
*
Enables
the
VMX
for
use
in
the
kernel
on
return
.
*
On
SMP
we
know
the
VMX
is
free
,
since
we
give
it
up
every
*
switch
(
ie
,
no
lazy
save
of
the
vector
registers
)
.
*
*
Note
that
on
32
-
bit
this
can
only
use
registers
that
will
be
*
restored
by
fast_exception_return
,
i
.
e
.
r3
-
r6
,
r10
and
r11
.
*/
_GLOBAL
(
load_up_altivec
)
mfmsr
r5
/*
grab
the
current
MSR
*/
...
...
@@ -89,11 +92,11 @@ _GLOBAL(load_up_altivec)
/
*
Save
VMX
state
to
last_task_used_altivec
's THREAD struct */
toreal
(
r4
)
addi
r4
,
r4
,
THREAD
addi
r
7
,
r4
,
THREAD_VRSTATE
SAVE_32VRS
(0,
r5
,
r
7
)
addi
r
6
,
r4
,
THREAD_VRSTATE
SAVE_32VRS
(0,
r5
,
r
6
)
mfvscr
vr0
li
r10
,
VRSTATE_VSCR
stvx
vr0
,
r10
,
r
7
stvx
vr0
,
r10
,
r
6
/
*
Disable
VMX
for
last_task_used_altivec
*/
PPC_LL
r5
,
PT_REGS
(
r4
)
toreal
(
r5
)
...
...
@@ -125,13 +128,13 @@ _GLOBAL(load_up_altivec)
oris
r12
,
r12
,
MSR_VEC
@
h
std
r12
,
_MSR
(
r1
)
#endif
addi
r
7
,
r5
,
THREAD_VRSTATE
addi
r
6
,
r5
,
THREAD_VRSTATE
li
r4
,
1
li
r10
,
VRSTATE_VSCR
stw
r4
,
THREAD_USED_VR
(
r5
)
lvx
vr0
,
r10
,
r
7
lvx
vr0
,
r10
,
r
6
mtvscr
vr0
REST_32VRS
(0,
r4
,
r
7
)
REST_32VRS
(0,
r4
,
r
6
)
#ifndef CONFIG_SMP
/
*
Update
last_task_used_altivec
to
'current'
*/
subi
r4
,
r5
,
THREAD
/*
Back
to
'current'
*/
...
...
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