提交 bb2c018b 编写于 作者: I Ingo Molnar

Merge branch 'linus' into cpus4096

Conflicts:

	drivers/acpi/processor_throttling.c
Signed-off-by: NIngo Molnar <mingo@elte.hu>
无相关合并请求

要显示的变更太多。

To preserve performance only 1000 of 1000+ files are displayed.
......@@ -29,46 +29,46 @@ Description:
$ cd /sys/firmware/acpi/interrupts
$ grep . *
error:0
ff_gbl_lock:0
ff_pmtimer:0
ff_pwr_btn:0
ff_rt_clk:0
ff_slp_btn:0
gpe00:0
gpe01:0
gpe02:0
gpe03:0
gpe04:0
gpe05:0
gpe06:0
gpe07:0
gpe08:0
gpe09:174
gpe0A:0
gpe0B:0
gpe0C:0
gpe0D:0
gpe0E:0
gpe0F:0
gpe10:0
gpe11:60
gpe12:0
gpe13:0
gpe14:0
gpe15:0
gpe16:0
gpe17:0
gpe18:0
gpe19:7
gpe1A:0
gpe1B:0
gpe1C:0
gpe1D:0
gpe1E:0
gpe1F:0
gpe_all:241
sci:241
error: 0
ff_gbl_lock: 0 enable
ff_pmtimer: 0 invalid
ff_pwr_btn: 0 enable
ff_rt_clk: 2 disable
ff_slp_btn: 0 invalid
gpe00: 0 invalid
gpe01: 0 enable
gpe02: 108 enable
gpe03: 0 invalid
gpe04: 0 invalid
gpe05: 0 invalid
gpe06: 0 enable
gpe07: 0 enable
gpe08: 0 invalid
gpe09: 0 invalid
gpe0A: 0 invalid
gpe0B: 0 invalid
gpe0C: 0 invalid
gpe0D: 0 invalid
gpe0E: 0 invalid
gpe0F: 0 invalid
gpe10: 0 invalid
gpe11: 0 invalid
gpe12: 0 invalid
gpe13: 0 invalid
gpe14: 0 invalid
gpe15: 0 invalid
gpe16: 0 invalid
gpe17: 1084 enable
gpe18: 0 enable
gpe19: 0 invalid
gpe1A: 0 invalid
gpe1B: 0 invalid
gpe1C: 0 invalid
gpe1D: 0 invalid
gpe1E: 0 invalid
gpe1F: 0 invalid
gpe_all: 1192
sci: 1194
sci - The total number of times the ACPI SCI
has claimed an interrupt.
......@@ -89,6 +89,13 @@ Description:
error - an interrupt that can't be accounted for above.
invalid: it's either a wakeup GPE or a GPE/Fixed Event that
doesn't have an event handler.
disable: the GPE/Fixed Event is valid but disabled.
enable: the GPE/Fixed Event is valid and enabled.
Root has permission to clear any of these counters. Eg.
# echo 0 > gpe11
......@@ -97,3 +104,43 @@ Description:
None of these counters has an effect on the function
of the system, they are simply statistics.
Besides this, user can also write specific strings to these files
to enable/disable/clear ACPI interrupts in user space, which can be
used to debug some ACPI interrupt storm issues.
Note that only writting to VALID GPE/Fixed Event is allowed,
i.e. user can only change the status of runtime GPE and
Fixed Event with event handler installed.
Let's take power button fixed event for example, please kill acpid
and other user space applications so that the machine won't shutdown
when pressing the power button.
# cat ff_pwr_btn
0
# press the power button for 3 times;
# cat ff_pwr_btn
3
# echo disable > ff_pwr_btn
# cat ff_pwr_btn
disable
# press the power button for 3 times;
# cat ff_pwr_btn
disable
# echo enable > ff_pwr_btn
# cat ff_pwr_btn
4
/*
* this is because the status bit is set even if the enable bit is cleared,
* and it triggers an ACPI fixed event when the enable bit is set again
*/
# press the power button for 3 times;
# cat ff_pwr_btn
7
# echo disable > ff_pwr_btn
# press the power button for 3 times;
# echo clear > ff_pwr_btn /* clear the status bit */
# echo disable > ff_pwr_btn
# cat ff_pwr_btn
7
......@@ -233,10 +233,12 @@ accomplished via the group operations specified on the group's
config_item_type.
struct configfs_group_operations {
struct config_item *(*make_item)(struct config_group *group,
const char *name);
struct config_group *(*make_group)(struct config_group *group,
const char *name);
int (*make_item)(struct config_group *group,
const char *name,
struct config_item **new_item);
int (*make_group)(struct config_group *group,
const char *name,
struct config_group **new_group);
int (*commit_item)(struct config_item *item);
void (*disconnect_notify)(struct config_group *group,
struct config_item *item);
......
......@@ -273,13 +273,13 @@ static inline struct simple_children *to_simple_children(struct config_item *ite
return item ? container_of(to_config_group(item), struct simple_children, group) : NULL;
}
static struct config_item *simple_children_make_item(struct config_group *group, const char *name)
static int simple_children_make_item(struct config_group *group, const char *name, struct config_item **new_item)
{
struct simple_child *simple_child;
simple_child = kzalloc(sizeof(struct simple_child), GFP_KERNEL);
if (!simple_child)
return NULL;
return -ENOMEM;
config_item_init_type_name(&simple_child->item, name,
......@@ -287,7 +287,8 @@ static struct config_item *simple_children_make_item(struct config_group *group,
simple_child->storeme = 0;
return &simple_child->item;
*new_item = &simple_child->item;
return 0;
}
static struct configfs_attribute simple_children_attr_description = {
......@@ -359,20 +360,21 @@ static struct configfs_subsystem simple_children_subsys = {
* children of its own.
*/
static struct config_group *group_children_make_group(struct config_group *group, const char *name)
static int group_children_make_group(struct config_group *group, const char *name, struct config_group **new_group)
{
struct simple_children *simple_children;
simple_children = kzalloc(sizeof(struct simple_children),
GFP_KERNEL);
if (!simple_children)
return NULL;
return -ENOMEM;
config_group_init_type_name(&simple_children->group, name,
&simple_children_type);
return &simple_children->group;
*new_group = &simple_children->group;
return 0;
}
static struct configfs_attribute group_children_attr_description = {
......
Introduction
=============
UBIFS file-system stands for UBI File System. UBI stands for "Unsorted
Block Images". UBIFS is a flash file system, which means it is designed
to work with flash devices. It is important to understand, that UBIFS
is completely different to any traditional file-system in Linux, like
Ext2, XFS, JFS, etc. UBIFS represents a separate class of file-systems
which work with MTD devices, not block devices. The other Linux
file-system of this class is JFFS2.
To make it more clear, here is a small comparison of MTD devices and
block devices.
1 MTD devices represent flash devices and they consist of eraseblocks of
rather large size, typically about 128KiB. Block devices consist of
small blocks, typically 512 bytes.
2 MTD devices support 3 main operations - read from some offset within an
eraseblock, write to some offset within an eraseblock, and erase a whole
eraseblock. Block devices support 2 main operations - read a whole
block and write a whole block.
3 The whole eraseblock has to be erased before it becomes possible to
re-write its contents. Blocks may be just re-written.
4 Eraseblocks become worn out after some number of erase cycles -
typically 100K-1G for SLC NAND and NOR flashes, and 1K-10K for MLC
NAND flashes. Blocks do not have the wear-out property.
5 Eraseblocks may become bad (only on NAND flashes) and software should
deal with this. Blocks on hard drives typically do not become bad,
because hardware has mechanisms to substitute bad blocks, at least in
modern LBA disks.
It should be quite obvious why UBIFS is very different to traditional
file-systems.
UBIFS works on top of UBI. UBI is a separate software layer which may be
found in drivers/mtd/ubi. UBI is basically a volume management and
wear-leveling layer. It provides so called UBI volumes which is a higher
level abstraction than a MTD device. The programming model of UBI devices
is very similar to MTD devices - they still consist of large eraseblocks,
they have read/write/erase operations, but UBI devices are devoid of
limitations like wear and bad blocks (items 4 and 5 in the above list).
In a sense, UBIFS is a next generation of JFFS2 file-system, but it is
very different and incompatible to JFFS2. The following are the main
differences.
* JFFS2 works on top of MTD devices, UBIFS depends on UBI and works on
top of UBI volumes.
* JFFS2 does not have on-media index and has to build it while mounting,
which requires full media scan. UBIFS maintains the FS indexing
information on the flash media and does not require full media scan,
so it mounts many times faster than JFFS2.
* JFFS2 is a write-through file-system, while UBIFS supports write-back,
which makes UBIFS much faster on writes.
Similarly to JFFS2, UBIFS supports on-the-flight compression which makes
it possible to fit quite a lot of data to the flash.
Similarly to JFFS2, UBIFS is tolerant of unclean reboots and power-cuts.
It does not need stuff like ckfs.ext2. UBIFS automatically replays its
journal and recovers from crashes, ensuring that the on-flash data
structures are consistent.
UBIFS scales logarithmically (most of the data structures it uses are
trees), so the mount time and memory consumption do not linearly depend
on the flash size, like in case of JFFS2. This is because UBIFS
maintains the FS index on the flash media. However, UBIFS depends on
UBI, which scales linearly. So overall UBI/UBIFS stack scales linearly.
Nevertheless, UBI/UBIFS scales considerably better than JFFS2.
The authors of UBIFS believe, that it is possible to develop UBI2 which
would scale logarithmically as well. UBI2 would support the same API as UBI,
but it would be binary incompatible to UBI. So UBIFS would not need to be
changed to use UBI2
Mount options
=============
(*) == default.
norm_unmount (*) commit on unmount; the journal is committed
when the file-system is unmounted so that the
next mount does not have to replay the journal
and it becomes very fast;
fast_unmount do not commit on unmount; this option makes
unmount faster, but the next mount slower
because of the need to replay the journal.
Quick usage instructions
========================
The UBI volume to mount is specified using "ubiX_Y" or "ubiX:NAME" syntax,
where "X" is UBI device number, "Y" is UBI volume number, and "NAME" is
UBI volume name.
Mount volume 0 on UBI device 0 to /mnt/ubifs:
$ mount -t ubifs ubi0_0 /mnt/ubifs
Mount "rootfs" volume of UBI device 0 to /mnt/ubifs ("rootfs" is volume
name):
$ mount -t ubifs ubi0:rootfs /mnt/ubifs
The following is an example of the kernel boot arguments to attach mtd0
to UBI and mount volume "rootfs":
ubi.mtd=0 root=ubi0:rootfs rootfstype=ubifs
Module Parameters for Debugging
===============================
When UBIFS has been compiled with debugging enabled, there are 3 module
parameters that are available to control aspects of testing and debugging.
The parameters are unsigned integers where each bit controls an option.
The parameters are:
debug_msgs Selects which debug messages to display, as follows:
Message Type Flag value
General messages 1
Journal messages 2
Mount messages 4
Commit messages 8
LEB search messages 16
Budgeting messages 32
Garbage collection messages 64
Tree Node Cache (TNC) messages 128
LEB properties (lprops) messages 256
Input/output messages 512
Log messages 1024
Scan messages 2048
Recovery messages 4096
debug_chks Selects extra checks that UBIFS can do while running:
Check Flag value
General checks 1
Check Tree Node Cache (TNC) 2
Check indexing tree size 4
Check orphan area 8
Check old indexing tree 16
Check LEB properties (lprops) 32
Check leaf nodes and inodes 64
debug_tsts Selects a mode of testing, as follows:
Test mode Flag value
Force in-the-gaps method 2
Failure mode for recovery testing 4
For example, set debug_msgs to 5 to display General messages and Mount
messages.
References
==========
UBIFS documentation and FAQ/HOWTO at the MTD web site:
http://www.linux-mtd.infradead.org/doc/ubifs.html
http://www.linux-mtd.infradead.org/faq/ubifs.html
此差异已折叠。
......@@ -49,7 +49,7 @@ $ modprobe max6875 force=0,0x50
The MAX6874/MAX6875 ignores address bit 0, so this driver attaches to multiple
addresses. For example, for address 0x50, it also reserves 0x51.
The even-address instance is called 'max6875', the odd one is 'max6875 subclient'.
The even-address instance is called 'max6875', the odd one is 'dummy'.
Programming the chip using i2c-dev
......
......@@ -7,7 +7,7 @@ drivers/gpio/pca9539.c instead.
Supported chips:
* Philips PCA9539
Prefix: 'pca9539'
Addresses scanned: 0x74 - 0x77
Addresses scanned: none
Datasheet:
http://www.semiconductors.philips.com/acrobat/datasheets/PCA9539_2.pdf
......@@ -23,6 +23,14 @@ The input sense can also be inverted.
The 16 lines are split between two bytes.
Detection
---------
The PCA9539 is difficult to detect and not commonly found in PC machines,
so you have to pass the I2C bus and address of the installed PCA9539
devices explicitly to the driver at load time via the force=... parameter.
Sysfs entries
-------------
......
......@@ -4,13 +4,13 @@ Kernel driver pcf8574
Supported chips:
* Philips PCF8574
Prefix: 'pcf8574'
Addresses scanned: I2C 0x20 - 0x27
Addresses scanned: none
Datasheet: Publicly available at the Philips Semiconductors website
http://www.semiconductors.philips.com/pip/PCF8574P.html
* Philips PCF8574A
Prefix: 'pcf8574a'
Addresses scanned: I2C 0x38 - 0x3f
Addresses scanned: none
Datasheet: Publicly available at the Philips Semiconductors website
http://www.semiconductors.philips.com/pip/PCF8574P.html
......@@ -38,12 +38,10 @@ For more informations see the datasheet.
Accessing PCF8574(A) via /sys interface
-------------------------------------
! Be careful !
The PCF8574(A) is plainly impossible to detect ! Stupid chip.
So every chip with address in the interval [20..27] and [38..3f] are
detected as PCF8574(A). If you have other chips in this address
range, the workaround is to load this module after the one
for your others chips.
So, you have to pass the I2C bus and address of the installed PCF857A
and PCF8574A devices explicitly to the driver at load time via the
force=... parameter.
On detection (i.e. insmod, modprobe et al.), directories are being
created for each detected PCF8574(A):
......
......@@ -40,12 +40,9 @@ Detection
---------
There is no method known to detect whether a chip on a given I2C address is
a PCF8575 or whether it is any other I2C device. So there are two alternatives
to let the driver find the installed PCF8575 devices:
- Load this driver after any other I2C driver for I2C devices with addresses
in the range 0x20 .. 0x27.
- Pass the I2C bus and address of the installed PCF8575 devices explicitly to
the driver at load time via the probe=... or force=... parameters.
a PCF8575 or whether it is any other I2C device, so you have to pass the I2C
bus and address of the installed PCF8575 devices explicitly to the driver at
load time via the force=... parameter.
/sys interface
--------------
......
......@@ -508,12 +508,13 @@ HDIO_DRIVE_RESET execute a device reset
error returns:
EACCES Access denied: requires CAP_SYS_ADMIN
ENXIO No such device: phy dead or ctl_addr == 0
EIO I/O error: reset timed out or hardware error
notes:
Abort any current command, prevent anything else from being
queued, execute a reset on the device, and issue BLKRRPART
ioctl on the block device.
Execute a reset on the device as soon as the current IO
operation has completed.
Executes an ATAPI soft reset if applicable, otherwise
executes an ATA soft reset on the controller.
......
......@@ -147,10 +147,14 @@ and is between 256 and 4096 characters. It is defined in the file
default: 0
acpi_sleep= [HW,ACPI] Sleep options
Format: { s3_bios, s3_mode, s3_beep }
Format: { s3_bios, s3_mode, s3_beep, old_ordering }
See Documentation/power/video.txt for s3_bios and s3_mode.
s3_beep is for debugging; it makes the PC's speaker beep
as soon as the kernel's real-mode entry point is called.
old_ordering causes the ACPI 1.0 ordering of the _PTS
control method, wrt putting devices into low power
states, to be enforced (the ACPI 2.0 ordering of _PTS is
used by default).
acpi_sci= [HW,ACPI] ACPI System Control Interrupt trigger mode
Format: { level | edge | high | low }
......@@ -818,7 +822,7 @@ and is between 256 and 4096 characters. It is defined in the file
See Documentation/ide/ide.txt.
idle= [X86]
Format: idle=poll or idle=mwait
Format: idle=poll or idle=mwait, idle=halt, idle=nomwait
Poll forces a polling idle loop that can slightly improves the performance
of waking up a idle CPU, but will use a lot of power and make the system
run hot. Not recommended.
......@@ -826,6 +830,9 @@ and is between 256 and 4096 characters. It is defined in the file
to not use it because it doesn't save as much power as a normal idle
loop use the MONITOR/MWAIT idle loop anyways. Performance should be the same
as idle=poll.
idle=halt. Halt is forced to be used for CPU idle.
In such case C2/C3 won't be used again.
idle=nomwait. Disable mwait for CPU C-states
ide-pci-generic.all-generic-ide [HW] (E)IDE subsystem
Claim all unknown PCI IDE storage controllers.
......@@ -1534,6 +1541,9 @@ and is between 256 and 4096 characters. It is defined in the file
Use with caution as certain devices share
address decoders between ROMs and other
resources.
norom [X86-32,X86_64] Do not assign address space to
expansion ROMs that do not already have
BIOS assigned address ranges.
irqmask=0xMMMM [X86-32] Set a bit mask of IRQs allowed to be
assigned automatically to PCI devices. You can
make the kernel exclude IRQs of your ISA cards
......
......@@ -172,6 +172,7 @@ architectures:
- ia64 (Does not support probes on instruction slot1.)
- sparc64 (Return probes not yet implemented.)
- arm
- ppc
3. Configuring Kprobes
......
......@@ -174,8 +174,6 @@ The LED is exposed through the LED subsystem, and can be found in:
The mail LED is autodetected, so if you don't have one, the LED device won't
be registered.
If you have a mail LED that is not green, please report this to me.
Backlight
*********
......
The PowerPC boot wrapper
------------------------
Copyright (C) Secret Lab Technologies Ltd.
PowerPC image targets compresses and wraps the kernel image (vmlinux) with
a boot wrapper to make it usable by the system firmware. There is no
standard PowerPC firmware interface, so the boot wrapper is designed to
be adaptable for each kind of image that needs to be built.
The boot wrapper can be found in the arch/powerpc/boot/ directory. The
Makefile in that directory has targets for all the available image types.
The different image types are used to support all of the various firmware
interfaces found on PowerPC platforms. OpenFirmware is the most commonly
used firmware type on general purpose PowerPC systems from Apple, IBM and
others. U-Boot is typically found on embedded PowerPC hardware, but there
are a handful of other firmware implementations which are also popular. Each
firmware interface requires a different image format.
The boot wrapper is built from the makefile in arch/powerpc/boot/Makefile and
it uses the wrapper script (arch/powerpc/boot/wrapper) to generate target
image. The details of the build system is discussed in the next section.
Currently, the following image format targets exist:
cuImage.%: Backwards compatible uImage for older version of
U-Boot (for versions that don't understand the device
tree). This image embeds a device tree blob inside
the image. The boot wrapper, kernel and device tree
are all embedded inside the U-Boot uImage file format
with boot wrapper code that extracts data from the old
bd_info structure and loads the data into the device
tree before jumping into the kernel.
Because of the series of #ifdefs found in the
bd_info structure used in the old U-Boot interfaces,
cuImages are platform specific. Each specific
U-Boot platform has a different platform init file
which populates the embedded device tree with data
from the platform specific bd_info file. The platform
specific cuImage platform init code can be found in
arch/powerpc/boot/cuboot.*.c. Selection of the correct
cuImage init code for a specific board can be found in
the wrapper structure.
dtbImage.%: Similar to zImage, except device tree blob is embedded
inside the image instead of provided by firmware. The
output image file can be either an elf file or a flat
binary depending on the platform.
dtbImages are used on systems which do not have an
interface for passing a device tree directly.
dtbImages are similar to simpleImages except that
dtbImages have platform specific code for extracting
data from the board firmware, but simpleImages do not
talk to the firmware at all.
PlayStation 3 support uses dtbImage. So do Embedded
Planet boards using the PlanetCore firmware. Board
specific initialization code is typically found in a
file named arch/powerpc/boot/<platform>.c; but this
can be overridden by the wrapper script.
simpleImage.%: Firmware independent compressed image that does not
depend on any particular firmware interface and embeds
a device tree blob. This image is a flat binary that
can be loaded to any location in RAM and jumped to.
Firmware cannot pass any configuration data to the
kernel with this image type and it depends entirely on
the embedded device tree for all information.
The simpleImage is useful for booting systems with
an unknown firmware interface or for booting from
a debugger when no firmware is present (such as on
the Xilinx Virtex platform). The only assumption that
simpleImage makes is that RAM is correctly initialized
and that the MMU is either off or has RAM mapped to
base address 0.
simpleImage also supports inserting special platform
specific initialization code to the start of the bootup
sequence. The virtex405 platform uses this feature to
ensure that the cache is invalidated before caching
is enabled. Platform specific initialization code is
added as part of the wrapper script and is keyed on
the image target name. For example, all
simpleImage.virtex405-* targets will add the
virtex405-head.S initialization code (This also means
that the dts file for virtex405 targets should be
named (virtex405-<board>.dts). Search the wrapper
script for 'virtex405' and see the file
arch/powerpc/boot/virtex405-head.S for details.
treeImage.%; Image format for used with OpenBIOS firmware found
on some ppc4xx hardware. This image embeds a device
tree blob inside the image.
uImage: Native image format used by U-Boot. The uImage target
does not add any boot code. It just wraps a compressed
vmlinux in the uImage data structure. This image
requires a version of U-Boot that is able to pass
a device tree to the kernel at boot. If using an older
version of U-Boot, then you need to use a cuImage
instead.
zImage.%: Image format which does not embed a device tree.
Used by OpenFirmware and other firmware interfaces
which are able to supply a device tree. This image
expects firmware to provide the device tree at boot.
Typically, if you have general purpose PowerPC
hardware then you want this image format.
Image types which embed a device tree blob (simpleImage, dtbImage, treeImage,
and cuImage) all generate the device tree blob from a file in the
arch/powerpc/boot/dts/ directory. The Makefile selects the correct device
tree source based on the name of the target. Therefore, if the kernel is
built with 'make treeImage.walnut simpleImage.virtex405-ml403', then the
build system will use arch/powerpc/boot/dts/walnut.dts to build
treeImage.walnut and arch/powerpc/boot/dts/virtex405-ml403.dts to build
the simpleImage.virtex405-ml403.
Two special targets called 'zImage' and 'zImage.initrd' also exist. These
targets build all the default images as selected by the kernel configuration.
Default images are selected by the boot wrapper Makefile
(arch/powerpc/boot/Makefile) by adding targets to the $image-y variable. Look
at the Makefile to see which default image targets are available.
How it is built
---------------
arch/powerpc is designed to support multiplatform kernels, which means
that a single vmlinux image can be booted on many different target boards.
It also means that the boot wrapper must be able to wrap for many kinds of
images on a single build. The design decision was made to not use any
conditional compilation code (#ifdef, etc) in the boot wrapper source code.
All of the boot wrapper pieces are buildable at any time regardless of the
kernel configuration. Building all the wrapper bits on every kernel build
also ensures that obscure parts of the wrapper are at the very least compile
tested in a large variety of environments.
The wrapper is adapted for different image types at link time by linking in
just the wrapper bits that are appropriate for the image type. The 'wrapper
script' (found in arch/powerpc/boot/wrapper) is called by the Makefile and
is responsible for selecting the correct wrapper bits for the image type.
The arguments are well documented in the script's comment block, so they
are not repeated here. However, it is worth mentioning that the script
uses the -p (platform) argument as the main method of deciding which wrapper
bits to compile in. Look for the large 'case "$platform" in' block in the
middle of the script. This is also the place where platform specific fixups
can be selected by changing the link order.
In particular, care should be taken when working with cuImages. cuImage
wrapper bits are very board specific and care should be taken to make sure
the target you are trying to build is supported by the wrapper bits.
* Board Control and Status (BCSR)
Required properties:
- device_type : Should be "board-control"
- reg : Offset and length of the register set for the device
Example:
bcsr@f8000000 {
device_type = "board-control";
reg = <f8000000 8000>;
};
* Freescale on board FPGA
This is the memory-mapped registers for on board FPGA.
Required properities:
- compatible : should be "fsl,fpga-pixis".
- reg : should contain the address and the lenght of the FPPGA register
set.
Example (MPC8610HPCD):
board-control@e8000000 {
compatible = "fsl,fpga-pixis";
reg = <0xe8000000 32>;
};
* Freescale Communications Processor Module
NOTE: This is an interim binding, and will likely change slightly,
as more devices are supported. The QE bindings especially are
incomplete.
* Root CPM node
Properties:
- compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe".
- reg : A 48-byte region beginning with CPCR.
Example:
cpm@119c0 {
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
reg = <119c0 30>;
}
* Properties common to mulitple CPM/QE devices
- fsl,cpm-command : This value is ORed with the opcode and command flag
to specify the device on which a CPM command operates.
- fsl,cpm-brg : Indicates which baud rate generator the device
is associated with. If absent, an unused BRG
should be dynamically allocated. If zero, the
device uses an external clock rather than a BRG.
- reg : Unless otherwise specified, the first resource represents the
scc/fcc/ucc registers, and the second represents the device's
parameter RAM region (if it has one).
* Multi-User RAM (MURAM)
The multi-user/dual-ported RAM is expressed as a bus under the CPM node.
Ranges must be set up subject to the following restrictions:
- Children's reg nodes must be offsets from the start of all muram, even
if the user-data area does not begin at zero.
- If multiple range entries are used, the difference between the parent
address and the child address must be the same in all, so that a single
mapping can cover them all while maintaining the ability to determine
CPM-side offsets with pointer subtraction. It is recommended that
multiple range entries not be used.
- A child address of zero must be translatable, even if no reg resources
contain it.
A child "data" node must exist, compatible with "fsl,cpm-muram-data", to
indicate the portion of muram that is usable by the OS for arbitrary
purposes. The data node may have an arbitrary number of reg resources,
all of which contribute to the allocatable muram pool.
Example, based on mpc8272:
muram@0 {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 10000>;
data@0 {
compatible = "fsl,cpm-muram-data";
reg = <0 2000 9800 800>;
};
};
* Baud Rate Generators
Currently defined compatibles:
fsl,cpm-brg
fsl,cpm1-brg
fsl,cpm2-brg
Properties:
- reg : There may be an arbitrary number of reg resources; BRG
numbers are assigned to these in order.
- clock-frequency : Specifies the base frequency driving
the BRG.
Example:
brg@119f0 {
compatible = "fsl,mpc8272-brg",
"fsl,cpm2-brg",
"fsl,cpm-brg";
reg = <119f0 10 115f0 10>;
clock-frequency = <d#25000000>;
};
* I2C
The I2C controller is expressed as a bus under the CPM node.
Properties:
- compatible : "fsl,cpm1-i2c", "fsl,cpm2-i2c"
- reg : On CPM2 devices, the second resource doesn't specify the I2C
Parameter RAM itself, but the I2C_BASE field of the CPM2 Parameter RAM
(typically 0x8afc 0x2).
- #address-cells : Should be one. The cell is the i2c device address with
the r/w bit set to zero.
- #size-cells : Should be zero.
- clock-frequency : Can be used to set the i2c clock frequency. If
unspecified, a default frequency of 60kHz is being used.
The following two properties are deprecated. They are only used by legacy
i2c drivers to find the bus to probe:
- linux,i2c-index : Can be used to hard code an i2c bus number. By default,
the bus number is dynamically assigned by the i2c core.
- linux,i2c-class : Can be used to override the i2c class. The class is used
by legacy i2c device drivers to find a bus in a specific context like
system management, video or sound. By default, I2C_CLASS_HWMON (1) is
being used. The definition of the classes can be found in
include/i2c/i2c.h
Example, based on mpc823:
i2c@860 {
compatible = "fsl,mpc823-i2c",
"fsl,cpm1-i2c";
reg = <0x860 0x20 0x3c80 0x30>;
interrupts = <16>;
interrupt-parent = <&CPM_PIC>;
fsl,cpm-command = <0x10>;
#address-cells = <1>;
#size-cells = <0>;
rtc@68 {
compatible = "dallas,ds1307";
reg = <0x68>;
};
};
* Interrupt Controllers
Currently defined compatibles:
- fsl,cpm1-pic
- only one interrupt cell
- fsl,pq1-pic
- fsl,cpm2-pic
- second interrupt cell is level/sense:
- 2 is falling edge
- 8 is active low
Example:
interrupt-controller@10c00 {
#interrupt-cells = <2>;
interrupt-controller;
reg = <10c00 80>;
compatible = "mpc8272-pic", "fsl,cpm2-pic";
};
* USB (Universal Serial Bus Controller)
Properties:
- compatible : "fsl,cpm1-usb", "fsl,cpm2-usb", "fsl,qe-usb"
Example:
usb@11bc0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,cpm2-usb";
reg = <11b60 18 8b00 100>;
interrupts = <b 8>;
interrupt-parent = <&PIC>;
fsl,cpm-command = <2e600000>;
};
* Network
Currently defined compatibles:
- fsl,cpm1-scc-enet
- fsl,cpm2-scc-enet
- fsl,cpm1-fec-enet
- fsl,cpm2-fcc-enet (third resource is GFEMR)
- fsl,qe-enet
Example:
ethernet@11300 {
device_type = "network";
compatible = "fsl,mpc8272-fcc-enet",
"fsl,cpm2-fcc-enet";
reg = <11300 20 8400 100 11390 1>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <20 8>;
interrupt-parent = <&PIC>;
phy-handle = <&PHY0>;
fsl,cpm-command = <12000300>;
};
* MDIO
Currently defined compatibles:
fsl,pq1-fec-mdio (reg is same as first resource of FEC device)
fsl,cpm2-mdio-bitbang (reg is port C registers)
Properties for fsl,cpm2-mdio-bitbang:
fsl,mdio-pin : pin of port C controlling mdio data
fsl,mdc-pin : pin of port C controlling mdio clock
Example:
mdio@10d40 {
device_type = "mdio";
compatible = "fsl,mpc8272ads-mdio-bitbang",
"fsl,mpc8272-mdio-bitbang",
"fsl,cpm2-mdio-bitbang";
reg = <10d40 14>;
#address-cells = <1>;
#size-cells = <0>;
fsl,mdio-pin = <12>;
fsl,mdc-pin = <13>;
};
* Freescale QUICC Engine module (QE)
This represents qe module that is installed on PowerQUICC II Pro.
NOTE: This is an interim binding; it should be updated to fit
in with the CPM binding later in this document.
Basically, it is a bus of devices, that could act more or less
as a complete entity (UCC, USB etc ). All of them should be siblings on
the "root" qe node, using the common properties from there.
The description below applies to the qe of MPC8360 and
more nodes and properties would be extended in the future.
i) Root QE device
Required properties:
- compatible : should be "fsl,qe";
- model : precise model of the QE, Can be "QE", "CPM", or "CPM2"
- reg : offset and length of the device registers.
- bus-frequency : the clock frequency for QUICC Engine.
Recommended properties
- brg-frequency : the internal clock source frequency for baud-rate
generators in Hz.
Example:
qe@e0100000 {
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
compatible = "fsl,qe";
ranges = <0 e0100000 00100000>;
reg = <e0100000 480>;
brg-frequency = <0>;
bus-frequency = <179A7B00>;
}
* Multi-User RAM (MURAM)
Required properties:
- compatible : should be "fsl,qe-muram", "fsl,cpm-muram".
- mode : the could be "host" or "slave".
- ranges : Should be defined as specified in 1) to describe the
translation of MURAM addresses.
- data-only : sub-node which defines the address area under MURAM
bus that can be allocated as data/parameter
Example:
muram@10000 {
compatible = "fsl,qe-muram", "fsl,cpm-muram";
ranges = <0 00010000 0000c000>;
data-only@0{
compatible = "fsl,qe-muram-data",
"fsl,cpm-muram-data";
reg = <0 c000>;
};
};
* Uploaded QE firmware
If a new firwmare has been uploaded to the QE (usually by the
boot loader), then a 'firmware' child node should be added to the QE
node. This node provides information on the uploaded firmware that
device drivers may need.
Required properties:
- id: The string name of the firmware. This is taken from the 'id'
member of the qe_firmware structure of the uploaded firmware.
Device drivers can search this string to determine if the
firmware they want is already present.
- extended-modes: The Extended Modes bitfield, taken from the
firmware binary. It is a 64-bit number represented
as an array of two 32-bit numbers.
- virtual-traps: The virtual traps, taken from the firmware binary.
It is an array of 8 32-bit numbers.
Example:
firmware {
id = "Soft-UART";
extended-modes = <0 0>;
virtual-traps = <0 0 0 0 0 0 0 0>;
};
* Parallel I/O Ports
This node configures Parallel I/O ports for CPUs with QE support.
The node should reside in the "soc" node of the tree. For each
device that using parallel I/O ports, a child node should be created.
See the definition of the Pin configuration nodes below for more
information.
Required properties:
- device_type : should be "par_io".
- reg : offset to the register set and its length.
- num-ports : number of Parallel I/O ports
Example:
par_io@1400 {
reg = <1400 100>;
#address-cells = <1>;
#size-cells = <0>;
device_type = "par_io";
num-ports = <7>;
ucc_pin@01 {
......
};
Note that "par_io" nodes are obsolete, and should not be used for
the new device trees. Instead, each Par I/O bank should be represented
via its own gpio-controller node:
Required properties:
- #gpio-cells : should be "2".
- compatible : should be "fsl,<chip>-qe-pario-bank",
"fsl,mpc8323-qe-pario-bank".
- reg : offset to the register set and its length.
- gpio-controller : node to identify gpio controllers.
Example:
qe_pio_a: gpio-controller@1400 {
#gpio-cells = <2>;
compatible = "fsl,mpc8360-qe-pario-bank",
"fsl,mpc8323-qe-pario-bank";
reg = <0x1400 0x18>;
gpio-controller;
};
qe_pio_e: gpio-controller@1460 {
#gpio-cells = <2>;
compatible = "fsl,mpc8360-qe-pario-bank",
"fsl,mpc8323-qe-pario-bank";
reg = <0x1460 0x18>;
gpio-controller;
};
* Pin configuration nodes
Required properties:
- linux,phandle : phandle of this node; likely referenced by a QE
device.
- pio-map : array of pin configurations. Each pin is defined by 6
integers. The six numbers are respectively: port, pin, dir,
open_drain, assignment, has_irq.
- port : port number of the pin; 0-6 represent port A-G in UM.
- pin : pin number in the port.
- dir : direction of the pin, should encode as follows:
0 = The pin is disabled
1 = The pin is an output
2 = The pin is an input
3 = The pin is I/O
- open_drain : indicates the pin is normal or wired-OR:
0 = The pin is actively driven as an output
1 = The pin is an open-drain driver. As an output, the pin is
driven active-low, otherwise it is three-stated.
- assignment : function number of the pin according to the Pin Assignment
tables in User Manual. Each pin can have up to 4 possible functions in
QE and two options for CPM.
- has_irq : indicates if the pin is used as source of external
interrupts.
Example:
ucc_pin@01 {
linux,phandle = <140001>;
pio-map = <
/* port pin dir open_drain assignment has_irq */
0 3 1 0 1 0 /* TxD0 */
0 4 1 0 1 0 /* TxD1 */
0 5 1 0 1 0 /* TxD2 */
0 6 1 0 1 0 /* TxD3 */
1 6 1 0 3 0 /* TxD4 */
1 7 1 0 1 0 /* TxD5 */
1 9 1 0 2 0 /* TxD6 */
1 a 1 0 2 0 /* TxD7 */
0 9 2 0 1 0 /* RxD0 */
0 a 2 0 1 0 /* RxD1 */
0 b 2 0 1 0 /* RxD2 */
0 c 2 0 1 0 /* RxD3 */
0 d 2 0 1 0 /* RxD4 */
1 1 2 0 2 0 /* RxD5 */
1 0 2 0 2 0 /* RxD6 */
1 4 2 0 2 0 /* RxD7 */
0 7 1 0 1 0 /* TX_EN */
0 8 1 0 1 0 /* TX_ER */
0 f 2 0 1 0 /* RX_DV */
0 10 2 0 1 0 /* RX_ER */
0 0 2 0 1 0 /* RX_CLK */
2 9 1 0 3 0 /* GTX_CLK - CLK10 */
2 8 2 0 1 0>; /* GTX125 - CLK9 */
};
* UCC (Unified Communications Controllers)
Required properties:
- device_type : should be "network", "hldc", "uart", "transparent"
"bisync", "atm", or "serial".
- compatible : could be "ucc_geth" or "fsl_atm" and so on.
- cell-index : the ucc number(1-8), corresponding to UCCx in UM.
- reg : Offset and length of the register set for the device
- interrupts : <a b> where a is the interrupt number and b is a
field that represents an encoding of the sense and level
information for the interrupt. This should be encoded based on
the information in section 2) depending on the type of interrupt
controller you have.
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
- pio-handle : The phandle for the Parallel I/O port configuration.
- port-number : for UART drivers, the port number to use, between 0 and 3.
This usually corresponds to the /dev/ttyQE device, e.g. <0> = /dev/ttyQE0.
The port number is added to the minor number of the device. Unlike the
CPM UART driver, the port-number is required for the QE UART driver.
- soft-uart : for UART drivers, if specified this means the QE UART device
driver should use "Soft-UART" mode, which is needed on some SOCs that have
broken UART hardware. Soft-UART is provided via a microcode upload.
- rx-clock-name: the UCC receive clock source
"none": clock source is disabled
"brg1" through "brg16": clock source is BRG1-BRG16, respectively
"clk1" through "clk24": clock source is CLK1-CLK24, respectively
- tx-clock-name: the UCC transmit clock source
"none": clock source is disabled
"brg1" through "brg16": clock source is BRG1-BRG16, respectively
"clk1" through "clk24": clock source is CLK1-CLK24, respectively
The following two properties are deprecated. rx-clock has been replaced
with rx-clock-name, and tx-clock has been replaced with tx-clock-name.
Drivers that currently use the deprecated properties should continue to
do so, in order to support older device trees, but they should be updated
to check for the new properties first.
- rx-clock : represents the UCC receive clock source.
0x00 : clock source is disabled;
0x1~0x10 : clock source is BRG1~BRG16 respectively;
0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively.
- tx-clock: represents the UCC transmit clock source;
0x00 : clock source is disabled;
0x1~0x10 : clock source is BRG1~BRG16 respectively;
0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively.
Required properties for network device_type:
- mac-address : list of bytes representing the ethernet address.
- phy-handle : The phandle for the PHY connected to this controller.
Recommended properties:
- phy-connection-type : a string naming the controller/PHY interface type,
i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id" (Internal
Delay), "rgmii-txid" (delay on TX only), "rgmii-rxid" (delay on RX only),
"tbi", or "rtbi".
Example:
ucc@2000 {
device_type = "network";
compatible = "ucc_geth";
cell-index = <1>;
reg = <2000 200>;
interrupts = <a0 0>;
interrupt-parent = <700>;
mac-address = [ 00 04 9f 00 23 23 ];
rx-clock = "none";
tx-clock = "clk9";
phy-handle = <212000>;
phy-connection-type = "gmii";
pio-handle = <140001>;
};
* USB (Universal Serial Bus Controller)
Required properties:
- compatible : could be "qe_udc" or "fhci-hcd".
- mode : the could be "host" or "slave".
- reg : Offset and length of the register set for the device
- interrupts : <a b> where a is the interrupt number and b is a
field that represents an encoding of the sense and level
information for the interrupt. This should be encoded based on
the information in section 2) depending on the type of interrupt
controller you have.
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
Example(slave):
usb@6c0 {
compatible = "qe_udc";
reg = <6c0 40>;
interrupts = <8b 0>;
interrupt-parent = <700>;
mode = "slave";
};
* Serial
Currently defined compatibles:
- fsl,cpm1-smc-uart
- fsl,cpm2-smc-uart
- fsl,cpm1-scc-uart
- fsl,cpm2-scc-uart
- fsl,qe-uart
Example:
serial@11a00 {
device_type = "serial";
compatible = "fsl,mpc8272-scc-uart",
"fsl,cpm2-scc-uart";
reg = <11a00 20 8000 100>;
interrupts = <28 8>;
interrupt-parent = <&PIC>;
fsl,cpm-brg = <1>;
fsl,cpm-command = <00800000>;
};
* Freescale Display Interface Unit
The Freescale DIU is a LCD controller, with proper hardware, it can also
drive DVI monitors.
Required properties:
- compatible : should be "fsl-diu".
- reg : should contain at least address and length of the DIU register
set.
- Interrupts : one DIU interrupt should be describe here.
Example (MPC8610HPCD):
display@2c000 {
compatible = "fsl,diu";
reg = <0x2c000 100>;
interrupts = <72 2>;
interrupt-parent = <&mpic>;
};
* Freescale 83xx DMA Controller
Freescale PowerPC 83xx have on chip general purpose DMA controllers.
Required properties:
- compatible : compatible list, contains 2 entries, first is
"fsl,CHIP-dma", where CHIP is the processor
(mpc8349, mpc8360, etc.) and the second is
"fsl,elo-dma"
- reg : <registers mapping for DMA general status reg>
- ranges : Should be defined as specified in 1) to describe the
DMA controller channels.
- cell-index : controller index. 0 for controller @ 0x8100
- interrupts : <interrupt mapping for DMA IRQ>
- interrupt-parent : optional, if needed for interrupt mapping
- DMA channel nodes:
- compatible : compatible list, contains 2 entries, first is
"fsl,CHIP-dma-channel", where CHIP is the processor
(mpc8349, mpc8350, etc.) and the second is
"fsl,elo-dma-channel"
- reg : <registers mapping for channel>
- cell-index : dma channel index starts at 0.
Optional properties:
- interrupts : <interrupt mapping for DMA channel IRQ>
(on 83xx this is expected to be identical to
the interrupts property of the parent node)
- interrupt-parent : optional, if needed for interrupt mapping
Example:
dma@82a8 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
reg = <82a8 4>;
ranges = <0 8100 1a4>;
interrupt-parent = <&ipic>;
interrupts = <47 8>;
cell-index = <0>;
dma-channel@0 {
compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
cell-index = <0>;
reg = <0 80>;
};
dma-channel@80 {
compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
cell-index = <1>;
reg = <80 80>;
};
dma-channel@100 {
compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
cell-index = <2>;
reg = <100 80>;
};
dma-channel@180 {
compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
cell-index = <3>;
reg = <180 80>;
};
};
* Freescale 85xx/86xx DMA Controller
Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
Required properties:
- compatible : compatible list, contains 2 entries, first is
"fsl,CHIP-dma", where CHIP is the processor
(mpc8540, mpc8540, etc.) and the second is
"fsl,eloplus-dma"
- reg : <registers mapping for DMA general status reg>
- cell-index : controller index. 0 for controller @ 0x21000,
1 for controller @ 0xc000
- ranges : Should be defined as specified in 1) to describe the
DMA controller channels.
- DMA channel nodes:
- compatible : compatible list, contains 2 entries, first is
"fsl,CHIP-dma-channel", where CHIP is the processor
(mpc8540, mpc8560, etc.) and the second is
"fsl,eloplus-dma-channel"
- cell-index : dma channel index starts at 0.
- reg : <registers mapping for channel>
- interrupts : <interrupt mapping for DMA channel IRQ>
- interrupt-parent : optional, if needed for interrupt mapping
Example:
dma@21300 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
reg = <21300 4>;
ranges = <0 21100 200>;
cell-index = <0>;
dma-channel@0 {
compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
reg = <0 80>;
cell-index = <0>;
interrupt-parent = <&mpic>;
interrupts = <14 2>;
};
dma-channel@80 {
compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
reg = <80 80>;
cell-index = <1>;
interrupt-parent = <&mpic>;
interrupts = <15 2>;
};
dma-channel@100 {
compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
reg = <100 80>;
cell-index = <2>;
interrupt-parent = <&mpic>;
interrupts = <16 2>;
};
dma-channel@180 {
compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
reg = <180 80>;
cell-index = <3>;
interrupt-parent = <&mpic>;
interrupts = <17 2>;
};
};
* Freescale General-purpose Timers Module
Required properties:
- compatible : should be
"fsl,<chip>-gtm", "fsl,gtm" for SOC GTMs
"fsl,<chip>-qe-gtm", "fsl,qe-gtm", "fsl,gtm" for QE GTMs
"fsl,<chip>-cpm2-gtm", "fsl,cpm2-gtm", "fsl,gtm" for CPM2 GTMs
- reg : should contain gtm registers location and length (0x40).
- interrupts : should contain four interrupts.
- interrupt-parent : interrupt source phandle.
- clock-frequency : specifies the frequency driving the timer.
Example:
timer@500 {
compatible = "fsl,mpc8360-gtm", "fsl,gtm";
reg = <0x500 0x40>;
interrupts = <90 8 78 8 84 8 72 8>;
interrupt-parent = <&ipic>;
/* filled by u-boot */
clock-frequency = <0>;
};
timer@440 {
compatible = "fsl,mpc8360-qe-gtm", "fsl,qe-gtm", "fsl,gtm";
reg = <0x440 0x40>;
interrupts = <12 13 14 15>;
interrupt-parent = <&qeic>;
/* filled by u-boot */
clock-frequency = <0>;
};
* Global Utilities Block
The global utilities block controls power management, I/O device
enabling, power-on-reset configuration monitoring, general-purpose
I/O signal configuration, alternate function selection for multiplexed
signals, and clock control.
Required properties:
- compatible : Should define the compatible device type for
global-utilities.
- reg : Offset and length of the register set for the device.
Recommended properties:
- fsl,has-rstcr : Indicates that the global utilities register set
contains a functioning "reset control register" (i.e. the board
is wired to reset upon setting the HRESET_REQ bit in this register).
Example:
global-utilities@e0000 { /* global utilities block */
compatible = "fsl,mpc8548-guts";
reg = <e0000 1000>;
fsl,has-rstcr;
};
* I2C
Required properties :
- device_type : Should be "i2c"
- reg : Offset and length of the register set for the device
Recommended properties :
- compatible : Should be "fsl-i2c" for parts compatible with
Freescale I2C specifications.
- interrupts : <a b> where a is the interrupt number and b is a
field that represents an encoding of the sense and level
information for the interrupt. This should be encoded based on
the information in section 2) depending on the type of interrupt
controller you have.
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
- dfsrr : boolean; if defined, indicates that this I2C device has
a digital filter sampling rate register
- fsl5200-clocking : boolean; if defined, indicated that this device
uses the FSL 5200 clocking mechanism.
Example :
i2c@3000 {
interrupt-parent = <40000>;
interrupts = <1b 3>;
reg = <3000 18>;
device_type = "i2c";
compatible = "fsl-i2c";
dfsrr;
};
* Chipselect/Local Bus
Properties:
- name : Should be localbus
- #address-cells : Should be either two or three. The first cell is the
chipselect number, and the remaining cells are the
offset into the chipselect.
- #size-cells : Either one or two, depending on how large each chipselect
can be.
- ranges : Each range corresponds to a single chipselect, and cover
the entire access window as configured.
Example:
localbus@f0010100 {
compatible = "fsl,mpc8272-localbus",
"fsl,pq2-localbus";
#address-cells = <2>;
#size-cells = <1>;
reg = <f0010100 40>;
ranges = <0 0 fe000000 02000000
1 0 f4500000 00008000>;
flash@0,0 {
compatible = "jedec-flash";
reg = <0 0 2000000>;
bank-width = <4>;
device-width = <1>;
};
board-control@1,0 {
reg = <1 0 20>;
compatible = "fsl,mpc8272ads-bcsr";
};
};
* Freescale MSI interrupt controller
Reguired properities:
- compatible : compatible list, contains 2 entries,
first is "fsl,CHIP-msi", where CHIP is the processor(mpc8610, mpc8572,
etc.) and the second is "fsl,mpic-msi" or "fsl,ipic-msi" depending on
the parent type.
- reg : should contain the address and the length of the shared message
interrupt register set.
- msi-available-ranges: use <start count> style section to define which
msi interrupt can be used in the 256 msi interrupts. This property is
optional, without this, all the 256 MSI interrupts can be used.
- interrupts : each one of the interrupts here is one entry per 32 MSIs,
and routed to the host interrupt controller. the interrupts should
be set as edge sensitive.
- interrupt-parent: the phandle for the interrupt controller
that services interrupts for this device. for 83xx cpu, the interrupts
are routed to IPIC, and for 85xx/86xx cpu the interrupts are routed
to MPIC.
Example:
msi@41600 {
compatible = "fsl,mpc8610-msi", "fsl,mpic-msi";
reg = <0x41600 0x80>;
msi-available-ranges = <0 0x100>;
interrupts = <
0xe0 0
0xe1 0
0xe2 0
0xe3 0
0xe4 0
0xe5 0
0xe6 0
0xe7 0>;
interrupt-parent = <&mpic>;
};
* Freescale 8xxx/3.0 Gb/s SATA nodes
SATA nodes are defined to describe on-chip Serial ATA controllers.
Each SATA port should have its own node.
Required properties:
- compatible : compatible list, contains 2 entries, first is
"fsl,CHIP-sata", where CHIP is the processor
(mpc8315, mpc8379, etc.) and the second is
"fsl,pq-sata"
- interrupts : <interrupt mapping for SATA IRQ>
- cell-index : controller index.
1 for controller @ 0x18000
2 for controller @ 0x19000
3 for controller @ 0x1a000
4 for controller @ 0x1b000
Optional properties:
- interrupt-parent : optional, if needed for interrupt mapping
- reg : <registers mapping>
Example:
sata@18000 {
compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
reg = <0x18000 0x1000>;
cell-index = <1>;
interrupts = <2c 8>;
interrupt-parent = < &ipic >;
};
Freescale SoC SEC Security Engines
Required properties:
- compatible : Should contain entries for this and backward compatible
SEC versions, high to low, e.g., "fsl,sec2.1", "fsl,sec2.0"
- reg : Offset and length of the register set for the device
- interrupts : the SEC's interrupt number
- fsl,num-channels : An integer representing the number of channels
available.
- fsl,channel-fifo-len : An integer representing the number of
descriptor pointers each channel fetch fifo can hold.
- fsl,exec-units-mask : The bitmask representing what execution units
(EUs) are available. It's a single 32-bit cell. EU information
should be encoded following the SEC's Descriptor Header Dword
EU_SEL0 field documentation, i.e. as follows:
bit 0 = reserved - should be 0
bit 1 = set if SEC has the ARC4 EU (AFEU)
bit 2 = set if SEC has the DES/3DES EU (DEU)
bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
bit 4 = set if SEC has the random number generator EU (RNG)
bit 5 = set if SEC has the public key EU (PKEU)
bit 6 = set if SEC has the AES EU (AESU)
bit 7 = set if SEC has the Kasumi EU (KEU)
bit 8 = set if SEC has the CRC EU (CRCU)
bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
remaining bits are reserved for future SEC EUs.
- fsl,descriptor-types-mask : The bitmask representing what descriptors
are available. It's a single 32-bit cell. Descriptor type information
should be encoded following the SEC's Descriptor Header Dword DESC_TYPE
field documentation, i.e. as follows:
bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
bit 1 = set if SEC supports the ipsec_esp descriptor type
bit 2 = set if SEC supports the common_nonsnoop desc. type
bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
bit 5 = set if SEC supports the srtp descriptor type
bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
bit 7 = set if SEC supports the pkeu_assemble descriptor type
bit 8 = set if SEC supports the aesu_key_expand_output desc.type
bit 9 = set if SEC supports the pkeu_ptmul descriptor type
bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
..and so on and so forth.
Optional properties:
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
Example:
/* MPC8548E */
crypto@30000 {
compatible = "fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <29 2>;
interrupt-parent = <&mpic>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0xfe>;
fsl,descriptor-types-mask = <0x12b0ebf>;
};
* SPI (Serial Peripheral Interface)
Required properties:
- cell-index : SPI controller index.
- compatible : should be "fsl,spi".
- mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
- reg : Offset and length of the register set for the device
- interrupts : <a b> where a is the interrupt number and b is a
field that represents an encoding of the sense and level
information for the interrupt. This should be encoded based on
the information in section 2) depending on the type of interrupt
controller you have.
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
Example:
spi@4c0 {
cell-index = <0>;
compatible = "fsl,spi";
reg = <4c0 40>;
interrupts = <82 0>;
interrupt-parent = <700>;
mode = "cpu";
};
Freescale Synchronous Serial Interface
The SSI is a serial device that communicates with audio codecs. It can
be programmed in AC97, I2S, left-justified, or right-justified modes.
Required properties:
- compatible : compatible list, containing "fsl,ssi"
- cell-index : the SSI, <0> = SSI1, <1> = SSI2, and so on
- reg : offset and length of the register set for the device
- interrupts : <a b> where a is the interrupt number and b is a
field that represents an encoding of the sense and
level information for the interrupt. This should be
encoded based on the information in section 2)
depending on the type of interrupt controller you
have.
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
- fsl,mode : the operating mode for the SSI interface
"i2s-slave" - I2S mode, SSI is clock slave
"i2s-master" - I2S mode, SSI is clock master
"lj-slave" - left-justified mode, SSI is clock slave
"lj-master" - l.j. mode, SSI is clock master
"rj-slave" - right-justified mode, SSI is clock slave
"rj-master" - r.j., SSI is clock master
"ac97-slave" - AC97 mode, SSI is clock slave
"ac97-master" - AC97 mode, SSI is clock master
Optional properties:
- codec-handle : phandle to a 'codec' node that defines an audio
codec connected to this SSI. This node is typically
a child of an I2C or other control node.
Child 'codec' node required properties:
- compatible : compatible list, contains the name of the codec
Child 'codec' node optional properties:
- clock-frequency : The frequency of the input clock, which typically
comes from an on-board dedicated oscillator.
* MDIO IO device
The MDIO is a bus to which the PHY devices are connected. For each
device that exists on this bus, a child node should be created. See
the definition of the PHY node below for an example of how to define
a PHY.
Required properties:
- reg : Offset and length of the register set for the device
- compatible : Should define the compatible device type for the
mdio. Currently, this is most likely to be "fsl,gianfar-mdio"
Example:
mdio@24520 {
reg = <24520 20>;
compatible = "fsl,gianfar-mdio";
ethernet-phy@0 {
......
};
};
* Gianfar-compatible ethernet nodes
Required properties:
- device_type : Should be "network"
- model : Model of the device. Can be "TSEC", "eTSEC", or "FEC"
- compatible : Should be "gianfar"
- reg : Offset and length of the register set for the device
- mac-address : List of bytes representing the ethernet address of
this controller
- interrupts : <a b> where a is the interrupt number and b is a
field that represents an encoding of the sense and level
information for the interrupt. This should be encoded based on
the information in section 2) depending on the type of interrupt
controller you have.
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
- phy-handle : The phandle for the PHY connected to this ethernet
controller.
- fixed-link : <a b c d e> where a is emulated phy id - choose any,
but unique to the all specified fixed-links, b is duplex - 0 half,
1 full, c is link speed - d#10/d#100/d#1000, d is pause - 0 no
pause, 1 pause, e is asym_pause - 0 no asym_pause, 1 asym_pause.
Recommended properties:
- phy-connection-type : a string naming the controller/PHY interface type,
i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id", "sgmii",
"tbi", or "rtbi". This property is only really needed if the connection
is of type "rgmii-id", as all other connection types are detected by
hardware.
Example:
ethernet@24000 {
#size-cells = <0>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <24000 1000>;
mac-address = [ 00 E0 0C 00 73 00 ];
interrupts = <d 3 e 3 12 3>;
interrupt-parent = <40000>;
phy-handle = <2452000>
};
Freescale SOC USB controllers
The device node for a USB controller that is part of a Freescale
SOC is as described in the document "Open Firmware Recommended
Practice : Universal Serial Bus" with the following modifications
and additions :
Required properties :
- compatible : Should be "fsl-usb2-mph" for multi port host USB
controllers, or "fsl-usb2-dr" for dual role USB controllers
- phy_type : For multi port host USB controllers, should be one of
"ulpi", or "serial". For dual role USB controllers, should be
one of "ulpi", "utmi", "utmi_wide", or "serial".
- reg : Offset and length of the register set for the device
- port0 : boolean; if defined, indicates port0 is connected for
fsl-usb2-mph compatible controllers. Either this property or
"port1" (or both) must be defined for "fsl-usb2-mph" compatible
controllers.
- port1 : boolean; if defined, indicates port1 is connected for
fsl-usb2-mph compatible controllers. Either this property or
"port0" (or both) must be defined for "fsl-usb2-mph" compatible
controllers.
- dr_mode : indicates the working mode for "fsl-usb2-dr" compatible
controllers. Can be "host", "peripheral", or "otg". Default to
"host" if not defined for backward compatibility.
Recommended properties :
- interrupts : <a b> where a is the interrupt number and b is a
field that represents an encoding of the sense and level
information for the interrupt. This should be encoded based on
the information in section 2) depending on the type of interrupt
controller you have.
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
Example multi port host USB controller device node :
usb@22000 {
compatible = "fsl-usb2-mph";
reg = <22000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <27 1>;
phy_type = "ulpi";
port0;
port1;
};
Example dual role USB controller device node :
usb@23000 {
compatible = "fsl-usb2-dr";
reg = <23000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <26 1>;
dr_mode = "otg";
phy = "ulpi";
};
......@@ -56,19 +56,33 @@ Supported Cards/Chipsets
9005:0285:9005:02d1 Adaptec 5405 (Voodoo40)
9005:0285:15d9:02d2 SMC AOC-USAS-S8i-LP
9005:0285:15d9:02d3 SMC AOC-USAS-S8iR-LP
9005:0285:9005:02d4 Adaptec 2045 (Voodoo04 Lite)
9005:0285:9005:02d5 Adaptec 2405 (Voodoo40 Lite)
9005:0285:9005:02d6 Adaptec 2445 (Voodoo44 Lite)
9005:0285:9005:02d7 Adaptec 2805 (Voodoo80 Lite)
9005:0285:9005:02d4 Adaptec ASR-2045 (Voodoo04 Lite)
9005:0285:9005:02d5 Adaptec ASR-2405 (Voodoo40 Lite)
9005:0285:9005:02d6 Adaptec ASR-2445 (Voodoo44 Lite)
9005:0285:9005:02d7 Adaptec ASR-2805 (Voodoo80 Lite)
9005:0285:9005:02d8 Adaptec 5405G (Voodoo40 PM)
9005:0285:9005:02d9 Adaptec 5445G (Voodoo44 PM)
9005:0285:9005:02da Adaptec 5805G (Voodoo80 PM)
9005:0285:9005:02db Adaptec 5085G (Voodoo08 PM)
9005:0285:9005:02dc Adaptec 51245G (Voodoo124 PM)
9005:0285:9005:02dd Adaptec 51645G (Voodoo164 PM)
9005:0285:9005:02de Adaptec 52445G (Voodoo244 PM)
9005:0285:9005:02df Adaptec ASR-2045G (Voodoo04 Lite PM)
9005:0285:9005:02e0 Adaptec ASR-2405G (Voodoo40 Lite PM)
9005:0285:9005:02e1 Adaptec ASR-2445G (Voodoo44 Lite PM)
9005:0285:9005:02e2 Adaptec ASR-2805G (Voodoo80 Lite PM)
1011:0046:9005:0364 Adaptec 5400S (Mustang)
1011:0046:9005:0365 Adaptec 5400S (Mustang)
9005:0287:9005:0800 Adaptec Themisto (Jupiter)
9005:0200:9005:0200 Adaptec Themisto (Jupiter)
9005:0286:9005:0800 Adaptec Callisto (Jupiter)
1011:0046:9005:1364 Dell PERC 2/QC (Quad Channel, Mustang)
1011:0046:9005:1365 Dell PERC 2/QC (Quad Channel, Mustang)
1028:0001:1028:0001 Dell PERC 2/Si (Iguana)
1028:0003:1028:0003 Dell PERC 3/Si (SlimFast)
1028:0002:1028:0002 Dell PERC 3/Di (Opal)
1028:0004:1028:0004 Dell PERC 3/DiF (Iguana)
1028:0004:1028:0004 Dell PERC 3/SiF (Iguana)
1028:0004:1028:00d0 Dell PERC 3/DiF (Iguana)
1028:0002:1028:00d1 Dell PERC 3/DiV (Viper)
1028:0002:1028:00d9 Dell PERC 3/DiL (Lexus)
1028:000a:1028:0106 Dell PERC 3/DiJ (Jaguar)
......
......@@ -216,8 +216,8 @@ W: http://code.google.com/p/aceracpi
S: Maintained
ACPI
P: Len Brown
M: len.brown@intel.com
P: Andi Kleen
M: ak@linux.intel.com
M: lenb@kernel.org
L: linux-acpi@vger.kernel.org
W: http://www.lesswatts.org/projects/acpi/
......@@ -239,8 +239,8 @@ W: http://www.lesswatts.org/projects/acpi/
S: Supported
ACPI FAN DRIVER
P: Len Brown
M: len.brown@intel.com
P: Zhang Rui
M: rui.zhang@intel.com
L: linux-acpi@vger.kernel.org
W: http://www.lesswatts.org/projects/acpi/
S: Supported
......@@ -248,18 +248,18 @@ S: Supported
ACPI PCI HOTPLUG DRIVER
P: Kristen Carlson Accardi
M: kristen.c.accardi@intel.com
L: pcihpd-discuss@lists.sourceforge.net
L: linux-pci@vger.kernel.org
S: Supported
ACPI THERMAL DRIVER
P: Len Brown
M: len.brown@intel.com
P: Zhang Rui
M: rui.zhang@intel.com
L: linux-acpi@vger.kernel.org
W: http://www.lesswatts.org/projects/acpi/
S: Supported
ACPI VIDEO DRIVER
P: Rui Zhang
P: Zhang Rui
M: rui.zhang@intel.com
L: linux-acpi@vger.kernel.org
W: http://www.lesswatts.org/projects/acpi/
......@@ -348,7 +348,9 @@ W: http://www.linux-usb.org/SpeedTouch/
S: Maintained
ALCHEMY AU1XX0 MMC DRIVER
S: Orphan
P: Manuel Lauss
M: manuel.lauss@gmail.com
S: Maintained
ALI1563 I2C DRIVER
P: Rudolf Marek
......@@ -1143,23 +1145,28 @@ COMPACTPCI HOTPLUG CORE
P: Scott Murray
M: scottm@somanetworks.com
M: scott@spiteful.org
L: pcihpd-discuss@lists.sourceforge.net
L: linux-pci@vger.kernel.org
S: Supported
COMPACTPCI HOTPLUG ZIATECH ZT5550 DRIVER
P: Scott Murray
M: scottm@somanetworks.com
M: scott@spiteful.org
L: pcihpd-discuss@lists.sourceforge.net
L: linux-pci@vger.kernel.org
S: Supported
COMPACTPCI HOTPLUG GENERIC DRIVER
P: Scott Murray
M: scottm@somanetworks.com
M: scott@spiteful.org
L: pcihpd-discuss@lists.sourceforge.net
L: linux-pci@vger.kernel.org
S: Supported
COMPAL LAPTOP SUPPORT
P: Cezary Jackiewicz
M: cezary.jackiewicz@gmail.com
S: Maintained
COMPUTONE INTELLIPORT MULTIPORT CARD
P: Michael H. Warfield
M: mhw@wittsend.com
......@@ -1787,6 +1794,12 @@ P: David Howells
M: dhowells@redhat.com
S: Maintained
FUJITSU LAPTOP EXTRAS
P: Jonathan Woithe
M: jwoithe@physics.adelaide.edu.au
L: linux-acpi@vger.kernel.org
S: Maintained
FUSE: FILESYSTEM IN USERSPACE
P: Miklos Szeredi
M: miklos@szeredi.hu
......@@ -2325,6 +2338,16 @@ L: linux-mtd@lists.infradead.org
W: http://www.linux-mtd.infradead.org/doc/jffs2.html
S: Maintained
UBI FILE SYSTEM (UBIFS)
P: Artem Bityutskiy
M: dedekind@infradead.org
P: Adrian Hunter
M: ext-adrian.hunter@nokia.com
L: linux-mtd@lists.infradead.org
T: git git://git.infradead.org/~dedekind/ubifs-2.6.git
W: http://www.linux-mtd.infradead.org/doc/ubifs.html
S: Maintained
JFS FILESYSTEM
P: Dave Kleikamp
M: shaggy@austin.ibm.com
......@@ -2521,13 +2544,11 @@ W: http://www.penguinppc.org/
L: linuxppc-dev@ozlabs.org
S: Maintained
LINUX FOR POWERPC EMBEDDED MPC52XX
LINUX FOR POWERPC EMBEDDED MPC5XXX
P: Sylvain Munaut
M: tnt@246tNt.com
P: Grant Likely
M: grant.likely@secretlab.ca
W: http://www.246tNt.com/mpc52xx/
W: http://www.penguinppc.org/
L: linuxppc-dev@ozlabs.org
S: Maintained
......@@ -3198,7 +3219,7 @@ S: Supported
PCIE HOTPLUG DRIVER
P: Kristen Carlson Accardi
M: kristen.c.accardi@intel.com
L: pcihpd-discuss@lists.sourceforge.net
L: linux-pci@vger.kernel.org
S: Supported
PCMCIA SUBSYSTEM
......@@ -3540,6 +3561,13 @@ L: linux-s390@vger.kernel.org
W: http://www.ibm.com/developerworks/linux/linux390/
S: Supported
S3C24XX SD/MMC Driver
P: Ben Dooks
M: ben-linux@fluff.org
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
L: linux-kernel@vger.kernel.org
S: Supported
SAA7146 VIDEO4LINUX-2 DRIVER
P: Michael Hunold
M: michael@mihu.de
......@@ -3612,6 +3640,12 @@ P: Jim Cromie
M: jim.cromie@gmail.com
S: Maintained
SDRICOH_CS MMC/SD HOST CONTROLLER INTERFACE DRIVER
P: Sascha Sommer
M: saschasommer@freenet.de
L: sdricohcs-devel@lists.sourceforge.net (subscribers-only)
S: Maintained
SECURITY CONTACT
P: Security Officers
M: security@kernel.org
......@@ -3831,7 +3865,7 @@ S: Maintained
SHPC HOTPLUG DRIVER
P: Kristen Carlson Accardi
M: kristen.c.accardi@intel.com
L: pcihpd-discuss@lists.sourceforge.net
L: linux-pci@vger.kernel.org
S: Supported
SECURE DIGITAL HOST CONTROLLER INTERFACE DRIVER
......
......@@ -507,6 +507,8 @@ else
KBUILD_CFLAGS += -O2
endif
include $(srctree)/arch/$(SRCARCH)/Makefile
ifneq (CONFIG_FRAME_WARN,0)
KBUILD_CFLAGS += $(call cc-option,-Wframe-larger-than=${CONFIG_FRAME_WARN})
endif
......@@ -515,8 +517,6 @@ endif
# Arch Makefiles may override this setting
KBUILD_CFLAGS += $(call cc-option, -fno-stack-protector)
include $(srctree)/arch/$(SRCARCH)/Makefile
ifdef CONFIG_FRAME_POINTER
KBUILD_CFLAGS += -fno-omit-frame-pointer -fno-optimize-sibling-calls
else
......
......@@ -19,6 +19,7 @@
#include <linux/leds.h>
#include <linux/spi/spi.h>
#include <asm/atmel-mci.h>
#include <asm/io.h>
#include <asm/setup.h>
......@@ -51,6 +52,11 @@ static struct spi_board_info spi0_board_info[] __initdata = {
},
};
static struct mci_platform_data __initdata mci0_data = {
.detect_pin = GPIO_PIN_PC(25),
.wp_pin = GPIO_PIN_PE(0),
};
/*
* The next two functions should go away as the boot loader is
* supposed to initialize the macb address registers with a valid
......@@ -170,6 +176,7 @@ static int __init atngw100_init(void)
set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
at32_add_device_mci(0, &mci0_data);
at32_add_device_usba(0, NULL);
for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
......
......@@ -234,6 +234,9 @@ static int __init atstk1002_init(void)
#ifdef CONFIG_BOARD_ATSTK100X_SPI1
at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
#endif
#ifndef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
at32_add_device_mci(0, NULL);
#endif
#ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
#else
......
......@@ -14,6 +14,7 @@
#include <linux/spi/spi.h>
#include <linux/usb/atmel_usba_udc.h>
#include <asm/atmel-mci.h>
#include <asm/io.h>
#include <asm/irq.h>
......@@ -1278,20 +1279,32 @@ static struct clk atmel_mci0_pclk = {
.index = 9,
};
struct platform_device *__init at32_add_device_mci(unsigned int id)
struct platform_device *__init
at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
{
struct platform_device *pdev;
struct mci_platform_data _data;
struct platform_device *pdev;
struct dw_dma_slave *dws;
if (id != 0)
return NULL;
pdev = platform_device_alloc("atmel_mci", id);
if (!pdev)
return NULL;
goto fail;
if (platform_device_add_resources(pdev, atmel_mci0_resource,
ARRAY_SIZE(atmel_mci0_resource)))
goto err_add_resources;
goto fail;
if (!data) {
data = &_data;
memset(data, 0, sizeof(struct mci_platform_data));
}
if (platform_device_add_data(pdev, data,
sizeof(struct mci_platform_data)))
goto fail;
select_peripheral(PA(10), PERIPH_A, 0); /* CLK */
select_peripheral(PA(11), PERIPH_A, 0); /* CMD */
......@@ -1300,12 +1313,19 @@ struct platform_device *__init at32_add_device_mci(unsigned int id)
select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */
select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */
if (data) {
if (data->detect_pin != GPIO_PIN_NONE)
at32_select_gpio(data->detect_pin, 0);
if (data->wp_pin != GPIO_PIN_NONE)
at32_select_gpio(data->wp_pin, 0);
}
atmel_mci0_pclk.dev = &pdev->dev;
platform_device_add(pdev);
return pdev;
err_add_resources:
fail:
platform_device_put(pdev);
return NULL;
}
......
......@@ -19,36 +19,6 @@
#include "pci-frv.h"
#if 0
void
pcibios_update_resource(struct pci_dev *dev, struct resource *root,
struct resource *res, int resource)
{
u32 new, check;
int reg;
new = res->start | (res->flags & PCI_REGION_FLAG_MASK);
if (resource < 6) {
reg = PCI_BASE_ADDRESS_0 + 4*resource;
} else if (resource == PCI_ROM_RESOURCE) {
res->flags |= IORESOURCE_ROM_ENABLE;
new |= PCI_ROM_ADDRESS_ENABLE;
reg = dev->rom_base_reg;
} else {
/* Somebody might have asked allocation of a non-standard resource */
return;
}
pci_write_config_dword(dev, reg, new);
pci_read_config_dword(dev, reg, &check);
if ((new ^ check) & ((new & PCI_BASE_ADDRESS_SPACE_IO) ? PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK)) {
printk(KERN_ERR "PCI: Error while updating region "
"%s/%d (%08x != %08x)\n", pci_name(dev), resource,
new, check);
}
}
#endif
/*
* We need to avoid collisions with `mirrored' VGA ports
* and other strange ISA hardware, so we always want the
......
......@@ -55,6 +55,10 @@ void (*ia64_mark_idle)(int);
unsigned long boot_option_idle_override = 0;
EXPORT_SYMBOL(boot_option_idle_override);
unsigned long idle_halt;
EXPORT_SYMBOL(idle_halt);
unsigned long idle_nomwait;
EXPORT_SYMBOL(idle_nomwait);
void
ia64_do_show_stack (struct unw_frame_info *info, void *arg)
......
......@@ -395,7 +395,7 @@ static int handle_global_purge(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
if (kvm->vcpus[i]->cpu != -1) {
call_data.vcpu = kvm->vcpus[i];
smp_call_function_single(kvm->vcpus[i]->cpu,
vcpu_global_purge, &call_data, 0, 1);
vcpu_global_purge, &call_data, 1);
} else
printk(KERN_WARNING"kvm: Uninit vcpu received ipi!\n");
......@@ -1693,7 +1693,7 @@ void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
wake_up_interruptible(&vcpu->wq);
if (vcpu->guest_mode)
smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0, 0);
smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
}
int kvm_apic_set_irq(struct kvm_vcpu *vcpu, u8 vec, u8 trig)
......
......@@ -130,7 +130,7 @@ static struct ia64_pal_retval pal_cache_flush(struct kvm_vcpu *vcpu)
args.cache_type = gr29;
args.operation = gr30;
smp_call_function(remote_pal_cache_flush,
(void *)&args, 1, 1);
(void *)&args, 1);
if (args.status != 0)
printk(KERN_ERR"pal_cache_flush error!,"
"status:0x%lx\n", args.status);
......
......@@ -373,15 +373,6 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
return(0);
}
/*****************************************************************************/
void pcibios_update_resource(struct pci_dev *dev, struct resource *root, struct resource *r, int resource)
{
printk(KERN_WARNING "%s(%d): no support for changing PCI resources...\n",
__FILE__, __LINE__);
}
/*****************************************************************************/
/*
......
......@@ -181,38 +181,6 @@ config LEMOTE_FULONG
Lemote Fulong mini-PC board based on the Chinese Loongson-2E CPU and
an FPGA northbridge
config MIPS_ATLAS
bool "MIPS Atlas board"
select BOOT_ELF32
select BOOT_RAW
select CEVT_R4K
select CSRC_R4K
select DMA_NONCOHERENT
select SYS_HAS_EARLY_PRINTK
select IRQ_CPU
select HW_HAS_PCI
select MIPS_BOARDS_GEN
select MIPS_BONITO64
select PCI_GT64XXX_PCI0
select MIPS_MSC
select RM7000_CPU_SCACHE
select SWAP_IO_SPACE
select SYS_HAS_CPU_MIPS32_R1
select SYS_HAS_CPU_MIPS32_R2
select SYS_HAS_CPU_MIPS64_R1
select SYS_HAS_CPU_NEVADA
select SYS_HAS_CPU_RM7000
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_MULTITHREADING if EXPERIMENTAL
select SYS_SUPPORTS_SMARTMIPS
select GENERIC_HARDIRQS_NO__DO_IRQ
help
This enables support for the MIPS Technologies Atlas evaluation
board.
config MIPS_MALTA
bool "MIPS Malta board"
select ARCH_MAY_HAVE_PC_FDC
......@@ -249,26 +217,6 @@ config MIPS_MALTA
This enables support for the MIPS Technologies Malta evaluation
board.
config MIPS_SEAD
bool "MIPS SEAD board"
select CEVT_R4K
select CSRC_R4K
select IRQ_CPU
select DMA_NONCOHERENT
select SYS_HAS_EARLY_PRINTK
select MIPS_BOARDS_GEN
select SYS_HAS_CPU_MIPS32_R1
select SYS_HAS_CPU_MIPS32_R2
select SYS_HAS_CPU_MIPS64_R1
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_SMARTMIPS
help
This enables support for the MIPS Technologies SEAD evaluation
board.
config MIPS_SIM
bool 'MIPS simulator (MIPSsim)'
select CEVT_R4K
......@@ -437,6 +385,8 @@ config SGI_IP28
select SGI_HAS_DS1286
select SGI_HAS_I8042
select SGI_HAS_INDYDOG
select SGI_HAS_HAL2
select SGI_HAS_HAL2
select SGI_HAS_SEEQ
select SGI_HAS_WD93
select SGI_HAS_ZILOG
......@@ -602,65 +552,11 @@ config SNI_RM
Technology and now in turn merged with Fujitsu. Say Y here to
support this machine type.
config TOSHIBA_JMR3927
bool "Toshiba JMR-TX3927 board"
select CEVT_TXX9
select DMA_NONCOHERENT
select HW_HAS_PCI
select MIPS_TX3927
select IRQ_TXX9
select SWAP_IO_SPACE
select SYS_HAS_CPU_TX39XX
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_BIG_ENDIAN
select GENERIC_HARDIRQS_NO__DO_IRQ
select GPIO_TXX9
config MACH_TX39XX
bool "Toshiba TX39 series based machines"
config TOSHIBA_RBTX4927
bool "Toshiba RBTX49[23]7 board"
select CEVT_R4K
select CSRC_R4K
select CEVT_TXX9
select DMA_NONCOHERENT
select HAS_TXX9_SERIAL
select HW_HAS_PCI
select IRQ_CPU
select IRQ_TXX9
select I8259 if TOSHIBA_FPCIB0
select SWAP_IO_SPACE
select SYS_HAS_CPU_TX49XX
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_KGDB
select GENERIC_HARDIRQS_NO__DO_IRQ
help
This Toshiba board is based on the TX4927 processor. Say Y here to
support this machine type
config TOSHIBA_RBTX4938
bool "Toshiba RBTX4938 board"
select CEVT_R4K
select CSRC_R4K
select CEVT_TXX9
select DMA_NONCOHERENT
select HAS_TXX9_SERIAL
select HW_HAS_PCI
select IRQ_CPU
select IRQ_TXX9
select SWAP_IO_SPACE
select SYS_HAS_CPU_TX49XX
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_KGDB
select GENERIC_HARDIRQS_NO__DO_IRQ
select GPIO_TXX9
help
This Toshiba board is based on the TX4938 processor. Say Y here to
support this machine type
config MACH_TX49XX
bool "Toshiba TX49 series based machines"
config WR_PPMC
bool "Wind River PPMC board"
......@@ -694,8 +590,7 @@ source "arch/mips/lasat/Kconfig"
source "arch/mips/pmc-sierra/Kconfig"
source "arch/mips/sgi-ip27/Kconfig"
source "arch/mips/sibyte/Kconfig"
source "arch/mips/tx4927/Kconfig"
source "arch/mips/tx4938/Kconfig"
source "arch/mips/txx9/Kconfig"
source "arch/mips/vr41xx/Kconfig"
endmenu
......@@ -939,10 +834,6 @@ config PCI_GT64XXX_PCI0
config NO_EXCEPT_FILL
bool
config MIPS_TX3927
bool
select HAS_TXX9_SERIAL
config MIPS_RM9122
bool
select SERIAL_RM9000
......@@ -979,6 +870,9 @@ config SGI_HAS_DS1286
config SGI_HAS_INDYDOG
bool
config SGI_HAS_HAL2
bool
config SGI_HAS_SEEQ
bool
......@@ -2065,10 +1959,6 @@ source "fs/Kconfig.binfmt"
config TRAD_SIGNALS
bool
config BINFMT_IRIX
bool "Include IRIX binary compatibility"
depends on CPU_BIG_ENDIAN && 32BIT && BROKEN
config MIPS32_COMPAT
bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
depends on 64BIT
......
......@@ -14,7 +14,7 @@
KBUILD_DEFCONFIG := ip22_defconfig
cflags-y :=
cflags-y := -ffunction-sections
#
# Select the object file format to substitute into the linker script.
......@@ -304,36 +304,14 @@ core-$(CONFIG_LEMOTE_FULONG) +=arch/mips/lemote/lm2e/
load-$(CONFIG_LEMOTE_FULONG) +=0xffffffff80100000
cflags-$(CONFIG_LEMOTE_FULONG) += -Iinclude/asm-mips/mach-lemote
#
# For all MIPS, Inc. eval boards
#
core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
#
# MIPS Atlas board
#
core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
all-$(CONFIG_MIPS_ATLAS) := vmlinux.bin
#
# MIPS Malta board
#
core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips
core-$(CONFIG_MIPS_MALTA) += arch/mips/mti-malta/
cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-malta
load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
all-$(CONFIG_MIPS_MALTA) := vmlinux.bin
#
# MIPS SEAD board
#
core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
cflags-$(CONFIG_MIPS_SEAD) += -Iinclude/asm-mips/mach-mips
load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
all-$(CONFIG_MIPS_SEAD) := vmlinux.srec
#
# MIPS SIM
#
......@@ -376,12 +354,6 @@ load-$(CONFIG_LASAT) += 0xffffffff80000000
core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
#
# NEC VR4133
#
core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/
load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000
#
# ZAO Networks Capcella (VR4131)
#
......@@ -572,30 +544,31 @@ load-$(CONFIG_SNI_RM) += 0xffffffff80030000
endif
all-$(CONFIG_SNI_RM) := vmlinux.ecoff
#
# Common TXx9
#
core-$(CONFIG_MACH_TX39XX) += arch/mips/txx9/generic/
cflags-$(CONFIG_MACH_TX39XX) += -Iinclude/asm-mips/mach-tx39xx
load-$(CONFIG_MACH_TX39XX) += 0xffffffff80050000
core-$(CONFIG_MACH_TX49XX) += arch/mips/txx9/generic/
cflags-$(CONFIG_MACH_TX49XX) += -Iinclude/asm-mips/mach-tx49xx
load-$(CONFIG_MACH_TX49XX) += 0xffffffff80100000
#
# Toshiba JMR-TX3927 board
#
core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \
arch/mips/jmr3927/common/
cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927
load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/txx9/jmr3927/
#
# Toshiba RBTX4927 board or
# Toshiba RBTX4937 board
#
core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
cflags-$(CONFIG_TOSHIBA_RBTX4927) += -Iinclude/asm-mips/mach-tx49xx
load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/txx9/rbtx4927/
#
# Toshiba RBTX4938 board
#
core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
cflags-$(CONFIG_TOSHIBA_RBTX4938) += -Iinclude/asm-mips/mach-tx49xx
load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/txx9/rbtx4938/
cflags-y += -Iinclude/asm-mips/mach-generic
drivers-$(CONFIG_PCI) += arch/mips/pci/
......
......@@ -11,6 +11,7 @@
* warranty of any kind, whether express or implied.
*/
#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/init.h>
......@@ -77,14 +78,14 @@ static struct resource au1xxx_usb_ohci_resources[] = {
};
/* The dmamask must be set for OHCI to work */
static u64 ohci_dmamask = ~(u32)0;
static u64 ohci_dmamask = DMA_32BIT_MASK;
static struct platform_device au1xxx_usb_ohci_device = {
.name = "au1xxx-ohci",
.id = 0,
.dev = {
.dma_mask = &ohci_dmamask,
.coherent_dma_mask = 0xffffffff,
.coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources),
.resource = au1xxx_usb_ohci_resources,
......@@ -106,14 +107,14 @@ static struct resource au1100_lcd_resources[] = {
}
};
static u64 au1100_lcd_dmamask = ~(u32)0;
static u64 au1100_lcd_dmamask = DMA_32BIT_MASK;
static struct platform_device au1100_lcd_device = {
.name = "au1100-lcd",
.id = 0,
.dev = {
.dma_mask = &au1100_lcd_dmamask,
.coherent_dma_mask = 0xffffffff,
.coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1100_lcd_resources),
.resource = au1100_lcd_resources,
......@@ -135,14 +136,14 @@ static struct resource au1xxx_usb_ehci_resources[] = {
},
};
static u64 ehci_dmamask = ~(u32)0;
static u64 ehci_dmamask = DMA_32BIT_MASK;
static struct platform_device au1xxx_usb_ehci_device = {
.name = "au1xxx-ehci",
.id = 0,
.dev = {
.dma_mask = &ehci_dmamask,
.coherent_dma_mask = 0xffffffff,
.coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1xxx_usb_ehci_resources),
.resource = au1xxx_usb_ehci_resources,
......@@ -180,14 +181,14 @@ static struct resource au1xxx_mmc_resources[] = {
}
};
static u64 udc_dmamask = ~(u32)0;
static u64 udc_dmamask = DMA_32BIT_MASK;
static struct platform_device au1xxx_usb_gdt_device = {
.name = "au1xxx-udc",
.id = 0,
.dev = {
.dma_mask = &udc_dmamask,
.coherent_dma_mask = 0xffffffff,
.coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1xxx_usb_gdt_resources),
.resource = au1xxx_usb_gdt_resources,
......@@ -207,14 +208,14 @@ static struct resource au1xxx_usb_otg_resources[] = {
},
};
static u64 uoc_dmamask = ~(u32)0;
static u64 uoc_dmamask = DMA_32BIT_MASK;
static struct platform_device au1xxx_usb_otg_device = {
.name = "au1xxx-uoc",
.id = 0,
.dev = {
.dma_mask = &uoc_dmamask,
.coherent_dma_mask = 0xffffffff,
.coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1xxx_usb_otg_resources),
.resource = au1xxx_usb_otg_resources,
......@@ -233,27 +234,27 @@ static struct resource au1200_lcd_resources[] = {
}
};
static u64 au1200_lcd_dmamask = ~(u32)0;
static u64 au1200_lcd_dmamask = DMA_32BIT_MASK;
static struct platform_device au1200_lcd_device = {
.name = "au1200-lcd",
.id = 0,
.dev = {
.dma_mask = &au1200_lcd_dmamask,
.coherent_dma_mask = 0xffffffff,
.coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1200_lcd_resources),
.resource = au1200_lcd_resources,
};
static u64 au1xxx_mmc_dmamask = ~(u32)0;
static u64 au1xxx_mmc_dmamask = DMA_32BIT_MASK;
static struct platform_device au1xxx_mmc_device = {
.name = "au1xxx-mmc",
.id = 0,
.dev = {
.dma_mask = &au1xxx_mmc_dmamask,
.coherent_dma_mask = 0xffffffff,
.coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1xxx_mmc_resources),
.resource = au1xxx_mmc_resources,
......
......@@ -24,6 +24,9 @@
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <mtd/mtd-abi.h>
static struct gpio_keys_button mtx1_gpio_button[] = {
{
......@@ -85,10 +88,56 @@ static struct platform_device mtx1_gpio_leds = {
}
};
static struct mtd_partition mtx1_mtd_partitions[] = {
{
.name = "filesystem",
.size = 0x01C00000,
.offset = 0,
},
{
.name = "yamon",
.size = 0x00100000,
.offset = MTDPART_OFS_APPEND,
.mask_flags = MTD_WRITEABLE,
},
{
.name = "kernel",
.size = 0x002c0000,
.offset = MTDPART_OFS_APPEND,
},
{
.name = "yamon env",
.size = 0x00040000,
.offset = MTDPART_OFS_APPEND,
},
};
static struct physmap_flash_data mtx1_flash_data = {
.width = 4,
.nr_parts = 4,
.parts = mtx1_mtd_partitions,
};
static struct resource mtx1_mtd_resource = {
.start = 0x1e000000,
.end = 0x1fffffff,
.flags = IORESOURCE_MEM,
};
static struct platform_device mtx1_mtd = {
.name = "physmap-flash",
.dev = {
.platform_data = &mtx1_flash_data,
},
.num_resources = 1,
.resource = &mtx1_mtd_resource,
};
static struct __initdata platform_device * mtx1_devs[] = {
&mtx1_gpio_leds,
&mtx1_wdt,
&mtx1_button
&mtx1_button,
&mtx1_mtd,
};
static int __init mtx1_register_devices(void)
......
......@@ -18,6 +18,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/dma-mapping.h>
#include <linux/init.h>
#include <linux/platform_device.h>
......@@ -36,14 +37,14 @@ static struct resource ide_resources[] = {
}
};
static u64 ide_dmamask = ~(u32)0;
static u64 ide_dmamask = DMA_32BIT_MASK;
static struct platform_device ide_device = {
.name = "au1200-ide",
.id = 0,
.dev = {
.dma_mask = &ide_dmamask,
.coherent_dma_mask = 0xffffffff,
.coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(ide_resources),
.resource = ide_resources
......
......@@ -2,7 +2,7 @@
# Makefile for the Cobalt micro systems family specific parts of the kernel
#
obj-y := buttons.o irq.o led.o reset.o rtc.o serial.o setup.o time.o
obj-y := buttons.o irq.o lcd.o led.o reset.o rtc.o serial.o setup.o time.o
obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_EARLY_PRINTK) += console.o
......
/*
* Registration of Cobalt LCD platform device.
*
* Copyright (C) 2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/platform_device.h>
static struct resource cobalt_lcd_resource __initdata = {
.start = 0x1f000000,
.end = 0x1f00001f,
.flags = IORESOURCE_MEM,
};
static __init int cobalt_lcd_add(void)
{
struct platform_device *pdev;
int retval;
pdev = platform_device_alloc("cobalt-lcd", -1);
if (!pdev)
return -ENOMEM;
retval = platform_device_add_resources(pdev, &cobalt_lcd_resource, 1);
if (retval)
goto err_free_device;
retval = platform_device_add(pdev);
if (retval)
goto err_free_device;
return 0;
err_free_device:
platform_device_put(pdev);
return retval;
}
device_initcall(cobalt_lcd_add);
......@@ -16,9 +16,7 @@ CONFIG_BCM47XX=y
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
......
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.25-rc7
# Mon Mar 31 08:11:19 2008
# Linux kernel version: 2.6.26-rc8
# Wed Jul 2 17:02:55 2008
#
CONFIG_MIPS=y
......@@ -16,9 +16,7 @@ CONFIG_MIPS=y
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
......@@ -148,6 +146,7 @@ CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_RESOURCES_64BIT=y
CONFIG_ZONE_DMA_FLAG=0
......@@ -156,6 +155,7 @@ CONFIG_SMP=y
CONFIG_SYS_SUPPORTS_SMP=y
CONFIG_NR_CPUS_DEFAULT_4=y
CONFIG_NR_CPUS=4
# CONFIG_MIPS_CMP is not set
CONFIG_TICK_ONESHOT=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
......@@ -223,6 +223,7 @@ CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_COMPAT_BRK=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
......@@ -241,12 +242,14 @@ CONFIG_SLAB=y
CONFIG_HAVE_OPROFILE=y
# CONFIG_HAVE_KPROBES is not set
# CONFIG_HAVE_KRETPROBES is not set
# CONFIG_HAVE_DMA_ATTRS is not set
CONFIG_PROC_PAGE_MONITOR=y
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_MODVERSIONS=y
......@@ -302,7 +305,6 @@ CONFIG_BINFMT_ELF32=y
# Power management options
#
CONFIG_PM=y
# CONFIG_PM_LEGACY is not set
# CONFIG_PM_DEBUG is not set
#
......@@ -399,9 +401,11 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=m
CONFIG_INET6_XFRM_MODE_BEET=m
CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
CONFIG_IPV6_SIT=m
CONFIG_IPV6_NDISC_NODETYPE=y
CONFIG_IPV6_TUNNEL=m
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_IPV6_SUBTREES=y
# CONFIG_IPV6_MROUTE is not set
CONFIG_NETWORK_SECMARK=y
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
......@@ -600,7 +604,7 @@ CONFIG_BLK_DEV_IT8213=m
CONFIG_BLK_DEV_TC86C001=m
# CONFIG_BLK_DEV_IDE_SWARM is not set
CONFIG_BLK_DEV_IDEDMA=y
CONFIG_IDE_ARCH_OBSOLETE_INIT=y
# CONFIG_BLK_DEV_HD_ONLY is not set
# CONFIG_BLK_DEV_HD is not set
#
......@@ -617,11 +621,12 @@ CONFIG_SCSI_PROC_FS=y
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
CONFIG_CHR_DEV_ST=m
# CONFIG_CHR_DEV_OSST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
# CONFIG_CHR_DEV_SCH is not set
CONFIG_BLK_DEV_SR=m
CONFIG_BLK_DEV_SR_VENDOR=y
CONFIG_CHR_DEV_SG=m
CONFIG_CHR_DEV_SCH=m
#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
......@@ -650,6 +655,7 @@ CONFIG_SCSI_LOWLEVEL=y
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_AIC79XX is not set
# CONFIG_SCSI_AIC94XX is not set
# CONFIG_SCSI_DPT_I2O is not set
# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_ARCMSR is not set
# CONFIG_MEGARAID_NEWGEN is not set
......@@ -675,7 +681,10 @@ CONFIG_SCSI_LOWLEVEL=y
# CONFIG_SCSI_SRP is not set
CONFIG_ATA=y
# CONFIG_ATA_NONSTANDARD is not set
CONFIG_SATA_PMP=y
# CONFIG_SATA_AHCI is not set
CONFIG_SATA_SIL24=y
CONFIG_ATA_SFF=y
# CONFIG_SATA_SVW is not set
# CONFIG_ATA_PIIX is not set
# CONFIG_SATA_MV is not set
......@@ -685,7 +694,6 @@ CONFIG_ATA=y
# CONFIG_SATA_PROMISE is not set
# CONFIG_SATA_SX4 is not set
# CONFIG_SATA_SIL is not set
CONFIG_SATA_SIL24=y
# CONFIG_SATA_SIS is not set
# CONFIG_SATA_ULI is not set
# CONFIG_SATA_VIA is not set
......@@ -730,12 +738,17 @@ CONFIG_PATA_SIL680=y
# CONFIG_PATA_VIA is not set
# CONFIG_PATA_WINBOND is not set
# CONFIG_PATA_PLATFORM is not set
# CONFIG_PATA_SCH is not set
# CONFIG_MD is not set
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
#
# Enable only one of the two stacks, unless you know what you are doing
#
# CONFIG_FIREWIRE is not set
# CONFIG_IEEE1394 is not set
# CONFIG_I2O is not set
......@@ -797,7 +810,6 @@ CONFIG_SB1250_MAC=y
# CONFIG_SIS190 is not set
# CONFIG_SKGE is not set
# CONFIG_SKY2 is not set
# CONFIG_SK98LIN is not set
# CONFIG_VIA_VELOCITY is not set
# CONFIG_TIGON3 is not set
# CONFIG_BNX2 is not set
......@@ -815,6 +827,7 @@ CONFIG_NETXEN_NIC=m
# CONFIG_MLX4_CORE is not set
# CONFIG_TEHUTI is not set
# CONFIG_BNX2X is not set
# CONFIG_SFC is not set
# CONFIG_TR is not set
#
......@@ -822,6 +835,7 @@ CONFIG_NETXEN_NIC=m
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
# CONFIG_IWLWIFI_LEDS is not set
# CONFIG_WAN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
......@@ -867,6 +881,7 @@ CONFIG_SERIO_RAW=m
# Character devices
#
# CONFIG_VT is not set
CONFIG_DEVKMEM=y
CONFIG_SERIAL_NONSTANDARD=y
# CONFIG_COMPUTONE is not set
# CONFIG_ROCKETPORT is not set
......@@ -903,7 +918,6 @@ CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_RTC is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_RAW_DRIVER is not set
......@@ -913,13 +927,6 @@ CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
#
# I2C Algorithms
#
# CONFIG_I2C_ALGOBIT is not set
# CONFIG_I2C_ALGOPCF is not set
# CONFIG_I2C_ALGOPCA is not set
#
# I2C Hardware Bus support
#
......@@ -946,6 +953,7 @@ CONFIG_I2C_SIBYTE=y
# CONFIG_I2C_VIA is not set
# CONFIG_I2C_VIAPRO is not set
# CONFIG_I2C_VOODOO3 is not set
# CONFIG_I2C_PCA_PLATFORM is not set
#
# Miscellaneous I2C Chip support
......@@ -955,23 +963,18 @@ CONFIG_SENSORS_EEPROM=y
CONFIG_SENSORS_PCF8574=y
# CONFIG_PCF8575 is not set
CONFIG_SENSORS_PCF8591=y
# CONFIG_TPS65010 is not set
CONFIG_SENSORS_MAX6875=y
# CONFIG_SENSORS_TSL2550 is not set
CONFIG_I2C_DEBUG_CORE=y
CONFIG_I2C_DEBUG_ALGO=y
CONFIG_I2C_DEBUG_BUS=y
CONFIG_I2C_DEBUG_CHIP=y
#
# SPI support
#
# CONFIG_SPI is not set
# CONFIG_SPI_MASTER is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
# CONFIG_THERMAL_HWMON is not set
# CONFIG_WATCHDOG is not set
#
......@@ -984,12 +987,22 @@ CONFIG_SSB_POSSIBLE=y
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
# CONFIG_HTC_PASIC3 is not set
#
# Multimedia devices
#
#
# Multimedia core support
#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
# CONFIG_VIDEO_MEDIA is not set
#
# Multimedia drivers
#
# CONFIG_DAB is not set
#
......@@ -1015,6 +1028,8 @@ CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
CONFIG_USB_ARCH_HAS_EHCI=y
# CONFIG_USB is not set
# CONFIG_USB_OTG_WHITELIST is not set
# CONFIG_USB_OTG_BLACKLIST_HUB is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
......@@ -1023,13 +1038,10 @@ CONFIG_USB_ARCH_HAS_EHCI=y
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
CONFIG_RTC_LIB=y
# CONFIG_RTC_CLASS is not set
#
# Userspace I/O
#
# CONFIG_UIO is not set
#
......@@ -1123,7 +1135,6 @@ CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
# CONFIG_NFS_V4 is not set
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
......@@ -1194,6 +1205,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_FRAME_WARN=2048
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
......@@ -1204,6 +1216,7 @@ CONFIG_DETECT_SOFTLOCKUP=y
CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
......@@ -1217,6 +1230,7 @@ CONFIG_DEBUG_MUTEXES=y
# CONFIG_DEBUG_KOBJECT is not set
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_WRITECOUNT is not set
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_BOOT_PRINTK_DELAY is not set
......@@ -1237,53 +1251,82 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_CRYPTO=y
#
# Crypto core or helper
#
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_AEAD=m
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_SEQIV=m
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_GF128MUL=m
CONFIG_CRYPTO_NULL=y
# CONFIG_CRYPTO_CRYPTD is not set
CONFIG_CRYPTO_AUTHENC=m
# CONFIG_CRYPTO_TEST is not set
#
# Authenticated Encryption with Associated Data
#
CONFIG_CRYPTO_CCM=m
CONFIG_CRYPTO_GCM=m
CONFIG_CRYPTO_SEQIV=m
#
# Block modes
#
CONFIG_CRYPTO_CBC=m
CONFIG_CRYPTO_CTR=m
# CONFIG_CRYPTO_CTS is not set
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_XTS=m
#
# Hash modes
#
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_NULL=y
#
# Digest
#
# CONFIG_CRYPTO_CRC32C is not set
CONFIG_CRYPTO_MD4=m
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_MICHAEL_MIC=m
CONFIG_CRYPTO_SHA1=m
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_GF128MUL=m
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_CBC=m
CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_XTS=m
CONFIG_CRYPTO_CTR=m
CONFIG_CRYPTO_GCM=m
CONFIG_CRYPTO_CCM=m
# CONFIG_CRYPTO_CRYPTD is not set
CONFIG_CRYPTO_DES=m
CONFIG_CRYPTO_FCRYPT=m
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_TWOFISH=m
CONFIG_CRYPTO_TWOFISH_COMMON=m
CONFIG_CRYPTO_SERPENT=m
CONFIG_CRYPTO_WP512=m
#
# Ciphers
#
CONFIG_CRYPTO_AES=m
CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_ARC4=m
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m
CONFIG_CRYPTO_CAST5=m
CONFIG_CRYPTO_CAST6=m
CONFIG_CRYPTO_TEA=m
CONFIG_CRYPTO_ARC4=m
CONFIG_CRYPTO_DES=m
CONFIG_CRYPTO_FCRYPT=m
CONFIG_CRYPTO_KHAZAD=m
CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_SEED=m
CONFIG_CRYPTO_SALSA20=m
CONFIG_CRYPTO_SEED=m
CONFIG_CRYPTO_SERPENT=m
CONFIG_CRYPTO_TEA=m
CONFIG_CRYPTO_TWOFISH=m
CONFIG_CRYPTO_TWOFISH_COMMON=m
#
# Compression
#
CONFIG_CRYPTO_DEFLATE=m
CONFIG_CRYPTO_MICHAEL_MIC=m
# CONFIG_CRYPTO_CRC32C is not set
CONFIG_CRYPTO_CAMELLIA=m
# CONFIG_CRYPTO_TEST is not set
CONFIG_CRYPTO_AUTHENC=m
# CONFIG_CRYPTO_LZO is not set
CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_HIFN_795X is not set
......@@ -1292,9 +1335,10 @@ CONFIG_CRYPTO_HW=y
# Library routines
#
CONFIG_BITREVERSE=y
# CONFIG_GENERIC_FIND_FIRST_BIT is not set
CONFIG_CRC_CCITT=m
# CONFIG_CRC16 is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC_ITU_T=m
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
CONFIG_LIBCRC32C=m
......
......@@ -14,9 +14,7 @@ CONFIG_MIPS=y
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LEMOTE_FULONG is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
CONFIG_MACH_VR41XX=y
......
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