Skip to content
体验新版
项目
组织
正在加载...
登录
切换导航
打开侧边栏
openanolis
cloud-kernel
提交
ba02a215
cloud-kernel
项目概览
openanolis
/
cloud-kernel
大约 1 年 前同步成功
通知
158
Star
36
Fork
7
代码
文件
提交
分支
Tags
贡献者
分支图
Diff
Issue
10
列表
看板
标记
里程碑
合并请求
2
Wiki
0
Wiki
分析
仓库
DevOps
项目成员
Pages
cloud-kernel
项目概览
项目概览
详情
发布
仓库
仓库
文件
提交
分支
标签
贡献者
分支图
比较
Issue
10
Issue
10
列表
看板
标记
里程碑
合并请求
2
合并请求
2
Pages
分析
分析
仓库分析
DevOps
Wiki
0
Wiki
成员
成员
收起侧边栏
关闭侧边栏
动态
分支图
创建新Issue
提交
Issue看板
提交
ba02a215
编写于
1月 16, 2010
作者:
R
Russell King
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
ARM: Improve documentation in arm_timer.h
Signed-off-by:
N
Russell King
<
rmk+kernel@arm.linux.org.uk
>
上级
a285edcf
变更
1
隐藏空白更改
内联
并排
Showing
1 changed file
with
24 addition
and
15 deletion
+24
-15
arch/arm/include/asm/hardware/arm_timer.h
arch/arm/include/asm/hardware/arm_timer.h
+24
-15
未找到文件。
arch/arm/include/asm/hardware/arm_timer.h
浏览文件 @
ba02a215
#ifndef __ASM_ARM_HARDWARE_ARM_TIMER_H
#define __ASM_ARM_HARDWARE_ARM_TIMER_H
#define TIMER_LOAD 0x00
#define TIMER_VALUE 0x04
#define TIMER_CTRL 0x08
#define TIMER_CTRL_ONESHOT (1 << 0)
#define TIMER_CTRL_32BIT (1 << 1)
#define TIMER_CTRL_DIV1 (0 << 2)
#define TIMER_CTRL_DIV16 (1 << 2)
#define TIMER_CTRL_DIV256 (2 << 2)
#define TIMER_CTRL_IE (1 << 5)
/* Interrupt Enable (versatile only) */
#define TIMER_CTRL_PERIODIC (1 << 6)
#define TIMER_CTRL_ENABLE (1 << 7)
/*
* ARM timer implementation, found in Integrator, Versatile and Realview
* platforms. Not all platforms support all registers and bits in these
* registers, so we mark them with A for Integrator AP, C for Integrator
* CP, V for Versatile and R for Realview.
*
* Integrator AP has 16-bit timers, Integrator CP, Versatile and Realview
* can have 16-bit or 32-bit selectable via a bit in the control register.
*/
#define TIMER_LOAD 0x00
/* ACVR rw */
#define TIMER_VALUE 0x04
/* ACVR ro */
#define TIMER_CTRL 0x08
/* ACVR rw */
#define TIMER_CTRL_ONESHOT (1 << 0)
/* CVR */
#define TIMER_CTRL_32BIT (1 << 1)
/* CVR */
#define TIMER_CTRL_DIV1 (0 << 2)
/* ACVR */
#define TIMER_CTRL_DIV16 (1 << 2)
/* ACVR */
#define TIMER_CTRL_DIV256 (2 << 2)
/* ACVR */
#define TIMER_CTRL_IE (1 << 5)
/* VR */
#define TIMER_CTRL_PERIODIC (1 << 6)
/* ACVR */
#define TIMER_CTRL_ENABLE (1 << 7)
/* ACVR */
#define TIMER_INTCLR 0x0c
#define TIMER_RIS 0x10
#define TIMER_MIS 0x14
#define TIMER_BGLOAD 0x18
#define TIMER_INTCLR 0x0c
/* ACVR wo */
#define TIMER_RIS 0x10
/* CVR ro */
#define TIMER_MIS 0x14
/* CVR ro */
#define TIMER_BGLOAD 0x18
/* CVR rw */
#endif
编辑
预览
Markdown
is supported
0%
请重试
或
添加新附件
.
添加附件
取消
You are about to add
0
people
to the discussion. Proceed with caution.
先完成此消息的编辑!
取消
想要评论请
注册
或
登录